1/*	$OpenBSD: if_rsu.c,v 1.17 2013/04/15 09:23:01 mglocker Exp $	*/
2
3/*-
4 * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr>
5 *
6 * Permission to use, copy, modify, and distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 */
18#include <sys/cdefs.h>
19__FBSDID("$FreeBSD: stable/11/sys/dev/usb/wlan/if_rsu.c 345636 2019-03-28 09:50:25Z avos $");
20
21/*
22 * Driver for Realtek RTL8188SU/RTL8191SU/RTL8192SU.
23 *
24 * TODO:
25 *   o h/w crypto
26 *   o hostap / ibss / mesh
27 *   o sensible RSSI levels
28 *   o power-save operation
29 */
30
31#include "opt_wlan.h"
32
33#include <sys/param.h>
34#include <sys/endian.h>
35#include <sys/sockio.h>
36#include <sys/malloc.h>
37#include <sys/mbuf.h>
38#include <sys/kernel.h>
39#include <sys/socket.h>
40#include <sys/systm.h>
41#include <sys/conf.h>
42#include <sys/bus.h>
43#include <sys/firmware.h>
44#include <sys/module.h>
45
46#include <net/bpf.h>
47#include <net/if.h>
48#include <net/if_var.h>
49#include <net/if_arp.h>
50#include <net/if_dl.h>
51#include <net/if_media.h>
52#include <net/if_types.h>
53
54#include <netinet/in.h>
55#include <netinet/in_systm.h>
56#include <netinet/in_var.h>
57#include <netinet/if_ether.h>
58#include <netinet/ip.h>
59
60#include <net80211/ieee80211_var.h>
61#include <net80211/ieee80211_regdomain.h>
62#include <net80211/ieee80211_radiotap.h>
63
64#include <dev/usb/usb.h>
65#include <dev/usb/usbdi.h>
66#include "usbdevs.h"
67
68#define USB_DEBUG_VAR rsu_debug
69#include <dev/usb/usb_debug.h>
70
71#include <dev/usb/wlan/if_rsureg.h>
72
73#ifdef USB_DEBUG
74static int rsu_debug = 0;
75SYSCTL_NODE(_hw_usb, OID_AUTO, rsu, CTLFLAG_RW, 0, "USB rsu");
76SYSCTL_INT(_hw_usb_rsu, OID_AUTO, debug, CTLFLAG_RWTUN, &rsu_debug, 0,
77    "Debug level");
78#define	RSU_DPRINTF(_sc, _flg, ...)					\
79	do								\
80		if (((_flg) == (RSU_DEBUG_ANY)) || (rsu_debug & (_flg))) \
81			device_printf((_sc)->sc_dev, __VA_ARGS__);	\
82	while (0)
83#else
84#define	RSU_DPRINTF(_sc, _flg, ...)
85#endif
86
87static int rsu_enable_11n = 1;
88TUNABLE_INT("hw.usb.rsu.enable_11n", &rsu_enable_11n);
89
90#define	RSU_DEBUG_ANY		0xffffffff
91#define	RSU_DEBUG_TX		0x00000001
92#define	RSU_DEBUG_RX		0x00000002
93#define	RSU_DEBUG_RESET		0x00000004
94#define	RSU_DEBUG_CALIB		0x00000008
95#define	RSU_DEBUG_STATE		0x00000010
96#define	RSU_DEBUG_SCAN		0x00000020
97#define	RSU_DEBUG_FWCMD		0x00000040
98#define	RSU_DEBUG_TXDONE	0x00000080
99#define	RSU_DEBUG_FW		0x00000100
100#define	RSU_DEBUG_FWDBG		0x00000200
101#define	RSU_DEBUG_AMPDU		0x00000400
102
103static const STRUCT_USB_HOST_ID rsu_devs[] = {
104#define	RSU_HT_NOT_SUPPORTED 0
105#define	RSU_HT_SUPPORTED 1
106#define RSU_DEV_HT(v,p)  { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, \
107				   RSU_HT_SUPPORTED) }
108#define RSU_DEV(v,p)     { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, \
109				   RSU_HT_NOT_SUPPORTED) }
110	RSU_DEV(ASUS,			RTL8192SU),
111	RSU_DEV(AZUREWAVE,		RTL8192SU_4),
112	RSU_DEV(SITECOMEU,		WLA1000),
113	RSU_DEV_HT(ACCTON,		RTL8192SU),
114	RSU_DEV_HT(ASUS,		USBN10),
115	RSU_DEV_HT(AZUREWAVE,		RTL8192SU_1),
116	RSU_DEV_HT(AZUREWAVE,		RTL8192SU_2),
117	RSU_DEV_HT(AZUREWAVE,		RTL8192SU_3),
118	RSU_DEV_HT(AZUREWAVE,		RTL8192SU_5),
119	RSU_DEV_HT(BELKIN,		RTL8192SU_1),
120	RSU_DEV_HT(BELKIN,		RTL8192SU_2),
121	RSU_DEV_HT(BELKIN,		RTL8192SU_3),
122	RSU_DEV_HT(CONCEPTRONIC2,	RTL8192SU_1),
123	RSU_DEV_HT(CONCEPTRONIC2,	RTL8192SU_2),
124	RSU_DEV_HT(CONCEPTRONIC2,	RTL8192SU_3),
125	RSU_DEV_HT(COREGA,		RTL8192SU),
126	RSU_DEV_HT(DLINK2,		DWA131A1),
127	RSU_DEV_HT(DLINK2,		RTL8192SU_1),
128	RSU_DEV_HT(DLINK2,		RTL8192SU_2),
129	RSU_DEV_HT(EDIMAX,		RTL8192SU_1),
130	RSU_DEV_HT(EDIMAX,		RTL8192SU_2),
131	RSU_DEV_HT(EDIMAX,		EW7622UMN),
132	RSU_DEV_HT(GUILLEMOT,		HWGUN54),
133	RSU_DEV_HT(GUILLEMOT,		HWNUM300),
134	RSU_DEV_HT(HAWKING,		RTL8192SU_1),
135	RSU_DEV_HT(HAWKING,		RTL8192SU_2),
136	RSU_DEV_HT(PLANEX2,		GWUSNANO),
137	RSU_DEV_HT(REALTEK,		RTL8171),
138	RSU_DEV_HT(REALTEK,		RTL8172),
139	RSU_DEV_HT(REALTEK,		RTL8173),
140	RSU_DEV_HT(REALTEK,		RTL8174),
141	RSU_DEV_HT(REALTEK,		RTL8192SU),
142	RSU_DEV_HT(REALTEK,		RTL8712),
143	RSU_DEV_HT(REALTEK,		RTL8713),
144	RSU_DEV_HT(SENAO,		RTL8192SU_1),
145	RSU_DEV_HT(SENAO,		RTL8192SU_2),
146	RSU_DEV_HT(SITECOMEU,		WL349V1),
147	RSU_DEV_HT(SITECOMEU,		WL353),
148	RSU_DEV_HT(SWEEX2,		LW154),
149	RSU_DEV_HT(TRENDNET,		TEW646UBH),
150#undef RSU_DEV_HT
151#undef RSU_DEV
152};
153
154static device_probe_t   rsu_match;
155static device_attach_t  rsu_attach;
156static device_detach_t  rsu_detach;
157static usb_callback_t   rsu_bulk_tx_callback_be_bk;
158static usb_callback_t   rsu_bulk_tx_callback_vi_vo;
159static usb_callback_t   rsu_bulk_tx_callback_h2c;
160static usb_callback_t   rsu_bulk_rx_callback;
161static usb_error_t	rsu_do_request(struct rsu_softc *,
162			    struct usb_device_request *, void *);
163static struct ieee80211vap *
164		rsu_vap_create(struct ieee80211com *, const char name[],
165		    int, enum ieee80211_opmode, int, const uint8_t bssid[],
166		    const uint8_t mac[]);
167static void	rsu_vap_delete(struct ieee80211vap *);
168static void	rsu_scan_start(struct ieee80211com *);
169static void	rsu_scan_end(struct ieee80211com *);
170static void	rsu_getradiocaps(struct ieee80211com *, int, int *,
171		    struct ieee80211_channel[]);
172static void	rsu_set_channel(struct ieee80211com *);
173static void	rsu_update_mcast(struct ieee80211com *);
174static int	rsu_alloc_rx_list(struct rsu_softc *);
175static void	rsu_free_rx_list(struct rsu_softc *);
176static int	rsu_alloc_tx_list(struct rsu_softc *);
177static void	rsu_free_tx_list(struct rsu_softc *);
178static void	rsu_free_list(struct rsu_softc *, struct rsu_data [], int);
179static struct rsu_data *_rsu_getbuf(struct rsu_softc *);
180static struct rsu_data *rsu_getbuf(struct rsu_softc *);
181static void	rsu_freebuf(struct rsu_softc *, struct rsu_data *);
182static int	rsu_write_region_1(struct rsu_softc *, uint16_t, uint8_t *,
183		    int);
184static void	rsu_write_1(struct rsu_softc *, uint16_t, uint8_t);
185static void	rsu_write_2(struct rsu_softc *, uint16_t, uint16_t);
186static void	rsu_write_4(struct rsu_softc *, uint16_t, uint32_t);
187static int	rsu_read_region_1(struct rsu_softc *, uint16_t, uint8_t *,
188		    int);
189static uint8_t	rsu_read_1(struct rsu_softc *, uint16_t);
190static uint16_t	rsu_read_2(struct rsu_softc *, uint16_t);
191static uint32_t	rsu_read_4(struct rsu_softc *, uint16_t);
192static int	rsu_fw_iocmd(struct rsu_softc *, uint32_t);
193static uint8_t	rsu_efuse_read_1(struct rsu_softc *, uint16_t);
194static int	rsu_read_rom(struct rsu_softc *);
195static int	rsu_fw_cmd(struct rsu_softc *, uint8_t, void *, int);
196static void	rsu_calib_task(void *, int);
197static void	rsu_tx_task(void *, int);
198static int	rsu_newstate(struct ieee80211vap *, enum ieee80211_state, int);
199#ifdef notyet
200static void	rsu_set_key(struct rsu_softc *, const struct ieee80211_key *);
201static void	rsu_delete_key(struct rsu_softc *, const struct ieee80211_key *);
202#endif
203static int	rsu_site_survey(struct rsu_softc *, struct ieee80211vap *);
204static int	rsu_join_bss(struct rsu_softc *, struct ieee80211_node *);
205static int	rsu_disconnect(struct rsu_softc *);
206static int	rsu_hwrssi_to_rssi(struct rsu_softc *, int hw_rssi);
207static void	rsu_event_survey(struct rsu_softc *, uint8_t *, int);
208static void	rsu_event_join_bss(struct rsu_softc *, uint8_t *, int);
209static void	rsu_rx_event(struct rsu_softc *, uint8_t, uint8_t *, int);
210static void	rsu_rx_multi_event(struct rsu_softc *, uint8_t *, int);
211#if 0
212static int8_t	rsu_get_rssi(struct rsu_softc *, int, void *);
213#endif
214static struct mbuf * rsu_rx_frame(struct rsu_softc *, uint8_t *, int);
215static struct mbuf * rsu_rx_multi_frame(struct rsu_softc *, uint8_t *, int);
216static struct mbuf *
217		rsu_rxeof(struct usb_xfer *, struct rsu_data *);
218static void	rsu_txeof(struct usb_xfer *, struct rsu_data *);
219static int	rsu_raw_xmit(struct ieee80211_node *, struct mbuf *,
220		    const struct ieee80211_bpf_params *);
221static void	rsu_init(struct rsu_softc *);
222static int	rsu_tx_start(struct rsu_softc *, struct ieee80211_node *,
223		    struct mbuf *, struct rsu_data *);
224static int	rsu_transmit(struct ieee80211com *, struct mbuf *);
225static void	rsu_start(struct rsu_softc *);
226static void	_rsu_start(struct rsu_softc *);
227static void	rsu_parent(struct ieee80211com *);
228static void	rsu_stop(struct rsu_softc *);
229static void	rsu_ms_delay(struct rsu_softc *, int);
230
231static device_method_t rsu_methods[] = {
232	DEVMETHOD(device_probe,		rsu_match),
233	DEVMETHOD(device_attach,	rsu_attach),
234	DEVMETHOD(device_detach,	rsu_detach),
235
236	DEVMETHOD_END
237};
238
239static driver_t rsu_driver = {
240	.name = "rsu",
241	.methods = rsu_methods,
242	.size = sizeof(struct rsu_softc)
243};
244
245static devclass_t rsu_devclass;
246
247DRIVER_MODULE(rsu, uhub, rsu_driver, rsu_devclass, NULL, 0);
248MODULE_DEPEND(rsu, wlan, 1, 1, 1);
249MODULE_DEPEND(rsu, usb, 1, 1, 1);
250MODULE_DEPEND(rsu, firmware, 1, 1, 1);
251MODULE_VERSION(rsu, 1);
252USB_PNP_HOST_INFO(rsu_devs);
253
254static uint8_t rsu_wme_ac_xfer_map[4] = {
255	[WME_AC_BE] = RSU_BULK_TX_BE_BK,
256	[WME_AC_BK] = RSU_BULK_TX_BE_BK,
257	[WME_AC_VI] = RSU_BULK_TX_VI_VO,
258	[WME_AC_VO] = RSU_BULK_TX_VI_VO,
259};
260
261/* XXX hard-coded */
262#define	RSU_H2C_ENDPOINT	3
263
264static const struct usb_config rsu_config[RSU_N_TRANSFER] = {
265	[RSU_BULK_RX] = {
266		.type = UE_BULK,
267		.endpoint = UE_ADDR_ANY,
268		.direction = UE_DIR_IN,
269		.bufsize = RSU_RXBUFSZ,
270		.flags = {
271			.pipe_bof = 1,
272			.short_xfer_ok = 1
273		},
274		.callback = rsu_bulk_rx_callback
275	},
276	[RSU_BULK_TX_BE_BK] = {
277		.type = UE_BULK,
278		.endpoint = 0x06,
279		.direction = UE_DIR_OUT,
280		.bufsize = RSU_TXBUFSZ,
281		.flags = {
282			.ext_buffer = 1,
283			.pipe_bof = 1,
284			.force_short_xfer = 1
285		},
286		.callback = rsu_bulk_tx_callback_be_bk,
287		.timeout = RSU_TX_TIMEOUT
288	},
289	[RSU_BULK_TX_VI_VO] = {
290		.type = UE_BULK,
291		.endpoint = 0x04,
292		.direction = UE_DIR_OUT,
293		.bufsize = RSU_TXBUFSZ,
294		.flags = {
295			.ext_buffer = 1,
296			.pipe_bof = 1,
297			.force_short_xfer = 1
298		},
299		.callback = rsu_bulk_tx_callback_vi_vo,
300		.timeout = RSU_TX_TIMEOUT
301	},
302	[RSU_BULK_TX_H2C] = {
303		.type = UE_BULK,
304		.endpoint = 0x0d,
305		.direction = UE_DIR_OUT,
306		.bufsize = RSU_TXBUFSZ,
307		.flags = {
308			.ext_buffer = 1,
309			.pipe_bof = 1,
310			.short_xfer_ok = 1
311		},
312		.callback = rsu_bulk_tx_callback_h2c,
313		.timeout = RSU_TX_TIMEOUT
314	},
315};
316
317static int
318rsu_match(device_t self)
319{
320	struct usb_attach_arg *uaa = device_get_ivars(self);
321
322	if (uaa->usb_mode != USB_MODE_HOST ||
323	    uaa->info.bIfaceIndex != 0 ||
324	    uaa->info.bConfigIndex != 0)
325		return (ENXIO);
326
327	return (usbd_lookup_id_by_uaa(rsu_devs, sizeof(rsu_devs), uaa));
328}
329
330static int
331rsu_send_mgmt(struct ieee80211_node *ni, int type, int arg)
332{
333
334	return (ENOTSUP);
335}
336
337static void
338rsu_update_chw(struct ieee80211com *ic)
339{
340
341}
342
343/*
344 * notification from net80211 that it'd like to do A-MPDU on the given TID.
345 *
346 * Note: this actually hangs traffic at the present moment, so don't use it.
347 * The firmware debug does indiciate it's sending and establishing a TX AMPDU
348 * session, but then no traffic flows.
349 */
350static int
351rsu_ampdu_enable(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap)
352{
353#if 0
354	struct rsu_softc *sc = ni->ni_ic->ic_softc;
355	struct r92s_add_ba_req req;
356
357	/* Don't enable if it's requested or running */
358	if (IEEE80211_AMPDU_REQUESTED(tap))
359		return (0);
360	if (IEEE80211_AMPDU_RUNNING(tap))
361		return (0);
362
363	/* We've decided to send addba; so send it */
364	req.tid = htole32(tap->txa_tid);
365
366	/* Attempt net80211 state */
367	if (ieee80211_ampdu_tx_request_ext(ni, tap->txa_tid) != 1)
368		return (0);
369
370	/* Send the firmware command */
371	RSU_DPRINTF(sc, RSU_DEBUG_AMPDU, "%s: establishing AMPDU TX for TID %d\n",
372	    __func__,
373	    tap->txa_tid);
374
375	RSU_LOCK(sc);
376	if (rsu_fw_cmd(sc, R92S_CMD_ADDBA_REQ, &req, sizeof(req)) != 1) {
377		RSU_UNLOCK(sc);
378		/* Mark failure */
379		(void) ieee80211_ampdu_tx_request_active_ext(ni, tap->txa_tid, 0);
380		return (0);
381	}
382	RSU_UNLOCK(sc);
383
384	/* Mark success; we don't get any further notifications */
385	(void) ieee80211_ampdu_tx_request_active_ext(ni, tap->txa_tid, 1);
386#endif
387	/* Return 0, we're driving this ourselves */
388	return (0);
389}
390
391static int
392rsu_wme_update(struct ieee80211com *ic)
393{
394
395	/* Firmware handles this; not our problem */
396	return (0);
397}
398
399static int
400rsu_attach(device_t self)
401{
402	struct usb_attach_arg *uaa = device_get_ivars(self);
403	struct rsu_softc *sc = device_get_softc(self);
404	struct ieee80211com *ic = &sc->sc_ic;
405	int error;
406	uint8_t iface_index;
407	struct usb_interface *iface;
408	const char *rft;
409
410	device_set_usb_desc(self);
411	sc->sc_udev = uaa->device;
412	sc->sc_dev = self;
413	if (rsu_enable_11n)
414		sc->sc_ht = !! (USB_GET_DRIVER_INFO(uaa) & RSU_HT_SUPPORTED);
415
416	/* Get number of endpoints */
417	iface = usbd_get_iface(sc->sc_udev, 0);
418	sc->sc_nendpoints = iface->idesc->bNumEndpoints;
419
420	/* Endpoints are hard-coded for now, so enforce 4-endpoint only */
421	if (sc->sc_nendpoints != 4) {
422		device_printf(sc->sc_dev,
423		    "the driver currently only supports 4-endpoint devices\n");
424		return (ENXIO);
425	}
426
427	mtx_init(&sc->sc_mtx, device_get_nameunit(self), MTX_NETWORK_LOCK,
428	    MTX_DEF);
429	TIMEOUT_TASK_INIT(taskqueue_thread, &sc->calib_task, 0,
430	    rsu_calib_task, sc);
431	TASK_INIT(&sc->tx_task, 0, rsu_tx_task, sc);
432	mbufq_init(&sc->sc_snd, ifqmaxlen);
433
434	/* Allocate Tx/Rx buffers. */
435	error = rsu_alloc_rx_list(sc);
436	if (error != 0) {
437		device_printf(sc->sc_dev, "could not allocate Rx buffers\n");
438		goto fail_usb;
439	}
440
441	error = rsu_alloc_tx_list(sc);
442	if (error != 0) {
443		device_printf(sc->sc_dev, "could not allocate Tx buffers\n");
444		rsu_free_rx_list(sc);
445		goto fail_usb;
446	}
447
448	iface_index = 0;
449	error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer,
450	    rsu_config, RSU_N_TRANSFER, sc, &sc->sc_mtx);
451	if (error) {
452		device_printf(sc->sc_dev,
453		    "could not allocate USB transfers, err=%s\n",
454		    usbd_errstr(error));
455		goto fail_usb;
456	}
457	RSU_LOCK(sc);
458	/* Read chip revision. */
459	sc->cut = MS(rsu_read_4(sc, R92S_PMC_FSM), R92S_PMC_FSM_CUT);
460	if (sc->cut != 3)
461		sc->cut = (sc->cut >> 1) + 1;
462	error = rsu_read_rom(sc);
463	RSU_UNLOCK(sc);
464	if (error != 0) {
465		device_printf(self, "could not read ROM\n");
466		goto fail_rom;
467	}
468
469	/* Figure out TX/RX streams */
470	switch (sc->rom[84]) {
471	case 0x0:
472		sc->sc_rftype = RTL8712_RFCONFIG_1T1R;
473		sc->sc_nrxstream = 1;
474		sc->sc_ntxstream = 1;
475		rft = "1T1R";
476		break;
477	case 0x1:
478		sc->sc_rftype = RTL8712_RFCONFIG_1T2R;
479		sc->sc_nrxstream = 2;
480		sc->sc_ntxstream = 1;
481		rft = "1T2R";
482		break;
483	case 0x2:
484		sc->sc_rftype = RTL8712_RFCONFIG_2T2R;
485		sc->sc_nrxstream = 2;
486		sc->sc_ntxstream = 2;
487		rft = "2T2R";
488		break;
489	case 0x3:	/* "green" NIC */
490		sc->sc_rftype = RTL8712_RFCONFIG_1T2R;
491		sc->sc_nrxstream = 2;
492		sc->sc_ntxstream = 1;
493		rft = "1T2R ('green')";
494		break;
495	default:
496		device_printf(sc->sc_dev,
497		    "%s: unknown board type (rfconfig=0x%02x)\n",
498		    __func__,
499		    sc->rom[84]);
500		goto fail_rom;
501	}
502
503	IEEE80211_ADDR_COPY(ic->ic_macaddr, &sc->rom[0x12]);
504	device_printf(self, "MAC/BB RTL8712 cut %d %s\n", sc->cut, rft);
505
506	ic->ic_softc = sc;
507	ic->ic_name = device_get_nameunit(self);
508	ic->ic_phytype = IEEE80211_T_OFDM;	/* Not only, but not used. */
509	ic->ic_opmode = IEEE80211_M_STA;	/* Default to BSS mode. */
510
511	/* Set device capabilities. */
512	ic->ic_caps =
513	    IEEE80211_C_STA |		/* station mode */
514#if 0
515	    IEEE80211_C_BGSCAN |	/* Background scan. */
516#endif
517	    IEEE80211_C_SHPREAMBLE |	/* Short preamble supported. */
518	    IEEE80211_C_WME |		/* WME/QoS */
519	    IEEE80211_C_SHSLOT |	/* Short slot time supported. */
520	    IEEE80211_C_WPA;		/* WPA/RSN. */
521
522	/* Check if HT support is present. */
523	if (sc->sc_ht) {
524		device_printf(sc->sc_dev, "%s: enabling 11n\n", __func__);
525
526		/* Enable basic HT */
527		ic->ic_htcaps = IEEE80211_HTC_HT |
528#if 0
529		    IEEE80211_HTC_AMPDU |
530#endif
531		    IEEE80211_HTC_AMSDU |
532		    IEEE80211_HTCAP_MAXAMSDU_3839 |
533		    IEEE80211_HTCAP_SMPS_OFF;
534		ic->ic_htcaps |= IEEE80211_HTCAP_CHWIDTH40;
535
536		/* set number of spatial streams */
537		ic->ic_txstream = sc->sc_ntxstream;
538		ic->ic_rxstream = sc->sc_nrxstream;
539	}
540
541	rsu_getradiocaps(ic, IEEE80211_CHAN_MAX, &ic->ic_nchans,
542	    ic->ic_channels);
543
544	ieee80211_ifattach(ic);
545	ic->ic_raw_xmit = rsu_raw_xmit;
546	ic->ic_scan_start = rsu_scan_start;
547	ic->ic_scan_end = rsu_scan_end;
548	ic->ic_getradiocaps = rsu_getradiocaps;
549	ic->ic_set_channel = rsu_set_channel;
550	ic->ic_vap_create = rsu_vap_create;
551	ic->ic_vap_delete = rsu_vap_delete;
552	ic->ic_update_mcast = rsu_update_mcast;
553	ic->ic_parent = rsu_parent;
554	ic->ic_transmit = rsu_transmit;
555	ic->ic_send_mgmt = rsu_send_mgmt;
556	ic->ic_update_chw = rsu_update_chw;
557	ic->ic_ampdu_enable = rsu_ampdu_enable;
558	ic->ic_wme.wme_update = rsu_wme_update;
559
560	ieee80211_radiotap_attach(ic, &sc->sc_txtap.wt_ihdr,
561	    sizeof(sc->sc_txtap), RSU_TX_RADIOTAP_PRESENT,
562	    &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
563	    RSU_RX_RADIOTAP_PRESENT);
564
565	if (bootverbose)
566		ieee80211_announce(ic);
567
568	return (0);
569
570fail_rom:
571	usbd_transfer_unsetup(sc->sc_xfer, RSU_N_TRANSFER);
572fail_usb:
573	mtx_destroy(&sc->sc_mtx);
574	return (ENXIO);
575}
576
577static int
578rsu_detach(device_t self)
579{
580	struct rsu_softc *sc = device_get_softc(self);
581	struct ieee80211com *ic = &sc->sc_ic;
582
583	RSU_LOCK(sc);
584	rsu_stop(sc);
585	RSU_UNLOCK(sc);
586
587	usbd_transfer_unsetup(sc->sc_xfer, RSU_N_TRANSFER);
588
589	/*
590	 * Free buffers /before/ we detach from net80211, else node
591	 * references to destroyed vaps will lead to a panic.
592	 */
593	/* Free Tx/Rx buffers. */
594	RSU_LOCK(sc);
595	rsu_free_tx_list(sc);
596	rsu_free_rx_list(sc);
597	RSU_UNLOCK(sc);
598
599	/* Frames are freed; detach from net80211 */
600	ieee80211_ifdetach(ic);
601
602	taskqueue_drain_timeout(taskqueue_thread, &sc->calib_task);
603	taskqueue_drain(taskqueue_thread, &sc->tx_task);
604
605	mtx_destroy(&sc->sc_mtx);
606
607	return (0);
608}
609
610static usb_error_t
611rsu_do_request(struct rsu_softc *sc, struct usb_device_request *req,
612    void *data)
613{
614	usb_error_t err;
615	int ntries = 10;
616
617	RSU_ASSERT_LOCKED(sc);
618
619	while (ntries--) {
620		err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx,
621		    req, data, 0, NULL, 250 /* ms */);
622		if (err == 0 || err == USB_ERR_NOT_CONFIGURED)
623			break;
624		DPRINTFN(1, "Control request failed, %s (retrying)\n",
625		    usbd_errstr(err));
626		rsu_ms_delay(sc, 10);
627        }
628
629        return (err);
630}
631
632static struct ieee80211vap *
633rsu_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
634    enum ieee80211_opmode opmode, int flags,
635    const uint8_t bssid[IEEE80211_ADDR_LEN],
636    const uint8_t mac[IEEE80211_ADDR_LEN])
637{
638	struct rsu_vap *uvp;
639	struct ieee80211vap *vap;
640
641	if (!TAILQ_EMPTY(&ic->ic_vaps))         /* only one at a time */
642		return (NULL);
643
644	uvp =  malloc(sizeof(struct rsu_vap), M_80211_VAP, M_WAITOK | M_ZERO);
645	vap = &uvp->vap;
646
647	if (ieee80211_vap_setup(ic, vap, name, unit, opmode,
648	    flags, bssid) != 0) {
649		/* out of memory */
650		free(uvp, M_80211_VAP);
651		return (NULL);
652	}
653
654	/* override state transition machine */
655	uvp->newstate = vap->iv_newstate;
656	vap->iv_newstate = rsu_newstate;
657
658	/* Limits from the r92su driver */
659	vap->iv_ampdu_density = IEEE80211_HTCAP_MPDUDENSITY_16;
660	vap->iv_ampdu_rxmax = IEEE80211_HTCAP_MAXRXAMPDU_32K;
661
662	/* complete setup */
663	ieee80211_vap_attach(vap, ieee80211_media_change,
664	    ieee80211_media_status, mac);
665	ic->ic_opmode = opmode;
666
667	return (vap);
668}
669
670static void
671rsu_vap_delete(struct ieee80211vap *vap)
672{
673	struct rsu_vap *uvp = RSU_VAP(vap);
674
675	ieee80211_vap_detach(vap);
676	free(uvp, M_80211_VAP);
677}
678
679static void
680rsu_scan_start(struct ieee80211com *ic)
681{
682	struct rsu_softc *sc = ic->ic_softc;
683	int error;
684
685	/* Scanning is done by the firmware. */
686	RSU_LOCK(sc);
687	/* XXX TODO: force awake if in in network-sleep? */
688	error = rsu_site_survey(sc, TAILQ_FIRST(&ic->ic_vaps));
689	RSU_UNLOCK(sc);
690	if (error != 0)
691		device_printf(sc->sc_dev,
692		    "could not send site survey command\n");
693}
694
695static void
696rsu_scan_end(struct ieee80211com *ic)
697{
698	/* Nothing to do here. */
699}
700
701static void
702rsu_getradiocaps(struct ieee80211com *ic,
703    int maxchans, int *nchans, struct ieee80211_channel chans[])
704{
705	struct rsu_softc *sc = ic->ic_softc;
706	uint8_t bands[IEEE80211_MODE_BYTES];
707
708	/* Set supported .11b and .11g rates. */
709	memset(bands, 0, sizeof(bands));
710	setbit(bands, IEEE80211_MODE_11B);
711	setbit(bands, IEEE80211_MODE_11G);
712	if (sc->sc_ht)
713		setbit(bands, IEEE80211_MODE_11NG);
714	ieee80211_add_channels_default_2ghz(chans, maxchans, nchans,
715	    bands, (ic->ic_htcaps & IEEE80211_HTCAP_CHWIDTH40) != 0);
716}
717
718static void
719rsu_set_channel(struct ieee80211com *ic __unused)
720{
721	/* We are unable to switch channels, yet. */
722}
723
724static void
725rsu_update_mcast(struct ieee80211com *ic)
726{
727        /* XXX do nothing?  */
728}
729
730static int
731rsu_alloc_list(struct rsu_softc *sc, struct rsu_data data[],
732    int ndata, int maxsz)
733{
734	int i, error;
735
736	for (i = 0; i < ndata; i++) {
737		struct rsu_data *dp = &data[i];
738		dp->sc = sc;
739		dp->m = NULL;
740		dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT);
741		if (dp->buf == NULL) {
742			device_printf(sc->sc_dev,
743			    "could not allocate buffer\n");
744			error = ENOMEM;
745			goto fail;
746		}
747		dp->ni = NULL;
748	}
749
750	return (0);
751fail:
752	rsu_free_list(sc, data, ndata);
753	return (error);
754}
755
756static int
757rsu_alloc_rx_list(struct rsu_softc *sc)
758{
759        int error, i;
760
761	error = rsu_alloc_list(sc, sc->sc_rx, RSU_RX_LIST_COUNT,
762	    RSU_RXBUFSZ);
763	if (error != 0)
764		return (error);
765
766	STAILQ_INIT(&sc->sc_rx_active);
767	STAILQ_INIT(&sc->sc_rx_inactive);
768
769	for (i = 0; i < RSU_RX_LIST_COUNT; i++)
770		STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next);
771
772	return (0);
773}
774
775static int
776rsu_alloc_tx_list(struct rsu_softc *sc)
777{
778	int error, i;
779
780	error = rsu_alloc_list(sc, sc->sc_tx, RSU_TX_LIST_COUNT,
781	    RSU_TXBUFSZ);
782	if (error != 0)
783		return (error);
784
785	STAILQ_INIT(&sc->sc_tx_inactive);
786
787	for (i = 0; i != RSU_N_TRANSFER; i++) {
788		STAILQ_INIT(&sc->sc_tx_active[i]);
789		STAILQ_INIT(&sc->sc_tx_pending[i]);
790	}
791
792	for (i = 0; i < RSU_TX_LIST_COUNT; i++) {
793		STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], next);
794	}
795
796	return (0);
797}
798
799static void
800rsu_free_tx_list(struct rsu_softc *sc)
801{
802	int i;
803
804	/* prevent further allocations from TX list(s) */
805	STAILQ_INIT(&sc->sc_tx_inactive);
806
807	for (i = 0; i != RSU_N_TRANSFER; i++) {
808		STAILQ_INIT(&sc->sc_tx_active[i]);
809		STAILQ_INIT(&sc->sc_tx_pending[i]);
810	}
811
812	rsu_free_list(sc, sc->sc_tx, RSU_TX_LIST_COUNT);
813}
814
815static void
816rsu_free_rx_list(struct rsu_softc *sc)
817{
818	/* prevent further allocations from RX list(s) */
819	STAILQ_INIT(&sc->sc_rx_inactive);
820	STAILQ_INIT(&sc->sc_rx_active);
821
822	rsu_free_list(sc, sc->sc_rx, RSU_RX_LIST_COUNT);
823}
824
825static void
826rsu_free_list(struct rsu_softc *sc, struct rsu_data data[], int ndata)
827{
828	int i;
829
830	for (i = 0; i < ndata; i++) {
831		struct rsu_data *dp = &data[i];
832
833		if (dp->buf != NULL) {
834			free(dp->buf, M_USBDEV);
835			dp->buf = NULL;
836		}
837		if (dp->ni != NULL) {
838			ieee80211_free_node(dp->ni);
839			dp->ni = NULL;
840		}
841	}
842}
843
844static struct rsu_data *
845_rsu_getbuf(struct rsu_softc *sc)
846{
847	struct rsu_data *bf;
848
849	bf = STAILQ_FIRST(&sc->sc_tx_inactive);
850	if (bf != NULL)
851		STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next);
852	else
853		bf = NULL;
854	return (bf);
855}
856
857static struct rsu_data *
858rsu_getbuf(struct rsu_softc *sc)
859{
860	struct rsu_data *bf;
861
862	RSU_ASSERT_LOCKED(sc);
863
864	bf = _rsu_getbuf(sc);
865	if (bf == NULL) {
866		RSU_DPRINTF(sc, RSU_DEBUG_TX, "%s: no buffers\n", __func__);
867	}
868	return (bf);
869}
870
871static void
872rsu_freebuf(struct rsu_softc *sc, struct rsu_data *bf)
873{
874
875	RSU_ASSERT_LOCKED(sc);
876	STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, bf, next);
877}
878
879static int
880rsu_write_region_1(struct rsu_softc *sc, uint16_t addr, uint8_t *buf,
881    int len)
882{
883	usb_device_request_t req;
884
885	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
886	req.bRequest = R92S_REQ_REGS;
887	USETW(req.wValue, addr);
888	USETW(req.wIndex, 0);
889	USETW(req.wLength, len);
890
891	return (rsu_do_request(sc, &req, buf));
892}
893
894static void
895rsu_write_1(struct rsu_softc *sc, uint16_t addr, uint8_t val)
896{
897	rsu_write_region_1(sc, addr, &val, 1);
898}
899
900static void
901rsu_write_2(struct rsu_softc *sc, uint16_t addr, uint16_t val)
902{
903	val = htole16(val);
904	rsu_write_region_1(sc, addr, (uint8_t *)&val, 2);
905}
906
907static void
908rsu_write_4(struct rsu_softc *sc, uint16_t addr, uint32_t val)
909{
910	val = htole32(val);
911	rsu_write_region_1(sc, addr, (uint8_t *)&val, 4);
912}
913
914static int
915rsu_read_region_1(struct rsu_softc *sc, uint16_t addr, uint8_t *buf,
916    int len)
917{
918	usb_device_request_t req;
919
920	req.bmRequestType = UT_READ_VENDOR_DEVICE;
921	req.bRequest = R92S_REQ_REGS;
922	USETW(req.wValue, addr);
923	USETW(req.wIndex, 0);
924	USETW(req.wLength, len);
925
926	return (rsu_do_request(sc, &req, buf));
927}
928
929static uint8_t
930rsu_read_1(struct rsu_softc *sc, uint16_t addr)
931{
932	uint8_t val;
933
934	if (rsu_read_region_1(sc, addr, &val, 1) != 0)
935		return (0xff);
936	return (val);
937}
938
939static uint16_t
940rsu_read_2(struct rsu_softc *sc, uint16_t addr)
941{
942	uint16_t val;
943
944	if (rsu_read_region_1(sc, addr, (uint8_t *)&val, 2) != 0)
945		return (0xffff);
946	return (le16toh(val));
947}
948
949static uint32_t
950rsu_read_4(struct rsu_softc *sc, uint16_t addr)
951{
952	uint32_t val;
953
954	if (rsu_read_region_1(sc, addr, (uint8_t *)&val, 4) != 0)
955		return (0xffffffff);
956	return (le32toh(val));
957}
958
959static int
960rsu_fw_iocmd(struct rsu_softc *sc, uint32_t iocmd)
961{
962	int ntries;
963
964	rsu_write_4(sc, R92S_IOCMD_CTRL, iocmd);
965	rsu_ms_delay(sc, 1);
966	for (ntries = 0; ntries < 50; ntries++) {
967		if (rsu_read_4(sc, R92S_IOCMD_CTRL) == 0)
968			return (0);
969		rsu_ms_delay(sc, 1);
970	}
971	return (ETIMEDOUT);
972}
973
974static uint8_t
975rsu_efuse_read_1(struct rsu_softc *sc, uint16_t addr)
976{
977	uint32_t reg;
978	int ntries;
979
980	reg = rsu_read_4(sc, R92S_EFUSE_CTRL);
981	reg = RW(reg, R92S_EFUSE_CTRL_ADDR, addr);
982	reg &= ~R92S_EFUSE_CTRL_VALID;
983	rsu_write_4(sc, R92S_EFUSE_CTRL, reg);
984	/* Wait for read operation to complete. */
985	for (ntries = 0; ntries < 100; ntries++) {
986		reg = rsu_read_4(sc, R92S_EFUSE_CTRL);
987		if (reg & R92S_EFUSE_CTRL_VALID)
988			return (MS(reg, R92S_EFUSE_CTRL_DATA));
989		rsu_ms_delay(sc, 1);
990	}
991	device_printf(sc->sc_dev,
992	    "could not read efuse byte at address 0x%x\n", addr);
993	return (0xff);
994}
995
996static int
997rsu_read_rom(struct rsu_softc *sc)
998{
999	uint8_t *rom = sc->rom;
1000	uint16_t addr = 0;
1001	uint32_t reg;
1002	uint8_t off, msk;
1003	int i;
1004
1005	/* Make sure that ROM type is eFuse and that autoload succeeded. */
1006	reg = rsu_read_1(sc, R92S_EE_9346CR);
1007	if ((reg & (R92S_9356SEL | R92S_EEPROM_EN)) != R92S_EEPROM_EN)
1008		return (EIO);
1009
1010	/* Turn on 2.5V to prevent eFuse leakage. */
1011	reg = rsu_read_1(sc, R92S_EFUSE_TEST + 3);
1012	rsu_write_1(sc, R92S_EFUSE_TEST + 3, reg | 0x80);
1013	rsu_ms_delay(sc, 1);
1014	rsu_write_1(sc, R92S_EFUSE_TEST + 3, reg & ~0x80);
1015
1016	/* Read full ROM image. */
1017	memset(&sc->rom, 0xff, sizeof(sc->rom));
1018	while (addr < 512) {
1019		reg = rsu_efuse_read_1(sc, addr);
1020		if (reg == 0xff)
1021			break;
1022		addr++;
1023		off = reg >> 4;
1024		msk = reg & 0xf;
1025		for (i = 0; i < 4; i++) {
1026			if (msk & (1 << i))
1027				continue;
1028			rom[off * 8 + i * 2 + 0] =
1029			    rsu_efuse_read_1(sc, addr);
1030			addr++;
1031			rom[off * 8 + i * 2 + 1] =
1032			    rsu_efuse_read_1(sc, addr);
1033			addr++;
1034		}
1035	}
1036#ifdef USB_DEBUG
1037	if (rsu_debug >= 5) {
1038		/* Dump ROM content. */
1039		printf("\n");
1040		for (i = 0; i < sizeof(sc->rom); i++)
1041			printf("%02x:", rom[i]);
1042		printf("\n");
1043	}
1044#endif
1045	return (0);
1046}
1047
1048static int
1049rsu_fw_cmd(struct rsu_softc *sc, uint8_t code, void *buf, int len)
1050{
1051	const uint8_t which = RSU_H2C_ENDPOINT;
1052	struct rsu_data *data;
1053	struct r92s_tx_desc *txd;
1054	struct r92s_fw_cmd_hdr *cmd;
1055	int cmdsz;
1056	int xferlen;
1057
1058	RSU_ASSERT_LOCKED(sc);
1059
1060	data = rsu_getbuf(sc);
1061	if (data == NULL)
1062		return (ENOMEM);
1063
1064	/* Blank the entire payload, just to be safe */
1065	memset(data->buf, '\0', RSU_TXBUFSZ);
1066
1067	/* Round-up command length to a multiple of 8 bytes. */
1068	/* XXX TODO: is this required? */
1069	cmdsz = (len + 7) & ~7;
1070
1071	xferlen = sizeof(*txd) + sizeof(*cmd) + cmdsz;
1072	KASSERT(xferlen <= RSU_TXBUFSZ, ("%s: invalid length", __func__));
1073	memset(data->buf, 0, xferlen);
1074
1075	/* Setup Tx descriptor. */
1076	txd = (struct r92s_tx_desc *)data->buf;
1077	txd->txdw0 = htole32(
1078	    SM(R92S_TXDW0_OFFSET, sizeof(*txd)) |
1079	    SM(R92S_TXDW0_PKTLEN, sizeof(*cmd) + cmdsz) |
1080	    R92S_TXDW0_OWN | R92S_TXDW0_FSG | R92S_TXDW0_LSG);
1081	txd->txdw1 = htole32(SM(R92S_TXDW1_QSEL, R92S_TXDW1_QSEL_H2C));
1082
1083	/* Setup command header. */
1084	cmd = (struct r92s_fw_cmd_hdr *)&txd[1];
1085	cmd->len = htole16(cmdsz);
1086	cmd->code = code;
1087	cmd->seq = sc->cmd_seq;
1088	sc->cmd_seq = (sc->cmd_seq + 1) & 0x7f;
1089
1090	/* Copy command payload. */
1091	memcpy(&cmd[1], buf, len);
1092
1093	RSU_DPRINTF(sc, RSU_DEBUG_TX | RSU_DEBUG_FWCMD,
1094	    "%s: Tx cmd code=0x%x len=0x%x\n",
1095	    __func__, code, cmdsz);
1096	data->buflen = xferlen;
1097	STAILQ_INSERT_TAIL(&sc->sc_tx_pending[which], data, next);
1098	usbd_transfer_start(sc->sc_xfer[which]);
1099
1100	return (0);
1101}
1102
1103/* ARGSUSED */
1104static void
1105rsu_calib_task(void *arg, int pending __unused)
1106{
1107	struct rsu_softc *sc = arg;
1108#ifdef notyet
1109	uint32_t reg;
1110#endif
1111
1112	RSU_DPRINTF(sc, RSU_DEBUG_CALIB, "%s: running calibration task\n",
1113	    __func__);
1114
1115	RSU_LOCK(sc);
1116#ifdef notyet
1117	/* Read WPS PBC status. */
1118	rsu_write_1(sc, R92S_MAC_PINMUX_CTRL,
1119	    R92S_GPIOMUX_EN | SM(R92S_GPIOSEL_GPIO, R92S_GPIOSEL_GPIO_JTAG));
1120	rsu_write_1(sc, R92S_GPIO_IO_SEL,
1121	    rsu_read_1(sc, R92S_GPIO_IO_SEL) & ~R92S_GPIO_WPS);
1122	reg = rsu_read_1(sc, R92S_GPIO_CTRL);
1123	if (reg != 0xff && (reg & R92S_GPIO_WPS))
1124		DPRINTF(("WPS PBC is pushed\n"));
1125#endif
1126	/* Read current signal level. */
1127	if (rsu_fw_iocmd(sc, 0xf4000001) == 0) {
1128		sc->sc_currssi = rsu_read_4(sc, R92S_IOCMD_DATA);
1129		RSU_DPRINTF(sc, RSU_DEBUG_CALIB, "%s: RSSI=%d (%d)\n",
1130		    __func__, sc->sc_currssi,
1131		    rsu_hwrssi_to_rssi(sc, sc->sc_currssi));
1132	}
1133	if (sc->sc_calibrating)
1134		taskqueue_enqueue_timeout(taskqueue_thread, &sc->calib_task, hz);
1135	RSU_UNLOCK(sc);
1136}
1137
1138static void
1139rsu_tx_task(void *arg, int pending __unused)
1140{
1141	struct rsu_softc *sc = arg;
1142
1143	RSU_LOCK(sc);
1144	_rsu_start(sc);
1145	RSU_UNLOCK(sc);
1146}
1147
1148#define	RSU_PWR_UNKNOWN		0x0
1149#define	RSU_PWR_ACTIVE		0x1
1150#define	RSU_PWR_OFF		0x2
1151#define	RSU_PWR_SLEEP		0x3
1152
1153/*
1154 * Set the current power state.
1155 *
1156 * The rtlwifi code doesn't do this so aggressively; it
1157 * waits for an idle period after association with
1158 * no traffic before doing this.
1159 *
1160 * For now - it's on in all states except RUN, and
1161 * in RUN it'll transition to allow sleep.
1162 */
1163
1164struct r92s_pwr_cmd {
1165	uint8_t mode;
1166	uint8_t smart_ps;
1167	uint8_t bcn_pass_time;
1168};
1169
1170static int
1171rsu_set_fw_power_state(struct rsu_softc *sc, int state)
1172{
1173	struct r92s_set_pwr_mode cmd;
1174	//struct r92s_pwr_cmd cmd;
1175	int error;
1176
1177	RSU_ASSERT_LOCKED(sc);
1178
1179	/* only change state if required */
1180	if (sc->sc_curpwrstate == state)
1181		return (0);
1182
1183	memset(&cmd, 0, sizeof(cmd));
1184
1185	switch (state) {
1186	case RSU_PWR_ACTIVE:
1187		/* Force the hardware awake */
1188		rsu_write_1(sc, R92S_USB_HRPWM,
1189		    R92S_USB_HRPWM_PS_ST_ACTIVE | R92S_USB_HRPWM_PS_ALL_ON);
1190		cmd.mode = R92S_PS_MODE_ACTIVE;
1191		break;
1192	case RSU_PWR_SLEEP:
1193		cmd.mode = R92S_PS_MODE_DTIM;	/* XXX configurable? */
1194		cmd.smart_ps = 1; /* XXX 2 if doing p2p */
1195		cmd.bcn_pass_time = 5; /* in 100mS usb.c, linux/rtlwifi */
1196		break;
1197	case RSU_PWR_OFF:
1198		cmd.mode = R92S_PS_MODE_RADIOOFF;
1199		break;
1200	default:
1201		device_printf(sc->sc_dev, "%s: unknown ps mode (%d)\n",
1202		    __func__,
1203		    state);
1204		return (ENXIO);
1205	}
1206
1207	RSU_DPRINTF(sc, RSU_DEBUG_RESET,
1208	    "%s: setting ps mode to %d (mode %d)\n",
1209	    __func__, state, cmd.mode);
1210	error = rsu_fw_cmd(sc, R92S_CMD_SET_PWR_MODE, &cmd, sizeof(cmd));
1211	if (error == 0)
1212		sc->sc_curpwrstate = state;
1213
1214	return (error);
1215}
1216
1217static int
1218rsu_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
1219{
1220	struct rsu_vap *uvp = RSU_VAP(vap);
1221	struct ieee80211com *ic = vap->iv_ic;
1222	struct rsu_softc *sc = ic->ic_softc;
1223	struct ieee80211_node *ni;
1224	struct ieee80211_rateset *rs;
1225	enum ieee80211_state ostate;
1226	int error, startcal = 0;
1227
1228	ostate = vap->iv_state;
1229	RSU_DPRINTF(sc, RSU_DEBUG_STATE, "%s: %s -> %s\n",
1230	    __func__,
1231	    ieee80211_state_name[ostate],
1232	    ieee80211_state_name[nstate]);
1233
1234	IEEE80211_UNLOCK(ic);
1235	if (ostate == IEEE80211_S_RUN) {
1236		RSU_LOCK(sc);
1237		/* Stop calibration. */
1238		sc->sc_calibrating = 0;
1239		RSU_UNLOCK(sc);
1240		taskqueue_drain_timeout(taskqueue_thread, &sc->calib_task);
1241		taskqueue_drain(taskqueue_thread, &sc->tx_task);
1242		/* Disassociate from our current BSS. */
1243		RSU_LOCK(sc);
1244		rsu_disconnect(sc);
1245	} else
1246		RSU_LOCK(sc);
1247	switch (nstate) {
1248	case IEEE80211_S_INIT:
1249		(void) rsu_set_fw_power_state(sc, RSU_PWR_ACTIVE);
1250		break;
1251	case IEEE80211_S_AUTH:
1252		ni = ieee80211_ref_node(vap->iv_bss);
1253		(void) rsu_set_fw_power_state(sc, RSU_PWR_ACTIVE);
1254		error = rsu_join_bss(sc, ni);
1255		ieee80211_free_node(ni);
1256		if (error != 0) {
1257			device_printf(sc->sc_dev,
1258			    "could not send join command\n");
1259		}
1260		break;
1261	case IEEE80211_S_RUN:
1262		ni = ieee80211_ref_node(vap->iv_bss);
1263		rs = &ni->ni_rates;
1264		/* Indicate highest supported rate. */
1265		ni->ni_txrate = rs->rs_rates[rs->rs_nrates - 1];
1266		(void) rsu_set_fw_power_state(sc, RSU_PWR_SLEEP);
1267		ieee80211_free_node(ni);
1268		startcal = 1;
1269		break;
1270	default:
1271		break;
1272	}
1273	if (startcal != 0) {
1274		sc->sc_calibrating = 1;
1275		/* Start periodic calibration. */
1276		taskqueue_enqueue_timeout(taskqueue_thread, &sc->calib_task,
1277		    hz);
1278	}
1279	RSU_UNLOCK(sc);
1280	IEEE80211_LOCK(ic);
1281	return (uvp->newstate(vap, nstate, arg));
1282}
1283
1284#ifdef notyet
1285static void
1286rsu_set_key(struct rsu_softc *sc, const struct ieee80211_key *k)
1287{
1288	struct r92s_fw_cmd_set_key key;
1289
1290	memset(&key, 0, sizeof(key));
1291	/* Map net80211 cipher to HW crypto algorithm. */
1292	switch (k->wk_cipher->ic_cipher) {
1293	case IEEE80211_CIPHER_WEP:
1294		if (k->wk_keylen < 8)
1295			key.algo = R92S_KEY_ALGO_WEP40;
1296		else
1297			key.algo = R92S_KEY_ALGO_WEP104;
1298		break;
1299	case IEEE80211_CIPHER_TKIP:
1300		key.algo = R92S_KEY_ALGO_TKIP;
1301		break;
1302	case IEEE80211_CIPHER_AES_CCM:
1303		key.algo = R92S_KEY_ALGO_AES;
1304		break;
1305	default:
1306		return;
1307	}
1308	key.id = k->wk_keyix;
1309	key.grpkey = (k->wk_flags & IEEE80211_KEY_GROUP) != 0;
1310	memcpy(key.key, k->wk_key, MIN(k->wk_keylen, sizeof(key.key)));
1311	(void)rsu_fw_cmd(sc, R92S_CMD_SET_KEY, &key, sizeof(key));
1312}
1313
1314static void
1315rsu_delete_key(struct rsu_softc *sc, const struct ieee80211_key *k)
1316{
1317	struct r92s_fw_cmd_set_key key;
1318
1319	memset(&key, 0, sizeof(key));
1320	key.id = k->wk_keyix;
1321	(void)rsu_fw_cmd(sc, R92S_CMD_SET_KEY, &key, sizeof(key));
1322}
1323#endif
1324
1325static int
1326rsu_site_survey(struct rsu_softc *sc, struct ieee80211vap *vap)
1327{
1328	struct r92s_fw_cmd_sitesurvey cmd;
1329	struct ieee80211com *ic = &sc->sc_ic;
1330	int r;
1331
1332	RSU_ASSERT_LOCKED(sc);
1333
1334	memset(&cmd, 0, sizeof(cmd));
1335	if ((ic->ic_flags & IEEE80211_F_ASCAN) || sc->sc_scan_pass == 1)
1336		cmd.active = htole32(1);
1337	cmd.limit = htole32(48);
1338	if (sc->sc_scan_pass == 1 && vap->iv_des_nssid > 0) {
1339		/* Do a directed scan for second pass. */
1340		cmd.ssidlen = htole32(vap->iv_des_ssid[0].len);
1341		memcpy(cmd.ssid, vap->iv_des_ssid[0].ssid,
1342		    vap->iv_des_ssid[0].len);
1343
1344	}
1345	DPRINTF("sending site survey command, pass=%d\n", sc->sc_scan_pass);
1346	r = rsu_fw_cmd(sc, R92S_CMD_SITE_SURVEY, &cmd, sizeof(cmd));
1347	if (r == 0) {
1348		sc->sc_scanning = 1;
1349	}
1350	return (r);
1351}
1352
1353static int
1354rsu_join_bss(struct rsu_softc *sc, struct ieee80211_node *ni)
1355{
1356	struct ieee80211com *ic = &sc->sc_ic;
1357	struct ieee80211vap *vap = ni->ni_vap;
1358	struct ndis_wlan_bssid_ex *bss;
1359	struct ndis_802_11_fixed_ies *fixed;
1360	struct r92s_fw_cmd_auth auth;
1361	uint8_t buf[sizeof(*bss) + 128] __aligned(4);
1362	uint8_t *frm;
1363	uint8_t opmode;
1364	int error;
1365	int cnt;
1366	char *msg = "rsujoin";
1367
1368	RSU_ASSERT_LOCKED(sc);
1369
1370	/*
1371	 * Until net80211 scanning doesn't automatically finish
1372	 * before we tell it to, let's just wait until any pending
1373	 * scan is done.
1374	 *
1375	 * XXX TODO: yes, this releases and re-acquires the lock.
1376	 * We should re-verify the state whenever we re-attempt this!
1377	 */
1378	cnt = 0;
1379	while (sc->sc_scanning && cnt < 10) {
1380		device_printf(sc->sc_dev,
1381		    "%s: still scanning! (attempt %d)\n",
1382		    __func__, cnt);
1383		msleep(msg, &sc->sc_mtx, 0, msg, hz / 2);
1384		cnt++;
1385	}
1386
1387	/* Let the FW decide the opmode based on the capinfo field. */
1388	opmode = NDIS802_11AUTOUNKNOWN;
1389	RSU_DPRINTF(sc, RSU_DEBUG_RESET,
1390	    "%s: setting operating mode to %d\n",
1391	    __func__, opmode);
1392	error = rsu_fw_cmd(sc, R92S_CMD_SET_OPMODE, &opmode, sizeof(opmode));
1393	if (error != 0)
1394		return (error);
1395
1396	memset(&auth, 0, sizeof(auth));
1397	if (vap->iv_flags & IEEE80211_F_WPA) {
1398		auth.mode = R92S_AUTHMODE_WPA;
1399		auth.dot1x = (ni->ni_authmode == IEEE80211_AUTH_8021X);
1400	} else
1401		auth.mode = R92S_AUTHMODE_OPEN;
1402	RSU_DPRINTF(sc, RSU_DEBUG_RESET,
1403	    "%s: setting auth mode to %d\n",
1404	    __func__, auth.mode);
1405	error = rsu_fw_cmd(sc, R92S_CMD_SET_AUTH, &auth, sizeof(auth));
1406	if (error != 0)
1407		return (error);
1408
1409	memset(buf, 0, sizeof(buf));
1410	bss = (struct ndis_wlan_bssid_ex *)buf;
1411	IEEE80211_ADDR_COPY(bss->macaddr, ni->ni_bssid);
1412	bss->ssid.ssidlen = htole32(ni->ni_esslen);
1413	memcpy(bss->ssid.ssid, ni->ni_essid, ni->ni_esslen);
1414	if (vap->iv_flags & (IEEE80211_F_PRIVACY | IEEE80211_F_WPA))
1415		bss->privacy = htole32(1);
1416	bss->rssi = htole32(ni->ni_avgrssi);
1417	if (ic->ic_curmode == IEEE80211_MODE_11B)
1418		bss->networktype = htole32(NDIS802_11DS);
1419	else
1420		bss->networktype = htole32(NDIS802_11OFDM24);
1421	bss->config.len = htole32(sizeof(bss->config));
1422	bss->config.bintval = htole32(ni->ni_intval);
1423	bss->config.dsconfig = htole32(ieee80211_chan2ieee(ic, ni->ni_chan));
1424	bss->inframode = htole32(NDIS802_11INFRASTRUCTURE);
1425	/* XXX verify how this is supposed to look! */
1426	memcpy(bss->supprates, ni->ni_rates.rs_rates,
1427	    ni->ni_rates.rs_nrates);
1428	/* Write the fixed fields of the beacon frame. */
1429	fixed = (struct ndis_802_11_fixed_ies *)&bss[1];
1430	memcpy(&fixed->tstamp, ni->ni_tstamp.data, 8);
1431	fixed->bintval = htole16(ni->ni_intval);
1432	fixed->capabilities = htole16(ni->ni_capinfo);
1433	/* Write IEs to be included in the association request. */
1434	frm = (uint8_t *)&fixed[1];
1435	frm = ieee80211_add_rsn(frm, vap);
1436	frm = ieee80211_add_wpa(frm, vap);
1437	frm = ieee80211_add_qos(frm, ni);
1438	if ((ic->ic_flags & IEEE80211_F_WME) &&
1439	    (ni->ni_ies.wme_ie != NULL))
1440		frm = ieee80211_add_wme_info(frm, &ic->ic_wme);
1441	if (ni->ni_flags & IEEE80211_NODE_HT) {
1442		frm = ieee80211_add_htcap(frm, ni);
1443		frm = ieee80211_add_htinfo(frm, ni);
1444	}
1445	bss->ieslen = htole32(frm - (uint8_t *)fixed);
1446	bss->len = htole32(((frm - buf) + 3) & ~3);
1447	RSU_DPRINTF(sc, RSU_DEBUG_RESET | RSU_DEBUG_FWCMD,
1448	    "%s: sending join bss command to %s chan %d\n",
1449	    __func__,
1450	    ether_sprintf(bss->macaddr), le32toh(bss->config.dsconfig));
1451	return (rsu_fw_cmd(sc, R92S_CMD_JOIN_BSS, buf, sizeof(buf)));
1452}
1453
1454static int
1455rsu_disconnect(struct rsu_softc *sc)
1456{
1457	uint32_t zero = 0;	/* :-) */
1458
1459	/* Disassociate from our current BSS. */
1460	RSU_DPRINTF(sc, RSU_DEBUG_STATE | RSU_DEBUG_FWCMD,
1461	    "%s: sending disconnect command\n", __func__);
1462	return (rsu_fw_cmd(sc, R92S_CMD_DISCONNECT, &zero, sizeof(zero)));
1463}
1464
1465/*
1466 * Map the hardware provided RSSI value to a signal level.
1467 * For the most part it's just something we divide by and cap
1468 * so it doesn't overflow the representation by net80211.
1469 */
1470static int
1471rsu_hwrssi_to_rssi(struct rsu_softc *sc, int hw_rssi)
1472{
1473	int v;
1474
1475	if (hw_rssi == 0)
1476		return (0);
1477	v = hw_rssi >> 4;
1478	if (v > 80)
1479		v = 80;
1480	return (v);
1481}
1482
1483CTASSERT(MCLBYTES > sizeof(struct ieee80211_frame));
1484
1485static void
1486rsu_event_survey(struct rsu_softc *sc, uint8_t *buf, int len)
1487{
1488	struct ieee80211com *ic = &sc->sc_ic;
1489	struct ieee80211_frame *wh;
1490	struct ndis_wlan_bssid_ex *bss;
1491	struct ieee80211_rx_stats rxs;
1492	struct mbuf *m;
1493	uint32_t ieslen;
1494	uint32_t pktlen;
1495
1496	if (__predict_false(len < sizeof(*bss)))
1497		return;
1498	bss = (struct ndis_wlan_bssid_ex *)buf;
1499	ieslen = le32toh(bss->ieslen);
1500	/* range check length of information element */
1501	if (__predict_false(ieslen > (uint32_t)(len - sizeof(*bss))))
1502		return;
1503
1504	RSU_DPRINTF(sc, RSU_DEBUG_SCAN,
1505	    "%s: found BSS %s: len=%d chan=%d inframode=%d "
1506	    "networktype=%d privacy=%d, RSSI=%d\n",
1507	    __func__,
1508	    ether_sprintf(bss->macaddr), ieslen,
1509	    le32toh(bss->config.dsconfig), le32toh(bss->inframode),
1510	    le32toh(bss->networktype), le32toh(bss->privacy),
1511	    le32toh(bss->rssi));
1512
1513	/* Build a fake beacon frame to let net80211 do all the parsing. */
1514	/* XXX TODO: just call the new scan API methods! */
1515	if (__predict_false(ieslen > (size_t)(MCLBYTES - sizeof(*wh))))
1516		return;
1517	pktlen = sizeof(*wh) + ieslen;
1518	m = m_get2(pktlen, M_NOWAIT, MT_DATA, M_PKTHDR);
1519	if (__predict_false(m == NULL))
1520		return;
1521	wh = mtod(m, struct ieee80211_frame *);
1522	wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
1523	    IEEE80211_FC0_SUBTYPE_BEACON;
1524	wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
1525	USETW(wh->i_dur, 0);
1526	IEEE80211_ADDR_COPY(wh->i_addr1, ieee80211broadcastaddr);
1527	IEEE80211_ADDR_COPY(wh->i_addr2, bss->macaddr);
1528	IEEE80211_ADDR_COPY(wh->i_addr3, bss->macaddr);
1529	*(uint16_t *)wh->i_seq = 0;
1530	memcpy(&wh[1], (uint8_t *)&bss[1], ieslen);
1531
1532	/* Finalize mbuf. */
1533	m->m_pkthdr.len = m->m_len = pktlen;
1534
1535	/* Set channel flags for input path */
1536	bzero(&rxs, sizeof(rxs));
1537	rxs.r_flags |= IEEE80211_R_IEEE | IEEE80211_R_FREQ;
1538	rxs.r_flags |= IEEE80211_R_NF | IEEE80211_R_RSSI;
1539	rxs.c_ieee = le32toh(bss->config.dsconfig);
1540	rxs.c_freq = ieee80211_ieee2mhz(rxs.c_ieee, IEEE80211_CHAN_2GHZ);
1541	/* This is a number from 0..100; so let's just divide it down a bit */
1542	rxs.rssi = le32toh(bss->rssi) / 2;
1543	rxs.nf = -96;
1544
1545	/* XXX avoid a LOR */
1546	RSU_UNLOCK(sc);
1547	ieee80211_input_mimo_all(ic, m, &rxs);
1548	RSU_LOCK(sc);
1549}
1550
1551static void
1552rsu_event_join_bss(struct rsu_softc *sc, uint8_t *buf, int len)
1553{
1554	struct ieee80211com *ic = &sc->sc_ic;
1555	struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
1556	struct ieee80211_node *ni = vap->iv_bss;
1557	struct r92s_event_join_bss *rsp;
1558	uint32_t tmp;
1559	int res;
1560
1561	if (__predict_false(len < sizeof(*rsp)))
1562		return;
1563	rsp = (struct r92s_event_join_bss *)buf;
1564	res = (int)le32toh(rsp->join_res);
1565
1566	RSU_DPRINTF(sc, RSU_DEBUG_STATE | RSU_DEBUG_FWCMD,
1567	    "%s: Rx join BSS event len=%d res=%d\n",
1568	    __func__, len, res);
1569
1570	/*
1571	 * XXX Don't do this; there's likely a better way to tell
1572	 * the caller we failed.
1573	 */
1574	if (res <= 0) {
1575		RSU_UNLOCK(sc);
1576		ieee80211_new_state(vap, IEEE80211_S_SCAN, -1);
1577		RSU_LOCK(sc);
1578		return;
1579	}
1580
1581	tmp = le32toh(rsp->associd);
1582	if (tmp >= vap->iv_max_aid) {
1583		DPRINTF("Assoc ID overflow\n");
1584		tmp = 1;
1585	}
1586	RSU_DPRINTF(sc, RSU_DEBUG_STATE | RSU_DEBUG_FWCMD,
1587	    "%s: associated with %s associd=%d\n",
1588	    __func__, ether_sprintf(rsp->bss.macaddr), tmp);
1589	/* XXX is this required? What's the top two bits for again? */
1590	ni->ni_associd = tmp | 0xc000;
1591	RSU_UNLOCK(sc);
1592	ieee80211_new_state(vap, IEEE80211_S_RUN,
1593	    IEEE80211_FC0_SUBTYPE_ASSOC_RESP);
1594	RSU_LOCK(sc);
1595}
1596
1597static void
1598rsu_event_addba_req_report(struct rsu_softc *sc, uint8_t *buf, int len)
1599{
1600	struct ieee80211com *ic = &sc->sc_ic;
1601	struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
1602	struct r92s_add_ba_event *ba = (void *) buf;
1603	struct ieee80211_node *ni;
1604
1605	if (len < sizeof(*ba)) {
1606		device_printf(sc->sc_dev, "%s: short read (%d)\n", __func__, len);
1607		return;
1608	}
1609
1610	if (vap == NULL)
1611		return;
1612
1613	RSU_DPRINTF(sc, RSU_DEBUG_AMPDU, "%s: mac=%s, tid=%d, ssn=%d\n",
1614	    __func__,
1615	    ether_sprintf(ba->mac_addr),
1616	    (int) ba->tid,
1617	    (int) le16toh(ba->ssn));
1618
1619	/* XXX do node lookup; this is STA specific */
1620
1621	ni = ieee80211_ref_node(vap->iv_bss);
1622	ieee80211_ampdu_rx_start_ext(ni, ba->tid, le16toh(ba->ssn) >> 4, 32);
1623	ieee80211_free_node(ni);
1624}
1625
1626static void
1627rsu_rx_event(struct rsu_softc *sc, uint8_t code, uint8_t *buf, int len)
1628{
1629	struct ieee80211com *ic = &sc->sc_ic;
1630	struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
1631
1632	RSU_DPRINTF(sc, RSU_DEBUG_RX | RSU_DEBUG_FWCMD,
1633	    "%s: Rx event code=%d len=%d\n", __func__, code, len);
1634	switch (code) {
1635	case R92S_EVT_SURVEY:
1636		rsu_event_survey(sc, buf, len);
1637		break;
1638	case R92S_EVT_SURVEY_DONE:
1639		RSU_DPRINTF(sc, RSU_DEBUG_SCAN,
1640		    "%s: site survey pass %d done, found %d BSS\n",
1641		    __func__, sc->sc_scan_pass, le32toh(*(uint32_t *)buf));
1642		sc->sc_scanning = 0;
1643		if (vap->iv_state != IEEE80211_S_SCAN)
1644			break;	/* Ignore if not scanning. */
1645
1646		/*
1647		 * XXX TODO: This needs to be done without a transition to
1648		 * the SCAN state again.  Grr.
1649		 */
1650		if (sc->sc_scan_pass == 0 && vap->iv_des_nssid != 0) {
1651			/* Schedule a directed scan for hidden APs. */
1652			/* XXX bad! */
1653			sc->sc_scan_pass = 1;
1654			RSU_UNLOCK(sc);
1655			ieee80211_new_state(vap, IEEE80211_S_SCAN, -1);
1656			RSU_LOCK(sc);
1657			break;
1658		}
1659		sc->sc_scan_pass = 0;
1660		break;
1661	case R92S_EVT_JOIN_BSS:
1662		if (vap->iv_state == IEEE80211_S_AUTH)
1663			rsu_event_join_bss(sc, buf, len);
1664		break;
1665	case R92S_EVT_DEL_STA:
1666		RSU_DPRINTF(sc, RSU_DEBUG_FWCMD | RSU_DEBUG_STATE,
1667		    "%s: disassociated from %s\n", __func__,
1668		    ether_sprintf(buf));
1669		if (vap->iv_state == IEEE80211_S_RUN &&
1670		    IEEE80211_ADDR_EQ(vap->iv_bss->ni_bssid, buf)) {
1671			RSU_UNLOCK(sc);
1672			ieee80211_new_state(vap, IEEE80211_S_SCAN, -1);
1673			RSU_LOCK(sc);
1674		}
1675		break;
1676	case R92S_EVT_WPS_PBC:
1677		RSU_DPRINTF(sc, RSU_DEBUG_RX | RSU_DEBUG_FWCMD,
1678		    "%s: WPS PBC pushed.\n", __func__);
1679		break;
1680	case R92S_EVT_FWDBG:
1681		buf[60] = '\0';
1682		RSU_DPRINTF(sc, RSU_DEBUG_FWDBG, "FWDBG: %s\n", (char *)buf);
1683		break;
1684	case R92S_EVT_ADDBA_REQ_REPORT:
1685		rsu_event_addba_req_report(sc, buf, len);
1686		break;
1687	default:
1688		device_printf(sc->sc_dev, "%s: unhandled code (%d)\n", __func__, code);
1689		break;
1690	}
1691}
1692
1693static void
1694rsu_rx_multi_event(struct rsu_softc *sc, uint8_t *buf, int len)
1695{
1696	struct r92s_fw_cmd_hdr *cmd;
1697	int cmdsz;
1698
1699	RSU_DPRINTF(sc, RSU_DEBUG_RX, "%s: Rx events len=%d\n", __func__, len);
1700
1701	/* Skip Rx status. */
1702	buf += sizeof(struct r92s_rx_stat);
1703	len -= sizeof(struct r92s_rx_stat);
1704
1705	/* Process all events. */
1706	for (;;) {
1707		/* Check that command header fits. */
1708		if (__predict_false(len < sizeof(*cmd)))
1709			break;
1710		cmd = (struct r92s_fw_cmd_hdr *)buf;
1711		/* Check that command payload fits. */
1712		cmdsz = le16toh(cmd->len);
1713		if (__predict_false(len < sizeof(*cmd) + cmdsz))
1714			break;
1715
1716		/* Process firmware event. */
1717		rsu_rx_event(sc, cmd->code, (uint8_t *)&cmd[1], cmdsz);
1718
1719		if (!(cmd->seq & R92S_FW_CMD_MORE))
1720			break;
1721		buf += sizeof(*cmd) + cmdsz;
1722		len -= sizeof(*cmd) + cmdsz;
1723	}
1724}
1725
1726#if 0
1727static int8_t
1728rsu_get_rssi(struct rsu_softc *sc, int rate, void *physt)
1729{
1730	static const int8_t cckoff[] = { 14, -2, -20, -40 };
1731	struct r92s_rx_phystat *phy;
1732	struct r92s_rx_cck *cck;
1733	uint8_t rpt;
1734	int8_t rssi;
1735
1736	if (rate <= 3) {
1737		cck = (struct r92s_rx_cck *)physt;
1738		rpt = (cck->agc_rpt >> 6) & 0x3;
1739		rssi = cck->agc_rpt & 0x3e;
1740		rssi = cckoff[rpt] - rssi;
1741	} else {	/* OFDM/HT. */
1742		phy = (struct r92s_rx_phystat *)physt;
1743		rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 106;
1744	}
1745	return (rssi);
1746}
1747#endif
1748
1749static struct mbuf *
1750rsu_rx_frame(struct rsu_softc *sc, uint8_t *buf, int pktlen)
1751{
1752	struct ieee80211com *ic = &sc->sc_ic;
1753	struct ieee80211_frame *wh;
1754	struct r92s_rx_stat *stat;
1755	uint32_t rxdw0, rxdw3;
1756	struct mbuf *m;
1757	uint8_t rate;
1758	int infosz;
1759
1760	stat = (struct r92s_rx_stat *)buf;
1761	rxdw0 = le32toh(stat->rxdw0);
1762	rxdw3 = le32toh(stat->rxdw3);
1763
1764	if (__predict_false(rxdw0 & R92S_RXDW0_CRCERR)) {
1765		counter_u64_add(ic->ic_ierrors, 1);
1766		return NULL;
1767	}
1768	if (__predict_false(pktlen < sizeof(*wh) || pktlen > MCLBYTES)) {
1769		counter_u64_add(ic->ic_ierrors, 1);
1770		return NULL;
1771	}
1772
1773	rate = MS(rxdw3, R92S_RXDW3_RATE);
1774	infosz = MS(rxdw0, R92S_RXDW0_INFOSZ) * 8;
1775
1776#if 0
1777	/* Get RSSI from PHY status descriptor if present. */
1778	if (infosz != 0)
1779		*rssi = rsu_get_rssi(sc, rate, &stat[1]);
1780	else
1781		*rssi = 0;
1782#endif
1783
1784	RSU_DPRINTF(sc, RSU_DEBUG_RX,
1785	    "%s: Rx frame len=%d rate=%d infosz=%d\n",
1786	    __func__, pktlen, rate, infosz);
1787
1788	m = m_get2(pktlen, M_NOWAIT, MT_DATA, M_PKTHDR);
1789	if (__predict_false(m == NULL)) {
1790		counter_u64_add(ic->ic_ierrors, 1);
1791		return NULL;
1792	}
1793	/* Hardware does Rx TCP checksum offload. */
1794	if (rxdw3 & R92S_RXDW3_TCPCHKVALID) {
1795		if (__predict_true(rxdw3 & R92S_RXDW3_TCPCHKRPT))
1796			m->m_pkthdr.csum_flags |= CSUM_DATA_VALID;
1797	}
1798	wh = (struct ieee80211_frame *)((uint8_t *)&stat[1] + infosz);
1799	memcpy(mtod(m, uint8_t *), wh, pktlen);
1800	m->m_pkthdr.len = m->m_len = pktlen;
1801
1802	if (ieee80211_radiotap_active(ic)) {
1803		struct rsu_rx_radiotap_header *tap = &sc->sc_rxtap;
1804
1805		/* Map HW rate index to 802.11 rate. */
1806		tap->wr_flags = 2;
1807		if (!(rxdw3 & R92S_RXDW3_HTC)) {
1808			switch (rate) {
1809			/* CCK. */
1810			case  0: tap->wr_rate =   2; break;
1811			case  1: tap->wr_rate =   4; break;
1812			case  2: tap->wr_rate =  11; break;
1813			case  3: tap->wr_rate =  22; break;
1814			/* OFDM. */
1815			case  4: tap->wr_rate =  12; break;
1816			case  5: tap->wr_rate =  18; break;
1817			case  6: tap->wr_rate =  24; break;
1818			case  7: tap->wr_rate =  36; break;
1819			case  8: tap->wr_rate =  48; break;
1820			case  9: tap->wr_rate =  72; break;
1821			case 10: tap->wr_rate =  96; break;
1822			case 11: tap->wr_rate = 108; break;
1823			}
1824		} else if (rate >= 12) {	/* MCS0~15. */
1825			/* Bit 7 set means HT MCS instead of rate. */
1826			tap->wr_rate = 0x80 | (rate - 12);
1827		}
1828#if 0
1829		tap->wr_dbm_antsignal = *rssi;
1830#endif
1831		/* XXX not nice */
1832		tap->wr_dbm_antsignal = rsu_hwrssi_to_rssi(sc, sc->sc_currssi);
1833	}
1834
1835	return (m);
1836}
1837
1838static struct mbuf *
1839rsu_rx_multi_frame(struct rsu_softc *sc, uint8_t *buf, int len)
1840{
1841	struct r92s_rx_stat *stat;
1842	uint32_t rxdw0;
1843	int totlen, pktlen, infosz, npkts;
1844	struct mbuf *m, *m0 = NULL, *prevm = NULL;
1845
1846	/* Get the number of encapsulated frames. */
1847	stat = (struct r92s_rx_stat *)buf;
1848	npkts = MS(le32toh(stat->rxdw2), R92S_RXDW2_PKTCNT);
1849	RSU_DPRINTF(sc, RSU_DEBUG_RX,
1850	    "%s: Rx %d frames in one chunk\n", __func__, npkts);
1851
1852	/* Process all of them. */
1853	while (npkts-- > 0) {
1854		if (__predict_false(len < sizeof(*stat)))
1855			break;
1856		stat = (struct r92s_rx_stat *)buf;
1857		rxdw0 = le32toh(stat->rxdw0);
1858
1859		pktlen = MS(rxdw0, R92S_RXDW0_PKTLEN);
1860		if (__predict_false(pktlen == 0))
1861			break;
1862
1863		infosz = MS(rxdw0, R92S_RXDW0_INFOSZ) * 8;
1864
1865		/* Make sure everything fits in xfer. */
1866		totlen = sizeof(*stat) + infosz + pktlen;
1867		if (__predict_false(totlen > len))
1868			break;
1869
1870		/* Process 802.11 frame. */
1871		m = rsu_rx_frame(sc, buf, pktlen);
1872		if (m0 == NULL)
1873			m0 = m;
1874		if (prevm == NULL)
1875			prevm = m;
1876		else {
1877			prevm->m_next = m;
1878			prevm = m;
1879		}
1880		/* Next chunk is 128-byte aligned. */
1881		totlen = (totlen + 127) & ~127;
1882		buf += totlen;
1883		len -= totlen;
1884	}
1885
1886	return (m0);
1887}
1888
1889static struct mbuf *
1890rsu_rxeof(struct usb_xfer *xfer, struct rsu_data *data)
1891{
1892	struct rsu_softc *sc = data->sc;
1893	struct ieee80211com *ic = &sc->sc_ic;
1894	struct r92s_rx_stat *stat;
1895	int len;
1896
1897	usbd_xfer_status(xfer, &len, NULL, NULL, NULL);
1898
1899	if (__predict_false(len < sizeof(*stat))) {
1900		DPRINTF("xfer too short %d\n", len);
1901		counter_u64_add(ic->ic_ierrors, 1);
1902		return (NULL);
1903	}
1904	/* Determine if it is a firmware C2H event or an 802.11 frame. */
1905	stat = (struct r92s_rx_stat *)data->buf;
1906	if ((le32toh(stat->rxdw1) & 0x1ff) == 0x1ff) {
1907		rsu_rx_multi_event(sc, data->buf, len);
1908		/* No packets to process. */
1909		return (NULL);
1910	} else
1911		return (rsu_rx_multi_frame(sc, data->buf, len));
1912}
1913
1914static void
1915rsu_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error)
1916{
1917	struct rsu_softc *sc = usbd_xfer_softc(xfer);
1918	struct ieee80211com *ic = &sc->sc_ic;
1919	struct ieee80211_frame *wh;
1920	struct ieee80211_node *ni;
1921	struct mbuf *m = NULL, *next;
1922	struct rsu_data *data;
1923
1924	RSU_ASSERT_LOCKED(sc);
1925
1926	switch (USB_GET_STATE(xfer)) {
1927	case USB_ST_TRANSFERRED:
1928		data = STAILQ_FIRST(&sc->sc_rx_active);
1929		if (data == NULL)
1930			goto tr_setup;
1931		STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next);
1932		m = rsu_rxeof(xfer, data);
1933		STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next);
1934		/* FALLTHROUGH */
1935	case USB_ST_SETUP:
1936tr_setup:
1937		/*
1938		 * XXX TODO: if we have an mbuf list, but then
1939		 * we hit data == NULL, what now?
1940		 */
1941		data = STAILQ_FIRST(&sc->sc_rx_inactive);
1942		if (data == NULL) {
1943			KASSERT(m == NULL, ("mbuf isn't NULL"));
1944			return;
1945		}
1946		STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next);
1947		STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next);
1948		usbd_xfer_set_frame_data(xfer, 0, data->buf,
1949		    usbd_xfer_max_len(xfer));
1950		usbd_transfer_submit(xfer);
1951		/*
1952		 * To avoid LOR we should unlock our private mutex here to call
1953		 * ieee80211_input() because here is at the end of a USB
1954		 * callback and safe to unlock.
1955		 */
1956		RSU_UNLOCK(sc);
1957		while (m != NULL) {
1958			int rssi;
1959
1960			/* Cheat and get the last calibrated RSSI */
1961			rssi = rsu_hwrssi_to_rssi(sc, sc->sc_currssi);
1962
1963			next = m->m_next;
1964			m->m_next = NULL;
1965			wh = mtod(m, struct ieee80211_frame *);
1966			ni = ieee80211_find_rxnode(ic,
1967			    (struct ieee80211_frame_min *)wh);
1968			if (ni != NULL) {
1969				if (ni->ni_flags & IEEE80211_NODE_HT)
1970					m->m_flags |= M_AMPDU;
1971				(void)ieee80211_input(ni, m, rssi, -96);
1972				ieee80211_free_node(ni);
1973			} else
1974				(void)ieee80211_input_all(ic, m, rssi, -96);
1975			m = next;
1976		}
1977		RSU_LOCK(sc);
1978		break;
1979	default:
1980		/* needs it to the inactive queue due to a error. */
1981		data = STAILQ_FIRST(&sc->sc_rx_active);
1982		if (data != NULL) {
1983			STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next);
1984			STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next);
1985		}
1986		if (error != USB_ERR_CANCELLED) {
1987			usbd_xfer_set_stall(xfer);
1988			counter_u64_add(ic->ic_ierrors, 1);
1989			goto tr_setup;
1990		}
1991		break;
1992	}
1993
1994}
1995
1996static void
1997rsu_txeof(struct usb_xfer *xfer, struct rsu_data *data)
1998{
1999#ifdef	USB_DEBUG
2000	struct rsu_softc *sc = usbd_xfer_softc(xfer);
2001#endif
2002
2003	RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, "%s: called; data=%p\n",
2004	    __func__,
2005	    data);
2006
2007	if (data->m) {
2008		/* XXX status? */
2009		ieee80211_tx_complete(data->ni, data->m, 0);
2010		data->m = NULL;
2011		data->ni = NULL;
2012	}
2013}
2014
2015static void
2016rsu_bulk_tx_callback_sub(struct usb_xfer *xfer, usb_error_t error,
2017    uint8_t which)
2018{
2019	struct rsu_softc *sc = usbd_xfer_softc(xfer);
2020	struct ieee80211com *ic = &sc->sc_ic;
2021	struct rsu_data *data;
2022
2023	RSU_ASSERT_LOCKED(sc);
2024
2025	switch (USB_GET_STATE(xfer)) {
2026	case USB_ST_TRANSFERRED:
2027		data = STAILQ_FIRST(&sc->sc_tx_active[which]);
2028		if (data == NULL)
2029			goto tr_setup;
2030		RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, "%s: transfer done %p\n",
2031		    __func__, data);
2032		STAILQ_REMOVE_HEAD(&sc->sc_tx_active[which], next);
2033		rsu_txeof(xfer, data);
2034		rsu_freebuf(sc, data);
2035		/* FALLTHROUGH */
2036	case USB_ST_SETUP:
2037tr_setup:
2038		data = STAILQ_FIRST(&sc->sc_tx_pending[which]);
2039		if (data == NULL) {
2040			RSU_DPRINTF(sc, RSU_DEBUG_TXDONE,
2041			    "%s: empty pending queue sc %p\n", __func__, sc);
2042			return;
2043		}
2044		STAILQ_REMOVE_HEAD(&sc->sc_tx_pending[which], next);
2045		STAILQ_INSERT_TAIL(&sc->sc_tx_active[which], data, next);
2046		usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen);
2047		RSU_DPRINTF(sc, RSU_DEBUG_TXDONE,
2048		    "%s: submitting transfer %p\n",
2049		    __func__,
2050		    data);
2051		usbd_transfer_submit(xfer);
2052		break;
2053	default:
2054		data = STAILQ_FIRST(&sc->sc_tx_active[which]);
2055		if (data != NULL) {
2056			STAILQ_REMOVE_HEAD(&sc->sc_tx_active[which], next);
2057			rsu_txeof(xfer, data);
2058			rsu_freebuf(sc, data);
2059		}
2060		counter_u64_add(ic->ic_oerrors, 1);
2061
2062		if (error != USB_ERR_CANCELLED) {
2063			usbd_xfer_set_stall(xfer);
2064			goto tr_setup;
2065		}
2066		break;
2067	}
2068
2069	/*
2070	 * XXX TODO: if the queue is low, flush out FF TX frames.
2071	 * Remember to unlock the driver for now; net80211 doesn't
2072	 * defer it for us.
2073	 */
2074}
2075
2076static void
2077rsu_bulk_tx_callback_be_bk(struct usb_xfer *xfer, usb_error_t error)
2078{
2079	struct rsu_softc *sc = usbd_xfer_softc(xfer);
2080
2081	rsu_bulk_tx_callback_sub(xfer, error, RSU_BULK_TX_BE_BK);
2082
2083	/* This kicks the TX taskqueue */
2084	rsu_start(sc);
2085}
2086
2087static void
2088rsu_bulk_tx_callback_vi_vo(struct usb_xfer *xfer, usb_error_t error)
2089{
2090	struct rsu_softc *sc = usbd_xfer_softc(xfer);
2091
2092	rsu_bulk_tx_callback_sub(xfer, error, RSU_BULK_TX_VI_VO);
2093
2094	/* This kicks the TX taskqueue */
2095	rsu_start(sc);
2096}
2097
2098static void
2099rsu_bulk_tx_callback_h2c(struct usb_xfer *xfer, usb_error_t error)
2100{
2101	struct rsu_softc *sc = usbd_xfer_softc(xfer);
2102
2103	rsu_bulk_tx_callback_sub(xfer, error, RSU_BULK_TX_H2C);
2104
2105	/* This kicks the TX taskqueue */
2106	rsu_start(sc);
2107}
2108
2109/*
2110 * Transmit the given frame.
2111 *
2112 * This doesn't free the node or mbuf upon failure.
2113 */
2114static int
2115rsu_tx_start(struct rsu_softc *sc, struct ieee80211_node *ni,
2116    struct mbuf *m0, struct rsu_data *data)
2117{
2118        struct ieee80211vap *vap = ni->ni_vap;
2119	struct ieee80211_frame *wh;
2120	struct ieee80211_key *k = NULL;
2121	struct r92s_tx_desc *txd;
2122	uint8_t type;
2123	int prio = 0;
2124	uint8_t which;
2125	int hasqos;
2126	int xferlen;
2127	int qid;
2128
2129	RSU_ASSERT_LOCKED(sc);
2130
2131	wh = mtod(m0, struct ieee80211_frame *);
2132	type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
2133
2134	RSU_DPRINTF(sc, RSU_DEBUG_TX, "%s: data=%p, m=%p\n",
2135	    __func__, data, m0);
2136
2137	if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
2138		k = ieee80211_crypto_encap(ni, m0);
2139		if (k == NULL) {
2140			device_printf(sc->sc_dev,
2141			    "ieee80211_crypto_encap returns NULL.\n");
2142			/* XXX we don't expect the fragmented frames */
2143			return (ENOBUFS);
2144		}
2145		wh = mtod(m0, struct ieee80211_frame *);
2146	}
2147	/* If we have QoS then use it */
2148	/* XXX TODO: mbuf WME/PRI versus TID? */
2149	if (IEEE80211_QOS_HAS_SEQ(wh)) {
2150		/* Has QoS */
2151		prio = M_WME_GETAC(m0);
2152		which = rsu_wme_ac_xfer_map[prio];
2153		hasqos = 1;
2154	} else {
2155		/* Non-QoS TID */
2156		/* XXX TODO: tid=0 for non-qos TID? */
2157		which = rsu_wme_ac_xfer_map[WME_AC_BE];
2158		hasqos = 0;
2159		prio = 0;
2160	}
2161
2162	qid = rsu_ac2qid[prio];
2163#if 0
2164	switch (type) {
2165	case IEEE80211_FC0_TYPE_CTL:
2166	case IEEE80211_FC0_TYPE_MGT:
2167		which = rsu_wme_ac_xfer_map[WME_AC_VO];
2168		break;
2169	default:
2170		which = rsu_wme_ac_xfer_map[M_WME_GETAC(m0)];
2171		break;
2172	}
2173	hasqos = 0;
2174#endif
2175
2176	RSU_DPRINTF(sc, RSU_DEBUG_TX, "%s: pri=%d, which=%d, hasqos=%d\n",
2177	    __func__,
2178	    prio,
2179	    which,
2180	    hasqos);
2181
2182	/* Fill Tx descriptor. */
2183	txd = (struct r92s_tx_desc *)data->buf;
2184	memset(txd, 0, sizeof(*txd));
2185
2186	txd->txdw0 |= htole32(
2187	    SM(R92S_TXDW0_PKTLEN, m0->m_pkthdr.len) |
2188	    SM(R92S_TXDW0_OFFSET, sizeof(*txd)) |
2189	    R92S_TXDW0_OWN | R92S_TXDW0_FSG | R92S_TXDW0_LSG);
2190
2191	txd->txdw1 |= htole32(
2192	    SM(R92S_TXDW1_MACID, R92S_MACID_BSS) | SM(R92S_TXDW1_QSEL, qid));
2193	if (!hasqos)
2194		txd->txdw1 |= htole32(R92S_TXDW1_NONQOS);
2195#ifdef notyet
2196	if (k != NULL) {
2197		switch (k->wk_cipher->ic_cipher) {
2198		case IEEE80211_CIPHER_WEP:
2199			cipher = R92S_TXDW1_CIPHER_WEP;
2200			break;
2201		case IEEE80211_CIPHER_TKIP:
2202			cipher = R92S_TXDW1_CIPHER_TKIP;
2203			break;
2204		case IEEE80211_CIPHER_AES_CCM:
2205			cipher = R92S_TXDW1_CIPHER_AES;
2206			break;
2207		default:
2208			cipher = R92S_TXDW1_CIPHER_NONE;
2209		}
2210		txd->txdw1 |= htole32(
2211		    SM(R92S_TXDW1_CIPHER, cipher) |
2212		    SM(R92S_TXDW1_KEYIDX, k->k_id));
2213	}
2214#endif
2215	/* XXX todo: set AGGEN bit if appropriate? */
2216	txd->txdw2 |= htole32(R92S_TXDW2_BK);
2217	if (IEEE80211_IS_MULTICAST(wh->i_addr1))
2218		txd->txdw2 |= htole32(R92S_TXDW2_BMCAST);
2219	/*
2220	 * Firmware will use and increment the sequence number for the
2221	 * specified priority.
2222	 */
2223	txd->txdw3 |= htole32(SM(R92S_TXDW3_SEQ, prio));
2224
2225	if (ieee80211_radiotap_active_vap(vap)) {
2226		struct rsu_tx_radiotap_header *tap = &sc->sc_txtap;
2227
2228		tap->wt_flags = 0;
2229		ieee80211_radiotap_tx(vap, m0);
2230	}
2231
2232	xferlen = sizeof(*txd) + m0->m_pkthdr.len;
2233	m_copydata(m0, 0, m0->m_pkthdr.len, (caddr_t)&txd[1]);
2234
2235	data->buflen = xferlen;
2236	data->ni = ni;
2237	data->m = m0;
2238	STAILQ_INSERT_TAIL(&sc->sc_tx_pending[which], data, next);
2239
2240	/* start transfer, if any */
2241	usbd_transfer_start(sc->sc_xfer[which]);
2242	return (0);
2243}
2244
2245static int
2246rsu_transmit(struct ieee80211com *ic, struct mbuf *m)
2247{
2248	struct rsu_softc *sc = ic->ic_softc;
2249	int error;
2250
2251	RSU_LOCK(sc);
2252	if (!sc->sc_running) {
2253		RSU_UNLOCK(sc);
2254		return (ENXIO);
2255	}
2256
2257	/*
2258	 * XXX TODO: ensure that we treat 'm' as a list of frames
2259	 * to transmit!
2260	 */
2261	error = mbufq_enqueue(&sc->sc_snd, m);
2262	if (error) {
2263		RSU_DPRINTF(sc, RSU_DEBUG_TX,
2264		    "%s: mbufq_enable: failed (%d)\n",
2265		    __func__,
2266		    error);
2267		RSU_UNLOCK(sc);
2268		return (error);
2269	}
2270	RSU_UNLOCK(sc);
2271
2272	/* This kicks the TX taskqueue */
2273	rsu_start(sc);
2274
2275	return (0);
2276}
2277
2278static void
2279rsu_drain_mbufq(struct rsu_softc *sc)
2280{
2281	struct mbuf *m;
2282	struct ieee80211_node *ni;
2283
2284	RSU_ASSERT_LOCKED(sc);
2285	while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) {
2286		ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
2287		m->m_pkthdr.rcvif = NULL;
2288		ieee80211_free_node(ni);
2289		m_freem(m);
2290	}
2291}
2292
2293static void
2294_rsu_start(struct rsu_softc *sc)
2295{
2296	struct ieee80211_node *ni;
2297	struct rsu_data *bf;
2298	struct mbuf *m;
2299
2300	RSU_ASSERT_LOCKED(sc);
2301
2302	while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) {
2303		bf = rsu_getbuf(sc);
2304		if (bf == NULL) {
2305			RSU_DPRINTF(sc, RSU_DEBUG_TX,
2306			    "%s: failed to get buffer\n", __func__);
2307			mbufq_prepend(&sc->sc_snd, m);
2308			break;
2309		}
2310
2311		ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
2312		m->m_pkthdr.rcvif = NULL;
2313
2314		if (rsu_tx_start(sc, ni, m, bf) != 0) {
2315			RSU_DPRINTF(sc, RSU_DEBUG_TX,
2316			    "%s: failed to transmit\n", __func__);
2317			if_inc_counter(ni->ni_vap->iv_ifp,
2318			    IFCOUNTER_OERRORS, 1);
2319			rsu_freebuf(sc, bf);
2320			ieee80211_free_node(ni);
2321			m_freem(m);
2322			break;
2323		}
2324	}
2325}
2326
2327static void
2328rsu_start(struct rsu_softc *sc)
2329{
2330
2331	taskqueue_enqueue(taskqueue_thread, &sc->tx_task);
2332}
2333
2334static void
2335rsu_parent(struct ieee80211com *ic)
2336{
2337	struct rsu_softc *sc = ic->ic_softc;
2338	int startall = 0;
2339
2340	RSU_LOCK(sc);
2341	if (ic->ic_nrunning > 0) {
2342		if (!sc->sc_running) {
2343			rsu_init(sc);
2344			startall = 1;
2345		}
2346	} else if (sc->sc_running)
2347		rsu_stop(sc);
2348	RSU_UNLOCK(sc);
2349
2350	if (startall)
2351		ieee80211_start_all(ic);
2352}
2353
2354/*
2355 * Power on sequence for A-cut adapters.
2356 */
2357static void
2358rsu_power_on_acut(struct rsu_softc *sc)
2359{
2360	uint32_t reg;
2361
2362	rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x53);
2363	rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x57);
2364
2365	/* Enable AFE macro block's bandgap and Mbias. */
2366	rsu_write_1(sc, R92S_AFE_MISC,
2367	    rsu_read_1(sc, R92S_AFE_MISC) |
2368	    R92S_AFE_MISC_BGEN | R92S_AFE_MISC_MBEN);
2369	/* Enable LDOA15 block. */
2370	rsu_write_1(sc, R92S_LDOA15_CTRL,
2371	    rsu_read_1(sc, R92S_LDOA15_CTRL) | R92S_LDA15_EN);
2372
2373	rsu_write_1(sc, R92S_SPS1_CTRL,
2374	    rsu_read_1(sc, R92S_SPS1_CTRL) | R92S_SPS1_LDEN);
2375	rsu_ms_delay(sc, 2000);
2376	/* Enable switch regulator block. */
2377	rsu_write_1(sc, R92S_SPS1_CTRL,
2378	    rsu_read_1(sc, R92S_SPS1_CTRL) | R92S_SPS1_SWEN);
2379
2380	rsu_write_4(sc, R92S_SPS1_CTRL, 0x00a7b267);
2381
2382	rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1,
2383	    rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) | 0x08);
2384
2385	rsu_write_1(sc, R92S_SYS_FUNC_EN + 1,
2386	    rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x20);
2387
2388	rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1,
2389	    rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) & ~0x90);
2390
2391	/* Enable AFE clock. */
2392	rsu_write_1(sc, R92S_AFE_XTAL_CTRL + 1,
2393	    rsu_read_1(sc, R92S_AFE_XTAL_CTRL + 1) & ~0x04);
2394	/* Enable AFE PLL macro block. */
2395	rsu_write_1(sc, R92S_AFE_PLL_CTRL,
2396	    rsu_read_1(sc, R92S_AFE_PLL_CTRL) | 0x11);
2397	/* Attach AFE PLL to MACTOP/BB. */
2398	rsu_write_1(sc, R92S_SYS_ISO_CTRL,
2399	    rsu_read_1(sc, R92S_SYS_ISO_CTRL) & ~0x11);
2400
2401	/* Switch to 40MHz clock instead of 80MHz. */
2402	rsu_write_2(sc, R92S_SYS_CLKR,
2403	    rsu_read_2(sc, R92S_SYS_CLKR) & ~R92S_SYS_CLKSEL);
2404
2405	/* Enable MAC clock. */
2406	rsu_write_2(sc, R92S_SYS_CLKR,
2407	    rsu_read_2(sc, R92S_SYS_CLKR) |
2408	    R92S_MAC_CLK_EN | R92S_SYS_CLK_EN);
2409
2410	rsu_write_1(sc, R92S_PMC_FSM, 0x02);
2411
2412	/* Enable digital core and IOREG R/W. */
2413	rsu_write_1(sc, R92S_SYS_FUNC_EN + 1,
2414	    rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x08);
2415
2416	rsu_write_1(sc, R92S_SYS_FUNC_EN + 1,
2417	    rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x80);
2418
2419	/* Switch the control path to firmware. */
2420	reg = rsu_read_2(sc, R92S_SYS_CLKR);
2421	reg = (reg & ~R92S_SWHW_SEL) | R92S_FWHW_SEL;
2422	rsu_write_2(sc, R92S_SYS_CLKR, reg);
2423
2424	rsu_write_2(sc, R92S_CR, 0x37fc);
2425
2426	/* Fix USB RX FIFO issue. */
2427	rsu_write_1(sc, 0xfe5c,
2428	    rsu_read_1(sc, 0xfe5c) | 0x80);
2429	rsu_write_1(sc, 0x00ab,
2430	    rsu_read_1(sc, 0x00ab) | 0xc0);
2431
2432	rsu_write_1(sc, R92S_SYS_CLKR,
2433	    rsu_read_1(sc, R92S_SYS_CLKR) & ~R92S_SYS_CPU_CLKSEL);
2434}
2435
2436/*
2437 * Power on sequence for B-cut and C-cut adapters.
2438 */
2439static void
2440rsu_power_on_bcut(struct rsu_softc *sc)
2441{
2442	uint32_t reg;
2443	int ntries;
2444
2445	/* Prevent eFuse leakage. */
2446	rsu_write_1(sc, 0x37, 0xb0);
2447	rsu_ms_delay(sc, 10);
2448	rsu_write_1(sc, 0x37, 0x30);
2449
2450	/* Switch the control path to hardware. */
2451	reg = rsu_read_2(sc, R92S_SYS_CLKR);
2452	if (reg & R92S_FWHW_SEL) {
2453		rsu_write_2(sc, R92S_SYS_CLKR,
2454		    reg & ~(R92S_SWHW_SEL | R92S_FWHW_SEL));
2455	}
2456	rsu_write_1(sc, R92S_SYS_FUNC_EN + 1,
2457	    rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) & ~0x8c);
2458	rsu_ms_delay(sc, 1);
2459
2460	rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x53);
2461	rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x57);
2462
2463	reg = rsu_read_1(sc, R92S_AFE_MISC);
2464	rsu_write_1(sc, R92S_AFE_MISC, reg | R92S_AFE_MISC_BGEN);
2465	rsu_write_1(sc, R92S_AFE_MISC, reg | R92S_AFE_MISC_BGEN |
2466	    R92S_AFE_MISC_MBEN | R92S_AFE_MISC_I32_EN);
2467
2468	/* Enable PLL. */
2469	rsu_write_1(sc, R92S_LDOA15_CTRL,
2470	    rsu_read_1(sc, R92S_LDOA15_CTRL) | R92S_LDA15_EN);
2471
2472	rsu_write_1(sc, R92S_LDOV12D_CTRL,
2473	    rsu_read_1(sc, R92S_LDOV12D_CTRL) | R92S_LDV12_EN);
2474
2475	rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1,
2476	    rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) | 0x08);
2477
2478	rsu_write_1(sc, R92S_SYS_FUNC_EN + 1,
2479	    rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x20);
2480
2481	/* Support 64KB IMEM. */
2482	rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1,
2483	    rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) & ~0x97);
2484
2485	/* Enable AFE clock. */
2486	rsu_write_1(sc, R92S_AFE_XTAL_CTRL + 1,
2487	    rsu_read_1(sc, R92S_AFE_XTAL_CTRL + 1) & ~0x04);
2488	/* Enable AFE PLL macro block. */
2489	reg = rsu_read_1(sc, R92S_AFE_PLL_CTRL);
2490	rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x11);
2491	rsu_ms_delay(sc, 1);
2492	rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x51);
2493	rsu_ms_delay(sc, 1);
2494	rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x11);
2495	rsu_ms_delay(sc, 1);
2496
2497	/* Attach AFE PLL to MACTOP/BB. */
2498	rsu_write_1(sc, R92S_SYS_ISO_CTRL,
2499	    rsu_read_1(sc, R92S_SYS_ISO_CTRL) & ~0x11);
2500
2501	/* Switch to 40MHz clock. */
2502	rsu_write_1(sc, R92S_SYS_CLKR, 0x00);
2503	/* Disable CPU clock and 80MHz SSC. */
2504	rsu_write_1(sc, R92S_SYS_CLKR,
2505	    rsu_read_1(sc, R92S_SYS_CLKR) | 0xa0);
2506	/* Enable MAC clock. */
2507	rsu_write_2(sc, R92S_SYS_CLKR,
2508	    rsu_read_2(sc, R92S_SYS_CLKR) |
2509	    R92S_MAC_CLK_EN | R92S_SYS_CLK_EN);
2510
2511	rsu_write_1(sc, R92S_PMC_FSM, 0x02);
2512
2513	/* Enable digital core and IOREG R/W. */
2514	rsu_write_1(sc, R92S_SYS_FUNC_EN + 1,
2515	    rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x08);
2516
2517	rsu_write_1(sc, R92S_SYS_FUNC_EN + 1,
2518	    rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x80);
2519
2520	/* Switch the control path to firmware. */
2521	reg = rsu_read_2(sc, R92S_SYS_CLKR);
2522	reg = (reg & ~R92S_SWHW_SEL) | R92S_FWHW_SEL;
2523	rsu_write_2(sc, R92S_SYS_CLKR, reg);
2524
2525	rsu_write_2(sc, R92S_CR, 0x37fc);
2526
2527	/* Fix USB RX FIFO issue. */
2528	rsu_write_1(sc, 0xfe5c,
2529	    rsu_read_1(sc, 0xfe5c) | 0x80);
2530
2531	rsu_write_1(sc, R92S_SYS_CLKR,
2532	    rsu_read_1(sc, R92S_SYS_CLKR) & ~R92S_SYS_CPU_CLKSEL);
2533
2534	rsu_write_1(sc, 0xfe1c, 0x80);
2535
2536	/* Make sure TxDMA is ready to download firmware. */
2537	for (ntries = 0; ntries < 20; ntries++) {
2538		reg = rsu_read_1(sc, R92S_TCR);
2539		if ((reg & (R92S_TCR_IMEM_CHK_RPT | R92S_TCR_EMEM_CHK_RPT)) ==
2540		    (R92S_TCR_IMEM_CHK_RPT | R92S_TCR_EMEM_CHK_RPT))
2541			break;
2542		rsu_ms_delay(sc, 1);
2543	}
2544	if (ntries == 20) {
2545		RSU_DPRINTF(sc, RSU_DEBUG_RESET | RSU_DEBUG_TX,
2546		    "%s: TxDMA is not ready\n",
2547		    __func__);
2548		/* Reset TxDMA. */
2549		reg = rsu_read_1(sc, R92S_CR);
2550		rsu_write_1(sc, R92S_CR, reg & ~R92S_CR_TXDMA_EN);
2551		rsu_ms_delay(sc, 1);
2552		rsu_write_1(sc, R92S_CR, reg | R92S_CR_TXDMA_EN);
2553	}
2554}
2555
2556static void
2557rsu_power_off(struct rsu_softc *sc)
2558{
2559	/* Turn RF off. */
2560	rsu_write_1(sc, R92S_RF_CTRL, 0x00);
2561	rsu_ms_delay(sc, 5);
2562
2563	/* Turn MAC off. */
2564	/* Switch control path. */
2565	rsu_write_1(sc, R92S_SYS_CLKR + 1, 0x38);
2566	/* Reset MACTOP. */
2567	rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 0x70);
2568	rsu_write_1(sc, R92S_PMC_FSM, 0x06);
2569	rsu_write_1(sc, R92S_SYS_ISO_CTRL + 0, 0xf9);
2570	rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 0xe8);
2571
2572	/* Disable AFE PLL. */
2573	rsu_write_1(sc, R92S_AFE_PLL_CTRL, 0x00);
2574	/* Disable A15V. */
2575	rsu_write_1(sc, R92S_LDOA15_CTRL, 0x54);
2576	/* Disable eFuse 1.2V. */
2577	rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 0x50);
2578	rsu_write_1(sc, R92S_LDOV12D_CTRL, 0x24);
2579	/* Enable AFE macro block's bandgap and Mbias. */
2580	rsu_write_1(sc, R92S_AFE_MISC, 0x30);
2581	/* Disable 1.6V LDO. */
2582	rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x56);
2583	rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x43);
2584
2585	/* Firmware - tell it to switch things off */
2586	(void) rsu_set_fw_power_state(sc, RSU_PWR_OFF);
2587}
2588
2589static int
2590rsu_fw_loadsection(struct rsu_softc *sc, const uint8_t *buf, int len)
2591{
2592	const uint8_t which = rsu_wme_ac_xfer_map[WME_AC_VO];
2593	struct rsu_data *data;
2594	struct r92s_tx_desc *txd;
2595	int mlen;
2596
2597	while (len > 0) {
2598		data = rsu_getbuf(sc);
2599		if (data == NULL)
2600			return (ENOMEM);
2601		txd = (struct r92s_tx_desc *)data->buf;
2602		memset(txd, 0, sizeof(*txd));
2603		if (len <= RSU_TXBUFSZ - sizeof(*txd)) {
2604			/* Last chunk. */
2605			txd->txdw0 |= htole32(R92S_TXDW0_LINIP);
2606			mlen = len;
2607		} else
2608			mlen = RSU_TXBUFSZ - sizeof(*txd);
2609		txd->txdw0 |= htole32(SM(R92S_TXDW0_PKTLEN, mlen));
2610		memcpy(&txd[1], buf, mlen);
2611		data->buflen = sizeof(*txd) + mlen;
2612		RSU_DPRINTF(sc, RSU_DEBUG_TX | RSU_DEBUG_FW | RSU_DEBUG_RESET,
2613		    "%s: starting transfer %p\n",
2614		    __func__, data);
2615		STAILQ_INSERT_TAIL(&sc->sc_tx_pending[which], data, next);
2616		buf += mlen;
2617		len -= mlen;
2618	}
2619	usbd_transfer_start(sc->sc_xfer[which]);
2620	return (0);
2621}
2622
2623CTASSERT(sizeof(size_t) >= sizeof(uint32_t));
2624
2625static int
2626rsu_load_firmware(struct rsu_softc *sc)
2627{
2628	const struct r92s_fw_hdr *hdr;
2629	struct r92s_fw_priv *dmem;
2630	struct ieee80211com *ic = &sc->sc_ic;
2631	const uint8_t *imem, *emem;
2632	uint32_t imemsz, ememsz;
2633	const struct firmware *fw;
2634	size_t size;
2635	uint32_t reg;
2636	int ntries, error;
2637
2638	if (rsu_read_1(sc, R92S_TCR) & R92S_TCR_FWRDY) {
2639		RSU_DPRINTF(sc, RSU_DEBUG_ANY,
2640		    "%s: Firmware already loaded\n",
2641		    __func__);
2642		return (0);
2643	}
2644
2645	RSU_UNLOCK(sc);
2646	/* Read firmware image from the filesystem. */
2647	if ((fw = firmware_get("rsu-rtl8712fw")) == NULL) {
2648		device_printf(sc->sc_dev,
2649		    "%s: failed load firmware of file rsu-rtl8712fw\n",
2650		    __func__);
2651		RSU_LOCK(sc);
2652		return (ENXIO);
2653	}
2654	RSU_LOCK(sc);
2655	size = fw->datasize;
2656	if (size < sizeof(*hdr)) {
2657		device_printf(sc->sc_dev, "firmware too short\n");
2658		error = EINVAL;
2659		goto fail;
2660	}
2661	hdr = (const struct r92s_fw_hdr *)fw->data;
2662	if (hdr->signature != htole16(0x8712) &&
2663	    hdr->signature != htole16(0x8192)) {
2664		device_printf(sc->sc_dev,
2665		    "invalid firmware signature 0x%x\n",
2666		    le16toh(hdr->signature));
2667		error = EINVAL;
2668		goto fail;
2669	}
2670	DPRINTF("FW V%d %02x-%02x %02x:%02x\n", le16toh(hdr->version),
2671	    hdr->month, hdr->day, hdr->hour, hdr->minute);
2672
2673	/* Make sure that driver and firmware are in sync. */
2674	if (hdr->privsz != htole32(sizeof(*dmem))) {
2675		device_printf(sc->sc_dev, "unsupported firmware image\n");
2676		error = EINVAL;
2677		goto fail;
2678	}
2679	/* Get FW sections sizes. */
2680	imemsz = le32toh(hdr->imemsz);
2681	ememsz = le32toh(hdr->sramsz);
2682	/* Check that all FW sections fit in image. */
2683	if (imemsz > (size_t)(size - sizeof(*hdr)) ||
2684	    ememsz > (size_t)(size - sizeof(*hdr) - imemsz)) {
2685		device_printf(sc->sc_dev, "firmware too short\n");
2686		error = EINVAL;
2687		goto fail;
2688	}
2689	imem = (const uint8_t *)&hdr[1];
2690	emem = imem + imemsz;
2691
2692	/* Load IMEM section. */
2693	error = rsu_fw_loadsection(sc, imem, imemsz);
2694	if (error != 0) {
2695		device_printf(sc->sc_dev,
2696		    "could not load firmware section %s\n", "IMEM");
2697		goto fail;
2698	}
2699	/* Wait for load to complete. */
2700	for (ntries = 0; ntries != 50; ntries++) {
2701		rsu_ms_delay(sc, 10);
2702		reg = rsu_read_1(sc, R92S_TCR);
2703		if (reg & R92S_TCR_IMEM_CODE_DONE)
2704			break;
2705	}
2706	if (ntries == 50) {
2707		device_printf(sc->sc_dev, "timeout waiting for IMEM transfer\n");
2708		error = ETIMEDOUT;
2709		goto fail;
2710	}
2711	/* Load EMEM section. */
2712	error = rsu_fw_loadsection(sc, emem, ememsz);
2713	if (error != 0) {
2714		device_printf(sc->sc_dev,
2715		    "could not load firmware section %s\n", "EMEM");
2716		goto fail;
2717	}
2718	/* Wait for load to complete. */
2719	for (ntries = 0; ntries != 50; ntries++) {
2720		rsu_ms_delay(sc, 10);
2721		reg = rsu_read_2(sc, R92S_TCR);
2722		if (reg & R92S_TCR_EMEM_CODE_DONE)
2723			break;
2724	}
2725	if (ntries == 50) {
2726		device_printf(sc->sc_dev, "timeout waiting for EMEM transfer\n");
2727		error = ETIMEDOUT;
2728		goto fail;
2729	}
2730	/* Enable CPU. */
2731	rsu_write_1(sc, R92S_SYS_CLKR,
2732	    rsu_read_1(sc, R92S_SYS_CLKR) | R92S_SYS_CPU_CLKSEL);
2733	if (!(rsu_read_1(sc, R92S_SYS_CLKR) & R92S_SYS_CPU_CLKSEL)) {
2734		device_printf(sc->sc_dev, "could not enable system clock\n");
2735		error = EIO;
2736		goto fail;
2737	}
2738	rsu_write_2(sc, R92S_SYS_FUNC_EN,
2739	    rsu_read_2(sc, R92S_SYS_FUNC_EN) | R92S_FEN_CPUEN);
2740	if (!(rsu_read_2(sc, R92S_SYS_FUNC_EN) & R92S_FEN_CPUEN)) {
2741		device_printf(sc->sc_dev,
2742		    "could not enable microcontroller\n");
2743		error = EIO;
2744		goto fail;
2745	}
2746	/* Wait for CPU to initialize. */
2747	for (ntries = 0; ntries < 100; ntries++) {
2748		if (rsu_read_1(sc, R92S_TCR) & R92S_TCR_IMEM_RDY)
2749			break;
2750		rsu_ms_delay(sc, 1);
2751	}
2752	if (ntries == 100) {
2753		device_printf(sc->sc_dev,
2754		    "timeout waiting for microcontroller\n");
2755		error = ETIMEDOUT;
2756		goto fail;
2757	}
2758
2759	/* Update DMEM section before loading. */
2760	dmem = __DECONST(struct r92s_fw_priv *, &hdr->priv);
2761	memset(dmem, 0, sizeof(*dmem));
2762	dmem->hci_sel = R92S_HCI_SEL_USB | R92S_HCI_SEL_8172;
2763	dmem->nendpoints = sc->sc_nendpoints;
2764	dmem->chip_version = sc->cut;
2765	dmem->rf_config = sc->sc_rftype;
2766	dmem->vcs_type = R92S_VCS_TYPE_AUTO;
2767	dmem->vcs_mode = R92S_VCS_MODE_RTS_CTS;
2768	dmem->turbo_mode = 0;
2769	dmem->bw40_en = !! (ic->ic_htcaps & IEEE80211_HTCAP_CHWIDTH40);
2770	dmem->amsdu2ampdu_en = !! (sc->sc_ht);
2771	dmem->ampdu_en = !! (sc->sc_ht);
2772	dmem->agg_offload = !! (sc->sc_ht);
2773	dmem->qos_en = 1;
2774	dmem->ps_offload = 1;
2775	dmem->lowpower_mode = 1;	/* XXX TODO: configurable? */
2776	/* Load DMEM section. */
2777	error = rsu_fw_loadsection(sc, (uint8_t *)dmem, sizeof(*dmem));
2778	if (error != 0) {
2779		device_printf(sc->sc_dev,
2780		    "could not load firmware section %s\n", "DMEM");
2781		goto fail;
2782	}
2783	/* Wait for load to complete. */
2784	for (ntries = 0; ntries < 100; ntries++) {
2785		if (rsu_read_1(sc, R92S_TCR) & R92S_TCR_DMEM_CODE_DONE)
2786			break;
2787		rsu_ms_delay(sc, 1);
2788	}
2789	if (ntries == 100) {
2790		device_printf(sc->sc_dev, "timeout waiting for %s transfer\n",
2791		    "DMEM");
2792		error = ETIMEDOUT;
2793		goto fail;
2794	}
2795	/* Wait for firmware readiness. */
2796	for (ntries = 0; ntries < 60; ntries++) {
2797		if (!(rsu_read_1(sc, R92S_TCR) & R92S_TCR_FWRDY))
2798			break;
2799		rsu_ms_delay(sc, 1);
2800	}
2801	if (ntries == 60) {
2802		device_printf(sc->sc_dev,
2803		    "timeout waiting for firmware readiness\n");
2804		error = ETIMEDOUT;
2805		goto fail;
2806	}
2807 fail:
2808	firmware_put(fw, FIRMWARE_UNLOAD);
2809	return (error);
2810}
2811
2812
2813static int
2814rsu_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
2815    const struct ieee80211_bpf_params *params)
2816{
2817	struct ieee80211com *ic = ni->ni_ic;
2818	struct rsu_softc *sc = ic->ic_softc;
2819	struct rsu_data *bf;
2820
2821	/* prevent management frames from being sent if we're not ready */
2822	if (!sc->sc_running) {
2823		m_freem(m);
2824		return (ENETDOWN);
2825	}
2826	RSU_LOCK(sc);
2827	bf = rsu_getbuf(sc);
2828	if (bf == NULL) {
2829		m_freem(m);
2830		RSU_UNLOCK(sc);
2831		return (ENOBUFS);
2832	}
2833	if (rsu_tx_start(sc, ni, m, bf) != 0) {
2834		m_freem(m);
2835		rsu_freebuf(sc, bf);
2836		RSU_UNLOCK(sc);
2837		return (EIO);
2838	}
2839	RSU_UNLOCK(sc);
2840
2841	return (0);
2842}
2843
2844static void
2845rsu_init(struct rsu_softc *sc)
2846{
2847	struct ieee80211com *ic = &sc->sc_ic;
2848	struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
2849	uint8_t macaddr[IEEE80211_ADDR_LEN];
2850	int error;
2851	int i;
2852
2853	RSU_ASSERT_LOCKED(sc);
2854
2855	/* Ensure the mbuf queue is drained */
2856	rsu_drain_mbufq(sc);
2857
2858	/* Init host async commands ring. */
2859	sc->cmdq.cur = sc->cmdq.next = sc->cmdq.queued = 0;
2860
2861	/* Reset power management state. */
2862	rsu_write_1(sc, R92S_USB_HRPWM, 0);
2863
2864	/* Power on adapter. */
2865	if (sc->cut == 1)
2866		rsu_power_on_acut(sc);
2867	else
2868		rsu_power_on_bcut(sc);
2869
2870	/* Load firmware. */
2871	error = rsu_load_firmware(sc);
2872	if (error != 0)
2873		goto fail;
2874
2875	/* Enable Rx TCP checksum offload. */
2876	rsu_write_4(sc, R92S_RCR,
2877	    rsu_read_4(sc, R92S_RCR) | 0x04000000);
2878	/* Append PHY status. */
2879	rsu_write_4(sc, R92S_RCR,
2880	    rsu_read_4(sc, R92S_RCR) | 0x02000000);
2881
2882	rsu_write_4(sc, R92S_CR,
2883	    rsu_read_4(sc, R92S_CR) & ~0xff000000);
2884
2885	/* Use 128 bytes pages. */
2886	rsu_write_1(sc, 0x00b5,
2887	    rsu_read_1(sc, 0x00b5) | 0x01);
2888	/* Enable USB Rx aggregation. */
2889	rsu_write_1(sc, 0x00bd,
2890	    rsu_read_1(sc, 0x00bd) | 0x80);
2891	/* Set USB Rx aggregation threshold. */
2892	rsu_write_1(sc, 0x00d9, 0x01);
2893	/* Set USB Rx aggregation timeout (1.7ms/4). */
2894	rsu_write_1(sc, 0xfe5b, 0x04);
2895	/* Fix USB Rx FIFO issue. */
2896	rsu_write_1(sc, 0xfe5c,
2897	    rsu_read_1(sc, 0xfe5c) | 0x80);
2898
2899	/* Set MAC address. */
2900	IEEE80211_ADDR_COPY(macaddr, vap ? vap->iv_myaddr : ic->ic_macaddr);
2901	rsu_write_region_1(sc, R92S_MACID, macaddr, IEEE80211_ADDR_LEN);
2902
2903	/* It really takes 1.5 seconds for the firmware to boot: */
2904	rsu_ms_delay(sc, 2000);
2905
2906	RSU_DPRINTF(sc, RSU_DEBUG_RESET, "%s: setting MAC address to %s\n",
2907	    __func__,
2908	    ether_sprintf(macaddr));
2909	error = rsu_fw_cmd(sc, R92S_CMD_SET_MAC_ADDRESS, macaddr,
2910	    IEEE80211_ADDR_LEN);
2911	if (error != 0) {
2912		device_printf(sc->sc_dev, "could not set MAC address\n");
2913		goto fail;
2914	}
2915
2916	/* Set PS mode fully active */
2917	error = rsu_set_fw_power_state(sc, RSU_PWR_ACTIVE);
2918
2919	if (error != 0) {
2920		device_printf(sc->sc_dev, "could not set PS mode\n");
2921		goto fail;
2922	}
2923
2924	sc->sc_scan_pass = 0;
2925	usbd_transfer_start(sc->sc_xfer[RSU_BULK_RX]);
2926
2927	/* We're ready to go. */
2928	sc->sc_running = 1;
2929	sc->sc_scanning = 0;
2930	return;
2931fail:
2932	/* Need to stop all failed transfers, if any */
2933	for (i = 0; i != RSU_N_TRANSFER; i++)
2934		usbd_transfer_stop(sc->sc_xfer[i]);
2935}
2936
2937static void
2938rsu_stop(struct rsu_softc *sc)
2939{
2940	int i;
2941
2942	RSU_ASSERT_LOCKED(sc);
2943
2944	sc->sc_running = 0;
2945	sc->sc_calibrating = 0;
2946	taskqueue_cancel_timeout(taskqueue_thread, &sc->calib_task, NULL);
2947	taskqueue_cancel(taskqueue_thread, &sc->tx_task, NULL);
2948
2949	/* Power off adapter. */
2950	rsu_power_off(sc);
2951
2952	for (i = 0; i < RSU_N_TRANSFER; i++)
2953		usbd_transfer_stop(sc->sc_xfer[i]);
2954
2955	/* Ensure the mbuf queue is drained */
2956	rsu_drain_mbufq(sc);
2957}
2958
2959/*
2960 * Note: usb_pause_mtx() actually releases the mutex before calling pause(),
2961 * which breaks any kind of driver serialisation.
2962 */
2963static void
2964rsu_ms_delay(struct rsu_softc *sc, int ms)
2965{
2966
2967	//usb_pause_mtx(&sc->sc_mtx, hz / 1000);
2968	DELAY(ms * 1000);
2969}
2970