/u-boot/drivers/ddr/fsl/ |
H A D | util.c | 192 uint32_t sdram_cfg = ddr_in32(&ddr->sdram_cfg); local 196 if ((!(sdram_cfg & SDRAM_CFG_MEM_EN)) || 199 sdram_cfg = ddr_in32(&ddr->sdram_cfg); 203 if ((!(sdram_cfg & SDRAM_CFG_MEM_EN)) || 206 sdram_cfg = ddr_in32(&ddr->sdram_cfg); 210 if (!(sdram_cfg & SDRAM_CFG_MEM_EN)) { 216 switch ((sdram_cfg [all...] |
H A D | arm_ddr_gen3.c | 174 ddr_out32(&ddr->sdram_cfg, temp_sdram_cfg); 194 temp_sdram_cfg = (ddr_in32(&ddr->sdram_cfg) | SDRAM_CFG_BI); 197 temp_sdram_cfg = ddr_in32(&ddr->sdram_cfg) & ~SDRAM_CFG_BI; 199 ddr_out32(&ddr->sdram_cfg, temp_sdram_cfg | SDRAM_CFG_MEM_EN); 224 bus_width = 3 - ((ddr_in32(&ddr->sdram_cfg) & SDRAM_CFG_DBW_MASK)
|
H A D | mpc85xx_ddr_gen3.c | 210 out_be32(&ddr->sdram_cfg, temp_sdram_cfg); 225 out_be32(&ddr->sdram_cfg, temp_sdram_cfg | SDRAM_CFG_BI | SDRAM_CFG_MEM_EN); 338 out_be32(&ddr->sdram_cfg, temp_sdram_cfg); 400 if ((((in_be32(&ddr->sdram_cfg) >> 24) & 0x7) == SDRAM_TYPE_DDR2) 401 && in_be32(&ddr->sdram_cfg) & 0x80000) { 443 temp_sdram_cfg = (in_be32(&ddr->sdram_cfg) | SDRAM_CFG_BI); 446 temp_sdram_cfg = (in_be32(&ddr->sdram_cfg) & ~SDRAM_CFG_BI); 449 out_be32(&ddr->sdram_cfg, temp_sdram_cfg | SDRAM_CFG_MEM_EN); 474 bus_width = 3 - ((ddr->sdram_cfg & SDRAM_CFG_DBW_MASK) 581 setbits_be32(&ddr->sdram_cfg, [all...] |
H A D | mpc85xx_ddr_gen1.c | 59 out_be32(&ddr->sdram_cfg, regs->ddr_sdram_cfg);
|
H A D | mpc85xx_ddr_gen2.c | 88 out_be32(&ddr->sdram_cfg, regs->ddr_sdram_cfg);
|
H A D | fsl_ddr_gen4.c | 330 ddr_out32(&ddr->sdram_cfg, temp32); 351 temp32 = (ddr_in32(&ddr->sdram_cfg) | SDRAM_CFG_BI); 354 temp32 = ddr_in32(&ddr->sdram_cfg) & ~SDRAM_CFG_BI; 356 ddr_out32(&ddr->sdram_cfg, temp32 | SDRAM_CFG_MEM_EN); 514 bus_width = 3 - ((ddr_in32(&ddr->sdram_cfg) & SDRAM_CFG_DBW_MASK)
|
H A D | ctrl_regs.c | 2584 u32 sdram_cfg, i, tmp, lanes, ddr_type; local 2587 sdram_cfg = ddr_in32(&ddr->sdram_cfg); 2588 if (sdram_cfg & SDRAM_CFG_32_BE) 2590 else if (sdram_cfg & SDRAM_CFG_16_BE) 2595 if (sdram_cfg & SDRAM_CFG_ECC_EN) 2626 ddr_type = (sdram_cfg & SDRAM_CFG_SDRAM_TYPE_MASK) >>
|
/u-boot/board/socrates/ |
H A D | sdram.c | 35 ddr->sdram_cfg = 0; 50 ddr->sdram_cfg = CFG_SYS_DDR_CONFIG;
|
/u-boot/board/gdsys/mpc8308/ |
H A D | sdram.c | 57 out_be32(&im->ddr.sdram_cfg, CFG_SYS_DDR_SDRAM_CFG); 66 setbits_be32(&im->ddr.sdram_cfg, SDRAM_CFG_MEM_EN);
|
/u-boot/arch/powerpc/cpu/mpc83xx/ |
H A D | spd_sdram.c | 38 printf(" (DDR%d", ((ddr->sdram_cfg & SDRAM_CFG_SDRAM_TYPE_MASK) 42 if ((ddr->sdram_cfg & SDRAM_CFG_DBW_MASK) == SDRAM_CFG_DBW_16) 44 else if ((ddr->sdram_cfg & SDRAM_CFG_DBW_MASK) == SDRAM_CFG_DBW_32) 49 if (ddr->sdram_cfg & SDRAM_CFG_32_BE) 55 if (ddr->sdram_cfg & SDRAM_CFG_ECC_EN) 157 unsigned int sdram_cfg; local 165 clrsetbits_be32(&ddr->sdram_cfg, SDRAM_CFG_MEM_EN, 0); 781 * Figure out the settings for the sdram_cfg register. Build up 782 * the value in 'sdram_cfg' before writing since the write into 786 * sdram_cfg[ [all...] |
H A D | ecc.c | 24 (ddr->sdram_cfg & SDRAM_CFG_ECC_EN) ? "ON" : "OFF");
|
/u-boot/board/freescale/ls1021atsn/ |
H A D | ls1021atsn.c | 34 out_be32(&ddr->sdram_cfg, DDR_SDRAM_CFG); 98 out_be32(&ddr->sdram_cfg, DDR_SDRAM_CFG | temp_sdram_cfg);
|
/u-boot/board/freescale/ls1021aiot/ |
H A D | ls1021aiot.c | 58 out_be32(&ddr->sdram_cfg, DDR_SDRAM_CFG); 98 out_be32(&ddr->sdram_cfg, DDR_SDRAM_CFG | temp_sdram_cfg);
|
/u-boot/board/freescale/mpc837xerdb/ |
H A D | mpc837xerdb.c | 120 im->ddr.sdram_cfg = CFG_SYS_DDR_SDRAM_CFG; 128 im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN;
|
/u-boot/board/keymile/km83xx/ |
H A D | km83xx.c | 222 out_be32(&im->ddr.sdram_cfg, CFG_SYS_DDR_SDRAM_CFG); 229 setbits_be32(&im->ddr.sdram_cfg, SDRAM_CFG_MEM_EN);
|
/u-boot/drivers/ram/ |
H A D | mpc83xx_sdram.c | 343 u32 sdram_cfg; local 920 sdram_cfg = self_refresh << SDRAM_CFG_SREN_SHIFT | 933 out_be32(&im->ddr.sdram_cfg, sdram_cfg); 1051 setbits_be32(&im->ddr.sdram_cfg, SDRAM_CFG_MEM_EN);
|
/u-boot/board/cssi/cmpcpro/ |
H A D | cmpcpro.c | 312 out_be32(&im->ddr.sdram_cfg, CFG_SYS_DDR_SDRAM_CFG); 319 setbits_be32(&im->ddr.sdram_cfg, SDRAM_CFG_MEM_EN);
|
/u-boot/include/ |
H A D | fsl_immap.h | 37 u32 sdram_cfg; /* SDRAM Control Configuration */ member in struct:ccsr_ddr
|
/u-boot/board/freescale/ls1021atwr/ |
H A D | ls1021atwr.c | 149 out_be32(&ddr->sdram_cfg, DDR_SDRAM_CFG); 213 out_be32(&ddr->sdram_cfg, DDR_SDRAM_CFG | temp_sdram_cfg);
|
/u-boot/arch/powerpc/include/asm/ |
H A D | immap_83xx.h | 291 u32 sdram_cfg; /* SDRAM Control Configuration */ member in struct:ddr83xx
|