/u-boot/arch/arm/mach-lpc32xx/ |
H A D | devices.c | 46 .clock = CFG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, 48 .clock = CFG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, 50 .clock = CFG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, 52 .clock = CFG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
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/u-boot/arch/arm/include/asm/arch-rockchip/ |
H A D | uart.h | 11 unsigned int fcr; /* FIFO control register. */ member in struct:rk_uart
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/u-boot/arch/arm/mach-at91/include/mach/ |
H A D | at91_eefc.h | 17 u32 fcr; /* Flash Command Register WO */ member in struct:at91_eefc
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/u-boot/arch/arm/mach-at91/arm926ejs/ |
H A D | eflash.c | 82 writel(AT91_EEFC_FCR_KEY | AT91_EEFC_FCR_FCMD_GETD, &eefc->fcr); 117 writel(AT91_EEFC_FCR_KEY | AT91_EEFC_FCR_FCMD_GLB, &eefc->fcr); 173 (pagenum << AT91_EEFC_FCR_FARG_SHIFT), &eefc->fcr); 176 (pagenum << AT91_EEFC_FCR_FARG_SHIFT), &eefc->fcr); 181 writel(AT91_EEFC_FCR_KEY | AT91_EEFC_FCR_FCMD_GLB, &eefc->fcr); 200 (pagenum << AT91_EEFC_FCR_FARG_SHIFT), &eefc->fcr);
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/u-boot/include/ |
H A D | ns16550.h | 66 * @fcr: Offset of FCR register (normally UART_FCR_DEFVAL) 77 u32 fcr; member in struct:ns16550_plat 89 UART_REG(fcr); /* 2 */ 120 #define iir fcr
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/u-boot/arch/arm/mach-omap2/am33xx/ |
H A D | board.c | 92 .clock = CFG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, 95 .clock = CFG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, 98 .clock = CFG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, 100 .clock = CFG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, 102 .clock = CFG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, 104 .clock = CFG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
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/u-boot/drivers/mtd/nand/raw/ |
H A D | fsl_elbc_spl.c | 66 out_be32(®s->fcr, (NAND_CMD_READ0 << FCR_CMD0_SHIFT) | 75 out_be32(®s->fcr, NAND_CMD_READ0 << FCR_CMD0_SHIFT);
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H A D | fsl_elbc_nand.c | 215 vdbg("fsl_elbc_run_command: fmr=%08x fir=%08x fcr=%08x\n", 216 in_be32(&lbc->fmr), in_be32(&lbc->fir), in_be32(&lbc->fcr)); 266 out_be32(&lbc->fcr, (NAND_CMD_READ0 << FCR_CMD0_SHIFT) | 276 out_be32(&lbc->fcr, 279 out_be32(&lbc->fcr, NAND_CMD_READ0 << FCR_CMD0_SHIFT); 350 out_be32(&lbc->fcr, command << FCR_CMD0_SHIFT); 379 out_be32(&lbc->fcr, 391 u32 fcr; local 400 fcr = (NAND_CMD_SEQIN << FCR_CMD0_SHIFT) | 410 fcr [all...] |
/u-boot/drivers/serial/ |
H A D | serial_coreboot.c | 90 plat->fcr = UART_FCR_DEFVAL; 108 plat->fcr = UART_FCR_DEFVAL;
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H A D | serial_rockchip.c | 35 plat->plat.fcr = UART_FCR_DEFVAL;
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H A D | serial_npcm.c | 23 u32 fcr; /* FIFO Control Register */ member in union:npcm_uart::__anon363 140 writeb(FCR_FME | FCR_RFR | FCR_TFR, &uart->fcr);
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H A D | serial_omap.c | 77 serial_dout(&com_port->fcr, UART_FCR_DEFVAL); 137 plat->fcr = UART_FCR_DEFVAL;
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H A D | serial_mt7620.c | 32 u32 fcr; member in struct:mt7620_serial_regs 143 writel(UART_FCRVAL, &plat->regs->fcr); 228 writel(UART_FCRVAL, &plat.regs->fcr);
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H A D | serial_mtk.c | 27 u32 fcr; member in struct:mtk_serial_regs 45 #define iir fcr 221 writel(UART_FCRVAL, &priv->regs->fcr); 296 writel(UART_FCRVAL, &mtk_hsuart##port.regs->fcr); \ 449 writel(UART_FCRVAL, &priv.regs->fcr);
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H A D | ns16550.c | 193 return plat->fcr; 261 serial_out(ns16550_getfcr(com_port), &com_port->fcr); 282 serial_out(ns16550_getfcr(com_port), &com_port->fcr); 346 serial_dout(&com_port->fcr, UART_FCR_DEFVAL); 589 plat->fcr = UART_FCR_DEFVAL; 591 plat->fcr |= UART_FCR_UME;
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/u-boot/arch/x86/cpu/slimbootloader/ |
H A D | serial.c | 44 plat->fcr = UART_FCR_DEFVAL;
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/u-boot/drivers/net/ |
H A D | ftmac100.h | 33 unsigned int fcr; /* 0x98 */ member in struct:ftmac100
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/u-boot/drivers/i2c/ |
H A D | ast_i2c.c | 76 writel(0, &priv->regs->fcr); 81 &priv->regs->fcr); 330 setbits_le32(®s->fcr, I2CD_M_HIGH_SPEED_EN
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H A D | ast_i2c.h | 11 u32 fcr; member in struct:ast_i2c_regs
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/u-boot/board/timll/devkit8000/ |
H A D | devkit8000.c | 55 .fcr = UART_FCR_DEFVAL,
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/u-boot/board/lg/sniper/ |
H A D | sniper.c | 38 .fcr = UART_FCR_DEFVAL,
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/u-boot/arch/x86/cpu/apollolake/ |
H A D | uart.c | 112 ns.fcr = UART_FCR_DEFVAL;
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/u-boot/drivers/spi/ |
H A D | stm32_qspi.c | 32 u32 fcr; /* 0x0C */ member in struct:stm32_qspi_regs 158 writel(STM32_QSPI_FCR_CTCF | STM32_QSPI_FCR_CTEF, &priv->regs->fcr); 314 writel(STM32_QSPI_FCR_CTCF, &priv->regs->fcr);
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/u-boot/arch/arm/include/asm/arch-imx8ulp/ |
H A D | imx-regs.h | 77 u32 fcr; member in struct:mu_type
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/u-boot/arch/arm/mach-tegra/ |
H A D | board.c | 262 .fcr = UART_FCR_DEFVAL,
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