#
07816f08 |
|
30-Jan-2023 |
Ye Li <ye.li@nxp.com> |
imx: ahab: Move imx9 and imx8ulp AHAB support together Use common file ele_ahab.c for i.MX9 and iMX8ULP AHAB support, since both of them use same sentinel ELE APIs Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> |
#
f3272355 |
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31-Jan-2023 |
Ye Li <ye.li@nxp.com> |
imx: imx8ulp: Get chip revision from Sentinel In both SPL and u-boot, after probing the S400 MU, get the chip revision, lifecycle and UID from Sentinel. Update get_cpu_rev to use the chip revision not hard coded it for A0 Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> |
#
5579d66e |
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06-Apr-2022 |
Ye Li <ye.li@nxp.com> |
imx: imx8ulp: Add M33 handshake functions Add functions to check if M33 image is booted and handshake with M33 image via MU. A core notifies M33 to start init by FCR F0, then wait M33 init done signal by checking FSR F0. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
0f9b10aa |
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28-Oct-2021 |
Alice Guo <alice.guo@nxp.com> |
imx8ulp: clock: Support to enable/disable the ADC1 clock This patch implements enable_adc1_clk() to enable or disable the ADC1 clock on i.MX8ULP. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Alice Guo <alice.guo@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
4b9423e6 |
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07-Aug-2021 |
Peng Fan <peng.fan@nxp.com> |
imx8ulp: move struct mu_type to common header Move struct mu_type to common header to make it reusable by upower and S400 Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
a84dab4f |
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07-Aug-2021 |
Peng Fan <peng.fan@nxp.com> |
arm: imx8ulp: add clock support Add i.MX8ULP clock support Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
9ef89ea9 |
|
07-Aug-2021 |
Peng Fan <peng.fan@nxp.com> |
arm: imx: basic i.MX8ULP support Add basic i.MX8ULP support For the MMU part, Using a simple way the calculate the MMU size to avoid default heavy calcaulation. And align address and size in the table settings to 2MB or 4GB as much as possible. So we can reduce the 4K page allocations in MMU table which will spends much time in create the page table Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
5579d66e |
|
06-Apr-2022 |
Ye Li <ye.li@nxp.com> |
imx: imx8ulp: Add M33 handshake functions Add functions to check if M33 image is booted and handshake with M33 image via MU. A core notifies M33 to start init by FCR F0, then wait M33 init done signal by checking FSR F0. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
0f9b10aa |
|
28-Oct-2021 |
Alice Guo <alice.guo@nxp.com> |
imx8ulp: clock: Support to enable/disable the ADC1 clock This patch implements enable_adc1_clk() to enable or disable the ADC1 clock on i.MX8ULP. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Alice Guo <alice.guo@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
4b9423e6 |
|
07-Aug-2021 |
Peng Fan <peng.fan@nxp.com> |
imx8ulp: move struct mu_type to common header Move struct mu_type to common header to make it reusable by upower and S400 Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
a84dab4f |
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07-Aug-2021 |
Peng Fan <peng.fan@nxp.com> |
arm: imx8ulp: add clock support Add i.MX8ULP clock support Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
9ef89ea9 |
|
07-Aug-2021 |
Peng Fan <peng.fan@nxp.com> |
arm: imx: basic i.MX8ULP support Add basic i.MX8ULP support For the MMU part, Using a simple way the calculate the MMU size to avoid default heavy calcaulation. And align address and size in the table settings to 2MB or 4GB as much as possible. So we can reduce the 4K page allocations in MMU table which will spends much time in create the page table Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
0f9b10aa |
|
28-Oct-2021 |
Alice Guo <alice.guo@nxp.com> |
imx8ulp: clock: Support to enable/disable the ADC1 clock This patch implements enable_adc1_clk() to enable or disable the ADC1 clock on i.MX8ULP. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Alice Guo <alice.guo@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
4b9423e6 |
|
07-Aug-2021 |
Peng Fan <peng.fan@nxp.com> |
imx8ulp: move struct mu_type to common header Move struct mu_type to common header to make it reusable by upower and S400 Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
a84dab4f |
|
07-Aug-2021 |
Peng Fan <peng.fan@nxp.com> |
arm: imx8ulp: add clock support Add i.MX8ULP clock support Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
9ef89ea9 |
|
07-Aug-2021 |
Peng Fan <peng.fan@nxp.com> |
arm: imx: basic i.MX8ULP support Add basic i.MX8ULP support For the MMU part, Using a simple way the calculate the MMU size to avoid default heavy calcaulation. And align address and size in the table settings to 2MB or 4GB as much as possible. So we can reduce the 4K page allocations in MMU table which will spends much time in create the page table Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
4b9423e6 |
|
07-Aug-2021 |
Peng Fan <peng.fan@nxp.com> |
imx8ulp: move struct mu_type to common header Move struct mu_type to common header to make it reusable by upower and S400 Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
a84dab4f |
|
07-Aug-2021 |
Peng Fan <peng.fan@nxp.com> |
arm: imx8ulp: add clock support Add i.MX8ULP clock support Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
9ef89ea9 |
|
07-Aug-2021 |
Peng Fan <peng.fan@nxp.com> |
arm: imx: basic i.MX8ULP support Add basic i.MX8ULP support For the MMU part, Using a simple way the calculate the MMU size to avoid default heavy calcaulation. And align address and size in the table settings to 2MB or 4GB as much as possible. So we can reduce the 4K page allocations in MMU table which will spends much time in create the page table Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |