1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2004-2008
4 * Texas Instruments, <www.ti.com>
5 *
6 * Author :
7 *	Sunil Kumar <sunilsaini05@gmail.com>
8 *	Shashi Ranjan <shashiranjanmca05@gmail.com>
9 *
10 * (C) Copyright 2009
11 * Frederik Kriewitz <frederik@kriewitz.eu>
12 *
13 * Derived from Beagle Board and 3430 SDP code by
14 *	Richard Woodruff <r-woodruff2@ti.com>
15 *	Syed Mohammed Khasim <khasim@ti.com>
16 *
17 */
18#include <common.h>
19#include <dm.h>
20#include <env.h>
21#include <init.h>
22#include <malloc.h>
23#include <ns16550.h>
24#include <twl4030.h>
25#include <asm/global_data.h>
26#include <asm/io.h>
27#include <asm/arch/mmc_host_def.h>
28#include <asm/arch/mux.h>
29#include <asm/arch/sys_proto.h>
30#include <asm/arch/mem.h>
31#include <asm/mach-types.h>
32#include "devkit8000.h"
33#include <asm/gpio.h>
34#ifdef CONFIG_DRIVER_DM9000
35#include <net.h>
36#include <netdev.h>
37#endif
38
39DECLARE_GLOBAL_DATA_PTR;
40
41static u32 gpmc_net_config[GPMC_MAX_REG] = {
42	NET_GPMC_CONFIG1,
43	NET_GPMC_CONFIG2,
44	NET_GPMC_CONFIG3,
45	NET_GPMC_CONFIG4,
46	NET_GPMC_CONFIG5,
47	NET_GPMC_CONFIG6,
48	0
49};
50
51static const struct ns16550_plat devkit8000_serial = {
52	.base = OMAP34XX_UART3,
53	.reg_shift = 2,
54	.clock = V_NS16550_CLK,
55	.fcr = UART_FCR_DEFVAL,
56};
57
58U_BOOT_DRVINFO(devkit8000_uart) = {
59	"ns16550_serial",
60	&devkit8000_serial
61};
62
63/*
64 * Routine: board_init
65 * Description: Early hardware init.
66 */
67int board_init(void)
68{
69	gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
70	/* board id for Linux */
71	gd->bd->bi_arch_number = MACH_TYPE_DEVKIT8000;
72	/* boot param addr */
73	gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
74
75	return 0;
76}
77
78/* Configure GPMC registers for DM9000 */
79#define DM9000_BASE	0x2c000000
80static void gpmc_dm9000_config(void)
81{
82	enable_gpmc_cs_config(gpmc_net_config, &gpmc_cfg->cs[6],
83		DM9000_BASE, GPMC_SIZE_16M);
84}
85
86/*
87 * Routine: misc_init_r
88 * Description: Configure board specific parts
89 */
90int misc_init_r(void)
91{
92	struct ctrl_id *id_base = (struct ctrl_id *)OMAP34XX_ID_L4_IO_BASE;
93#ifdef CONFIG_DRIVER_DM9000
94	uchar enetaddr[6];
95	u32 die_id_0;
96#endif
97
98	twl4030_power_init();
99#ifdef CONFIG_TWL4030_LED
100	twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
101#endif
102
103#ifdef CONFIG_DRIVER_DM9000
104	gpmc_dm9000_config();
105
106	/* Use OMAP DIE_ID as MAC address */
107	if (!eth_env_get_enetaddr("ethaddr", enetaddr)) {
108		printf("ethaddr not set, using Die ID\n");
109		die_id_0 = readl(&id_base->die_id_0);
110		enetaddr[0] = 0x02; /* locally administered */
111		enetaddr[1] = readl(&id_base->die_id_1) & 0xff;
112		enetaddr[2] = (die_id_0 & 0xff000000) >> 24;
113		enetaddr[3] = (die_id_0 & 0x00ff0000) >> 16;
114		enetaddr[4] = (die_id_0 & 0x0000ff00) >> 8;
115		enetaddr[5] = (die_id_0 & 0x000000ff);
116		eth_env_set_enetaddr("ethaddr", enetaddr);
117	}
118#endif
119
120	omap_die_id_display();
121
122	return 0;
123}
124
125/*
126 * Routine: set_muxconf_regs
127 * Description: Setting up the configuration Mux registers specific to the
128 *		hardware. Many pins need to be moved from protect to primary
129 *		mode.
130 */
131void set_muxconf_regs(void)
132{
133	MUX_DEVKIT8000();
134}
135
136#if defined(CONFIG_MMC)
137int board_mmc_init(struct bd_info *bis)
138{
139	return omap_mmc_init(0, 0, 0, -1, -1);
140}
141#endif
142
143#if defined(CONFIG_MMC)
144void board_mmc_power_init(void)
145{
146	twl4030_power_mmc_init(0);
147}
148#endif
149
150#if defined(CONFIG_DRIVER_DM9000) & !defined(CONFIG_SPL_BUILD)
151/*
152 * Routine: board_eth_init
153 * Description: Setting up the Ethernet hardware.
154 */
155int board_eth_init(struct bd_info *bis)
156{
157	return dm9000_initialize(bis);
158}
159#endif
160
161#ifdef CONFIG_SPL_OS_BOOT
162/*
163 * Do board specific preparation before SPL
164 * Linux boot
165 */
166void spl_board_prepare_for_linux(void)
167{
168	gpmc_dm9000_config();
169}
170
171/*
172 * devkit8000 specific implementation of spl_start_uboot()
173 *
174 * RETURN
175 * 0 if the button is not pressed
176 * 1 if the button is pressed
177 */
178int spl_start_uboot(void)
179{
180	int val = 0;
181	if (!gpio_request(SPL_OS_BOOT_KEY, "U-Boot key")) {
182		gpio_direction_input(SPL_OS_BOOT_KEY);
183		val = gpio_get_value(SPL_OS_BOOT_KEY);
184		gpio_free(SPL_OS_BOOT_KEY);
185	}
186	return !val;
187}
188#endif
189
190/*
191 * Routine: get_board_mem_timings
192 * Description: If we use SPL then there is no x-loader nor config header
193 * so we have to setup the DDR timings ourself on the first bank.  This
194 * provides the timing values back to the function that configures
195 * the memory.  We have either one or two banks of 128MB DDR.
196 */
197void get_board_mem_timings(struct board_sdrc_timings *timings)
198{
199	/* General SDRC config */
200	timings->mcfg = MICRON_V_MCFG_165(128 << 20);
201	timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
202
203	/* AC timings */
204	timings->ctrla = MICRON_V_ACTIMA_165;
205	timings->ctrlb = MICRON_V_ACTIMB_165;
206
207	timings->mr = MICRON_V_MR_165;
208}
209