Searched refs:ShiftAmt (Results 1 - 16 of 16) sorted by relevance

/macosx-10.9.5/llvmCore-3425.0.33/lib/Transforms/InstCombine/
H A DInstCombineSimplifyDemanded.cpp583 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth-1); local
584 APInt DemandedMaskIn(DemandedMask.lshr(ShiftAmt));
589 DemandedMaskIn |= APInt::getHighBitsSet(BitWidth, ShiftAmt+1);
591 DemandedMaskIn |= APInt::getHighBitsSet(BitWidth, ShiftAmt);
597 KnownZero <<= ShiftAmt; local
598 KnownOne <<= ShiftAmt; local
600 if (ShiftAmt)
601 KnownZero |= APInt::getLowBitsSet(BitWidth, ShiftAmt);
607 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth-1); local
610 APInt DemandedMaskIn(DemandedMask.shl(ShiftAmt));
648 uint32_t ShiftAmt = SA->getLimitedValue(BitWidth-1); local
[all...]
H A DInstCombineCasts.cpp560 uint32_t ShiftAmt = KnownZeroMask.logBase2(); local
562 if (ShiftAmt) {
565 In = Builder->CreateLShr(In, ConstantInt::get(In->getType(),ShiftAmt),
927 unsigned ShiftAmt = KnownZeroMask.countTrailingZeros(); local
929 if (ShiftAmt)
931 ConstantInt::get(In->getType(), ShiftAmt));
941 unsigned ShiftAmt = KnownZeroMask.countLeadingZeros(); local
943 if (ShiftAmt)
945 ConstantInt::get(In->getType(), ShiftAmt));
/macosx-10.9.5/llvmCore-3425.0.33/lib/Analysis/
H A DValueTracking.cpp475 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth); local
478 KnownZero <<= ShiftAmt; local
479 KnownOne <<= ShiftAmt; local
480 KnownZero |= APInt::getLowBitsSet(BitWidth, ShiftAmt); // low bits known 0
488 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth); local
493 KnownZero = APIntOps::lshr(KnownZero, ShiftAmt);
494 KnownOne = APIntOps::lshr(KnownOne, ShiftAmt);
496 KnownZero |= APInt::getHighBitsSet(BitWidth, ShiftAmt);
504 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth-1); local
509 KnownZero = APIntOps::lshr(KnownZero, ShiftAmt);
[all...]
H A DConstantFolding.cpp168 unsigned ShiftAmt = isLittleEndian ? 0 : SrcBitSize*(Ratio-1); local
179 ConstantInt::get(Src->getType(), ShiftAmt));
180 ShiftAmt += isLittleEndian ? SrcBitSize : -SrcBitSize;
200 unsigned ShiftAmt = isLittleEndian ? 0 : DstBitSize*(Ratio-1); local
205 ConstantInt::get(Src->getType(), ShiftAmt));
206 ShiftAmt += isLittleEndian ? DstBitSize : -DstBitSize;
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/CellSPU/
H A DSPUISelDAGToDAG.cpp906 SDValue ShiftAmt = N->getOperand(1); local
907 EVT ShiftAmtVT = ShiftAmt.getValueType();
923 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(ShiftAmt)) {
943 ShiftAmt,
947 ShiftAmt,
974 SDValue ShiftAmt = N->getOperand(1); local
975 EVT ShiftAmtVT = ShiftAmt.getValueType();
982 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(ShiftAmt)) {
1002 ShiftAmt,
1006 ShiftAmt,
1043 SDValue ShiftAmt = N->getOperand(1); local
[all...]
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/
H A DARMCodeEmitter.cpp1416 unsigned ShiftAmt = MI.getOperand(OpIdx).getImm();
1418 assert(ShiftAmt != 0 && "PKHTB shift_imm is 0!");
1419 if (ShiftAmt == 32)
1420 ShiftAmt = 0;
1422 assert(ShiftAmt < 32 && "shift_imm range is 0 to 31!");
1423 Binary |= ShiftAmt << ARMII::ShiftShift;
1459 unsigned ShiftAmt = MI.getOperand(3).getImm();
1460 if (ShiftAmt == 32 && Opc == ARM_AM::asr)
1461 ShiftAmt = 0;
1462 assert(ShiftAmt < 3
[all...]
H A DARMISelLowering.cpp7542 unsigned ShiftAmt = CountTrailingZeros_64(MulAmt); local
7544 ShiftAmt = ShiftAmt & (32 - 1);
7549 MulAmt >>= ShiftAmt; local
7595 if (ShiftAmt != 0)
7597 Res, DAG.getConstant(ShiftAmt, MVT::i32));
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Mips/
H A DMipsISelLowering.cpp1267 unsigned ShiftAmt = RegInfo.createVirtualRegister(RC); local
1322 BuildMI(BB, dl, TII->get(Mips::SLL), ShiftAmt).addReg(PtrLSB2).addImm(3);
1326 .addReg(ShiftAmt).addReg(MaskUpper);
1328 BuildMI(BB, dl, TII->get(Mips::SLLV), Incr2).addReg(ShiftAmt).addReg(Incr);
1389 .addReg(ShiftAmt).addReg(MaskedOldVal1);
1503 unsigned ShiftAmt = RegInfo.createVirtualRegister(RC); local
1565 BuildMI(BB, dl, TII->get(Mips::SLL), ShiftAmt).addReg(PtrLSB2).addImm(3);
1569 .addReg(ShiftAmt).addReg(MaskUpper);
1574 .addReg(ShiftAmt).addReg(MaskedCmpVal);
1578 .addReg(ShiftAmt)
2755 unsigned ShiftAmt = isLittle ? 16 : 8; local
[all...]
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp823 unsigned ShiftAmt = Shift.getConstantOperandVal(1); local
824 if (ShiftAmt != 1 && ShiftAmt != 2 && ShiftAmt != 3)
829 SDValue NewMask = DAG.getConstant(Mask >> ShiftAmt, VT);
843 AM.Scale = 1 << ShiftAmt;
883 unsigned ShiftAmt = Shift.getConstantOperandVal(1); local
900 MaskLZ -= (64 - X.getValueSizeInBits()) + ShiftAmt;
935 SDValue NewSRLAmt = DAG.getConstant(ShiftAmt + AMShiftAmt, MVT::i8);
H A DX86ISelLowering.cpp9730 uint32_t ShiftAmt = cast<ConstantSDNode>(ShAmt)->getZExtValue(); local
9737 DAG.getConstant(ShiftAmt, MVT::i32));
10813 uint64_t ShiftAmt = C->getZExtValue(); local
10820 DAG.getConstant(ShiftAmt, MVT::i32));
10823 DAG.getConstant(ShiftAmt, MVT::i32));
10826 DAG.getConstant(ShiftAmt, MVT::i32));
10833 DAG.getConstant(ShiftAmt, MVT::i32));
10837 DAG.getConstant(uint8_t(-1U << ShiftAmt),
10845 DAG.getConstant(ShiftAmt, MVT::i32));
10849 DAG.getConstant(uint8_t(-1U) >> ShiftAmt,
[all...]
/macosx-10.9.5/llvmCore-3425.0.33/lib/Transforms/Scalar/
H A DGVN.cpp1028 unsigned ShiftAmt; local
1030 ShiftAmt = Offset*8;
1032 ShiftAmt = (StoreSize-LoadSize-Offset)*8;
1034 if (ShiftAmt)
1035 SrcVal = Builder.CreateLShr(SrcVal, ShiftAmt);
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/PowerPC/
H A DPPCISelLowering.cpp658 unsigned ShiftAmt = SVOp->getMaskElt(i); local
659 if (ShiftAmt < i) return -1;
660 ShiftAmt -= i;
665 if (!isConstantOrUndef(SVOp->getMaskElt(i), ShiftAmt+i))
670 if (!isConstantOrUndef(SVOp->getMaskElt(i), (ShiftAmt+i) & 15))
673 return ShiftAmt;
2136 SDValue ShiftAmt = DAG.getConstant(64 - 8 * ObjSize, PtrVT); local
2137 Shifted = DAG.getNode(ISD::SHL, dl, PtrVT, Val, ShiftAmt);
/macosx-10.9.5/llvmCore-3425.0.33/lib/Transforms/Utils/
H A DSimplifyCFG.cpp3390 Value *ShiftAmt = Builder.CreateZExtOrTrunc(Index, MapTy, "switch.cast"); local
3393 ShiftAmt = Builder.CreateMul(ShiftAmt,
3398 Value *DownShifted = Builder.CreateLShr(BitMap, ShiftAmt,
/macosx-10.9.5/llvmCore-3425.0.33/lib/Support/
H A DAPInt.cpp2177 unsigned ShiftAmt = (Radix == 16 ? 4 : (Radix == 8 ? 3 : 1));
2183 Tmp = Tmp.lshr(ShiftAmt);
/macosx-10.9.5/llvmCore-3425.0.33/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp1590 SDValue ShiftAmt = TLO.DAG.getConstant(BitWidth - ShAmt, ShiftAmtTy); local
1592 Op.getValueType(), InOp, ShiftAmt));
H A DDAGCombiner.cpp3705 signed ShiftAmt = N1C->getZExtValue() - N01C->getZExtValue(); local
3711 if ((ShiftAmt > 0) &&
3716 SDValue Amt = DAG.getConstant(ShiftAmt,
3863 uint64_t ShiftAmt = N1C->getZExtValue(); local
3866 DAG.getConstant(ShiftAmt, getShiftAmountTy(SmallVT)));

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