/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/contrib/ath_hal/ar9300/ |
H A D | ar9300_radio.c | 85 u_int32_t freq, channel_sel, reg32; local 213 reg32 = (b_mode << 29); 214 OS_REG_WRITE(ah, AR_PHY_SYNTH_CONTROL, reg32); 221 reg32 = 227 reg32 += CHANSEL_5G_DOT5MHZ; 229 OS_REG_WRITE(ah, AR_PHY_65NM_CH0_SYNTH7, reg32); 232 reg32 |= load_synth_channel << 31; 233 OS_REG_WRITE(ah, AR_PHY_65NM_CH0_SYNTH7, reg32);
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/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5212/ |
H A D | ar5212_rfgain.c | 96 uint32_t reg32 = 0, mask, arrayEntry, lastBit; local 113 reg32 |= (((rfBuf[arrayEntry] & mask) >> (column * 8)) >> 120 reg32 = ath_hal_reverseBits(reg32, numBits); 121 return reg32;
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H A D | ar5111.c | 61 extern void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32, 83 uint32_t refClk, reg32, data2111; local 174 reg32 = ath_hal_reverseBits(chan5111 - 24, 8) & 0xff; 177 reg32 = ath_hal_reverseBits(((chan5111 - 24)/2), 8) & 0xff; 181 reg32 = (reg32 << 2) | (refClk << 1) | (1 << 10) | 0x1; 182 OS_REG_WRITE(ah, AR_PHY(0x27), ((data2111 & 0xff) << 8) | (reg32 & 0xff)); 183 reg32 >>= 8; 184 OS_REG_WRITE(ah, AR_PHY(0x34), (data2111 & 0xff00) | (reg32 & 0xff));
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H A D | ar5413.c | 62 extern void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32, 86 uint32_t reg32 = 0; local 141 reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) | 143 OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff); 145 reg32 >>= 8; 146 OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f); 554 uint32_t reg32, regoffset; local 629 reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0) | 633 OS_REG_WRITE(ah, regoffset, reg32);
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H A D | ar2316.c | 66 extern void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32, 99 uint32_t reg32 = 0; local 149 reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) | 151 OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff); 153 reg32 >>= 8; 154 OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f); 516 uint32_t reg32, regoffset; local 591 reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0) | 595 OS_REG_WRITE(ah, regoffset, reg32);
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H A D | ar2317.c | 66 extern void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32, 90 uint32_t reg32 = 0; local 126 reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) | 128 OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff); 130 reg32 >>= 8; 131 OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f); 494 uint32_t reg32, regoffset; local 569 reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0) | 573 OS_REG_WRITE(ah, regoffset, reg32);
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H A D | ar2413.c | 62 extern void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32, 86 uint32_t reg32 = 0; local 141 reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) | 143 OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff); 145 reg32 >>= 8; 146 OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f); 511 uint32_t reg32, regoffset; local 586 reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0) | 590 OS_REG_WRITE(ah, regoffset, reg32);
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H A D | ar2425.c | 50 extern void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32, 93 uint32_t reg32 = 0; local 136 reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) | 138 OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff); 140 reg32 >>= 8; 141 OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f); 510 uint32_t i, reg32, regoffset; local 547 reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0) | 551 OS_REG_WRITE(ah, regoffset, reg32);
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H A D | ar5112.c | 62 extern void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32, 86 uint32_t reg32 = 0; local 141 reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) | 143 OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff); 145 reg32 >>= 8; 146 OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f);
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H A D | ar5212_reset.c | 70 void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32, 2674 ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32, uint32_t numBits, argument 2685 tmp32 = ath_hal_reverseBits(reg32, numBits);
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/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar9002/ |
H A D | ar9280.c | 78 uint32_t freq, ndiv, channelSel = 0, channelFrac = 0, reg32 = 0; local 88 reg32 = OS_REG_READ(ah, AR_PHY_SYNTH_CONTROL); 89 reg32 &= 0xc0000000; 208 reg32 = reg32 | (bMode << 29) | (fracMode << 28) | 211 OS_REG_WRITE(ah, AR_PHY_SYNTH_CONTROL, reg32);
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H A D | ar9287.c | 78 uint32_t freq, ndiv, channelSel = 0, channelFrac = 0, reg32 = 0; local 87 reg32 = OS_REG_READ(ah, AR_PHY_SYNTH_CONTROL); 88 reg32 &= 0xc0000000; 150 reg32 = reg32 | (bMode << 29) | (fracMode << 28) | 153 OS_REG_WRITE(ah, AR_PHY_SYNTH_CONTROL, reg32);
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/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5416/ |
H A D | ar2133.c | 51 void ar5416ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32, 132 uint32_t reg32 = 0; local 221 reg32 = (channelSel << 8) | (aModeRefSel << 2) | (bModeSynth << 1) | 224 OS_REG_WRITE(ah, AR_PHY(0x37), reg32);
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H A D | ar5416_reset.c | 2316 int reg32; local 2322 reg32 = ((pdadcValues[4*j + 0] & 0xFF) << 0) | 2326 OS_REG_WRITE(ah, regOffset, reg32);
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/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5211/ |
H A D | ar5211_reset.c | 789 uint32_t refClk, reg32, data2111; local 808 reg32 = ath_hal_reverseBits(chan5111 - 24, 8) & 0xFF; 811 reg32 = ath_hal_reverseBits(((chan5111 - 24) / 2), 8) & 0xFF; 815 reg32 = (reg32 << 2) | (refClk << 1) | (1 << 10) | 0x1; 816 OS_REG_WRITE(ah, AR_PHY(0x27), ((data2111 & 0xff) << 8) | (reg32 & 0xff)); 817 reg32 >>= 8; 818 OS_REG_WRITE(ah, AR_PHY(0x34), (data2111 & 0xff00) | (reg32 & 0xff));
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