1/*- 2 * SPDX-License-Identifier: ISC 3 * 4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 5 * Copyright (c) 2002-2008 Atheros Communications, Inc. 6 * 7 * Permission to use, copy, modify, and/or distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 * 19 * $FreeBSD: releng/12.0/sys/dev/ath/ath_hal/ar5212/ar2425.c 326695 2017-12-08 15:57:29Z pfg $ 20 */ 21#include "opt_ah.h" 22 23#include "ah.h" 24#include "ah_internal.h" 25 26#include "ar5212/ar5212.h" 27#include "ar5212/ar5212reg.h" 28#include "ar5212/ar5212phy.h" 29 30#include "ah_eeprom_v3.h" 31 32#define AH_5212_2425 33#define AH_5212_2417 34#include "ar5212/ar5212.ini" 35 36#define N(a) (sizeof(a)/sizeof(a[0])) 37 38struct ar2425State { 39 RF_HAL_FUNCS base; /* public state, must be first */ 40 uint16_t pcdacTable[PWR_TABLE_SIZE_2413]; 41 42 uint32_t Bank1Data[N(ar5212Bank1_2425)]; 43 uint32_t Bank2Data[N(ar5212Bank2_2425)]; 44 uint32_t Bank3Data[N(ar5212Bank3_2425)]; 45 uint32_t Bank6Data[N(ar5212Bank6_2425)]; /* 2417 is same size */ 46 uint32_t Bank7Data[N(ar5212Bank7_2425)]; 47}; 48#define AR2425(ah) ((struct ar2425State *) AH5212(ah)->ah_rfHal) 49 50extern void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32, 51 uint32_t numBits, uint32_t firstBit, uint32_t column); 52 53static void 54ar2425WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, 55 int writes) 56{ 57 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_2425, modesIndex, writes); 58 HAL_INI_WRITE_ARRAY(ah, ar5212Common_2425, 1, writes); 59 HAL_INI_WRITE_ARRAY(ah, ar5212BB_RfGain_2425, freqIndex, writes); 60#if 0 61 /* 62 * for SWAN similar to Condor 63 * Bit 0 enables link to go to L1 when MAC goes to sleep. 64 * Bit 3 enables the loop back the link down to reset. 65 */ 66 if (AH_PRIVATE(ah)->ah_ispcie && && ath_hal_pcieL1SKPEnable) { 67 OS_REG_WRITE(ah, AR_PCIE_PMC, 68 AR_PCIE_PMC_ENA_L1 | AR_PCIE_PMC_ENA_RESET); 69 } 70 /* 71 * for Standby issue in Swan/Condor. 72 * Bit 9 (MAC_WOW_PWR_STATE_MASK_D2)to be set to avoid skips 73 * before last Training Sequence 2 (TS2) 74 * Bit 8 (MAC_WOW_PWR_STATE_MASK_D1)to be unset to assert 75 * Power Reset along with PCI Reset 76 */ 77 OS_REG_SET_BIT(ah, AR_PCIE_PMC, MAC_WOW_PWR_STATE_MASK_D2); 78#endif 79} 80 81/* 82 * Take the MHz channel value and set the Channel value 83 * 84 * ASSUMES: Writes enabled to analog bus 85 */ 86static HAL_BOOL 87ar2425SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan) 88{ 89 uint16_t freq = ath_hal_gethwchannel(ah, chan); 90 uint32_t channelSel = 0; 91 uint32_t bModeSynth = 0; 92 uint32_t aModeRefSel = 0; 93 uint32_t reg32 = 0; 94 95 OS_MARK(ah, AH_MARK_SETCHANNEL, freq); 96 97 if (freq < 4800) { 98 uint32_t txctl; 99 100 channelSel = freq - 2272; 101 channelSel = ath_hal_reverseBits(channelSel, 8); 102 103 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL); 104 if (freq == 2484) { 105 // Enable channel spreading for channel 14 106 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, 107 txctl | AR_PHY_CCK_TX_CTRL_JAPAN); 108 } else { 109 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, 110 txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN); 111 } 112 113 } else if (((freq % 5) == 2) && (freq <= 5435)) { 114 freq = freq - 2; /* Align to even 5MHz raster */ 115 channelSel = ath_hal_reverseBits( 116 (uint32_t)(((freq - 4800)*10)/25 + 1), 8); 117 aModeRefSel = ath_hal_reverseBits(0, 2); 118 } else if ((freq % 20) == 0 && freq >= 5120) { 119 channelSel = ath_hal_reverseBits( 120 ((freq - 4800) / 20 << 2), 8); 121 aModeRefSel = ath_hal_reverseBits(1, 2); 122 } else if ((freq % 10) == 0) { 123 channelSel = ath_hal_reverseBits( 124 ((freq - 4800) / 10 << 1), 8); 125 aModeRefSel = ath_hal_reverseBits(1, 2); 126 } else if ((freq % 5) == 0) { 127 channelSel = ath_hal_reverseBits( 128 (freq - 4800) / 5, 8); 129 aModeRefSel = ath_hal_reverseBits(1, 2); 130 } else { 131 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n", 132 __func__, freq); 133 return AH_FALSE; 134 } 135 136 reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) | 137 (1 << 12) | 0x1; 138 OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff); 139 140 reg32 >>= 8; 141 OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f); 142 143 AH_PRIVATE(ah)->ah_curchan = chan; 144 return AH_TRUE; 145} 146 147/* 148 * Reads EEPROM header info from device structure and programs 149 * all rf registers 150 * 151 * REQUIRES: Access to the analog rf device 152 */ 153static HAL_BOOL 154ar2425SetRfRegs(struct ath_hal *ah, 155 const struct ieee80211_channel *chan, 156 uint16_t modesIndex, uint16_t *rfXpdGain) 157{ 158#define RF_BANK_SETUP(_priv, _ix, _col) do { \ 159 int i; \ 160 for (i = 0; i < N(ar5212Bank##_ix##_2425); i++) \ 161 (_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_2425[i][_col];\ 162} while (0) 163 struct ath_hal_5212 *ahp = AH5212(ah); 164 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; 165 struct ar2425State *priv = AR2425(ah); 166 uint16_t ob2GHz = 0, db2GHz = 0; 167 int regWrites = 0; 168 169 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n", 170 __func__, chan->ic_freq, chan->ic_flags, modesIndex); 171 172 HALASSERT(priv); 173 174 /* Setup rf parameters */ 175 if (IEEE80211_IS_CHAN_B(chan)) { 176 ob2GHz = ee->ee_obFor24; 177 db2GHz = ee->ee_dbFor24; 178 } else { 179 ob2GHz = ee->ee_obFor24g; 180 db2GHz = ee->ee_dbFor24g; 181 } 182 183 /* Bank 1 Write */ 184 RF_BANK_SETUP(priv, 1, 1); 185 186 /* Bank 2 Write */ 187 RF_BANK_SETUP(priv, 2, modesIndex); 188 189 /* Bank 3 Write */ 190 RF_BANK_SETUP(priv, 3, modesIndex); 191 192 /* Bank 6 Write */ 193 RF_BANK_SETUP(priv, 6, modesIndex); 194 195 ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz, 3, 193, 0); 196 ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz, 3, 190, 0); 197 198 /* Bank 7 Setup */ 199 RF_BANK_SETUP(priv, 7, modesIndex); 200 201 /* Write Analog registers */ 202 HAL_INI_WRITE_BANK(ah, ar5212Bank1_2425, priv->Bank1Data, regWrites); 203 HAL_INI_WRITE_BANK(ah, ar5212Bank2_2425, priv->Bank2Data, regWrites); 204 HAL_INI_WRITE_BANK(ah, ar5212Bank3_2425, priv->Bank3Data, regWrites); 205 if (IS_2417(ah)) { 206 HALASSERT(N(ar5212Bank6_2425) == N(ar5212Bank6_2417)); 207 HAL_INI_WRITE_BANK(ah, ar5212Bank6_2417, priv->Bank6Data, 208 regWrites); 209 } else 210 HAL_INI_WRITE_BANK(ah, ar5212Bank6_2425, priv->Bank6Data, 211 regWrites); 212 HAL_INI_WRITE_BANK(ah, ar5212Bank7_2425, priv->Bank7Data, regWrites); 213 214 /* Now that we have reprogrammed rfgain value, clear the flag. */ 215 ahp->ah_rfgainState = HAL_RFGAIN_INACTIVE; 216 217 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "<==%s\n", __func__); 218 return AH_TRUE; 219#undef RF_BANK_SETUP 220} 221 222/* 223 * Return a reference to the requested RF Bank. 224 */ 225static uint32_t * 226ar2425GetRfBank(struct ath_hal *ah, int bank) 227{ 228 struct ar2425State *priv = AR2425(ah); 229 230 HALASSERT(priv != AH_NULL); 231 switch (bank) { 232 case 1: return priv->Bank1Data; 233 case 2: return priv->Bank2Data; 234 case 3: return priv->Bank3Data; 235 case 6: return priv->Bank6Data; 236 case 7: return priv->Bank7Data; 237 } 238 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n", 239 __func__, bank); 240 return AH_NULL; 241} 242 243/* 244 * Return indices surrounding the value in sorted integer lists. 245 * 246 * NB: the input list is assumed to be sorted in ascending order 247 */ 248static void 249GetLowerUpperIndex(int16_t v, const uint16_t *lp, uint16_t listSize, 250 uint32_t *vlo, uint32_t *vhi) 251{ 252 int16_t target = v; 253 const uint16_t *ep = lp+listSize; 254 const uint16_t *tp; 255 256 /* 257 * Check first and last elements for out-of-bounds conditions. 258 */ 259 if (target < lp[0]) { 260 *vlo = *vhi = 0; 261 return; 262 } 263 if (target >= ep[-1]) { 264 *vlo = *vhi = listSize - 1; 265 return; 266 } 267 268 /* look for value being near or between 2 values in list */ 269 for (tp = lp; tp < ep; tp++) { 270 /* 271 * If value is close to the current value of the list 272 * then target is not between values, it is one of the values 273 */ 274 if (*tp == target) { 275 *vlo = *vhi = tp - (const uint16_t *) lp; 276 return; 277 } 278 /* 279 * Look for value being between current value and next value 280 * if so return these 2 values 281 */ 282 if (target < tp[1]) { 283 *vlo = tp - (const uint16_t *) lp; 284 *vhi = *vlo + 1; 285 return; 286 } 287 } 288} 289 290/* 291 * Fill the Vpdlist for indices Pmax-Pmin 292 */ 293static HAL_BOOL 294ar2425FillVpdTable(uint32_t pdGainIdx, int16_t Pmin, int16_t Pmax, 295 const int16_t *pwrList, const uint16_t *VpdList, 296 uint16_t numIntercepts, 297 uint16_t retVpdList[][64]) 298{ 299 uint16_t ii, jj, kk; 300 int16_t currPwr = (int16_t)(2*Pmin); 301 /* since Pmin is pwr*2 and pwrList is 4*pwr */ 302 uint32_t idxL, idxR; 303 304 ii = 0; 305 jj = 0; 306 307 if (numIntercepts < 2) 308 return AH_FALSE; 309 310 while (ii <= (uint16_t)(Pmax - Pmin)) { 311 GetLowerUpperIndex(currPwr, (const uint16_t *) pwrList, 312 numIntercepts, &(idxL), &(idxR)); 313 if (idxR < 1) 314 idxR = 1; /* extrapolate below */ 315 if (idxL == (uint32_t)(numIntercepts - 1)) 316 idxL = numIntercepts - 2; /* extrapolate above */ 317 if (pwrList[idxL] == pwrList[idxR]) 318 kk = VpdList[idxL]; 319 else 320 kk = (uint16_t) 321 (((currPwr - pwrList[idxL])*VpdList[idxR]+ 322 (pwrList[idxR] - currPwr)*VpdList[idxL])/ 323 (pwrList[idxR] - pwrList[idxL])); 324 retVpdList[pdGainIdx][ii] = kk; 325 ii++; 326 currPwr += 2; /* half dB steps */ 327 } 328 329 return AH_TRUE; 330} 331 332/* 333 * Returns interpolated or the scaled up interpolated value 334 */ 335static int16_t 336interpolate_signed(uint16_t target, uint16_t srcLeft, uint16_t srcRight, 337 int16_t targetLeft, int16_t targetRight) 338{ 339 int16_t rv; 340 341 if (srcRight != srcLeft) { 342 rv = ((target - srcLeft)*targetRight + 343 (srcRight - target)*targetLeft) / (srcRight - srcLeft); 344 } else { 345 rv = targetLeft; 346 } 347 return rv; 348} 349 350/* 351 * Uses the data points read from EEPROM to reconstruct the pdadc power table 352 * Called by ar2425SetPowerTable() 353 */ 354static void 355ar2425getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel, 356 const RAW_DATA_STRUCT_2413 *pRawDataset, 357 uint16_t pdGainOverlap_t2, 358 int16_t *pMinCalPower, uint16_t pPdGainBoundaries[], 359 uint16_t pPdGainValues[], uint16_t pPDADCValues[]) 360{ 361 /* Note the items statically allocated below are to reduce stack usage */ 362 uint32_t ii, jj, kk; 363 int32_t ss;/* potentially -ve index for taking care of pdGainOverlap */ 364 uint32_t idxL, idxR; 365 uint32_t numPdGainsUsed = 0; 366 static uint16_t VpdTable_L[MAX_NUM_PDGAINS_PER_CHANNEL][MAX_PWR_RANGE_IN_HALF_DB]; 367 /* filled out Vpd table for all pdGains (chanL) */ 368 static uint16_t VpdTable_R[MAX_NUM_PDGAINS_PER_CHANNEL][MAX_PWR_RANGE_IN_HALF_DB]; 369 /* filled out Vpd table for all pdGains (chanR) */ 370 static uint16_t VpdTable_I[MAX_NUM_PDGAINS_PER_CHANNEL][MAX_PWR_RANGE_IN_HALF_DB]; 371 /* filled out Vpd table for all pdGains (interpolated) */ 372 /* 373 * If desired to support -ve power levels in future, just 374 * change pwr_I_0 to signed 5-bits. 375 */ 376 static int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL]; 377 /* to accommodate -ve power levels later on. */ 378 static int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL]; 379 /* to accommodate -ve power levels later on */ 380 uint16_t numVpd = 0; 381 uint16_t Vpd_step; 382 int16_t tmpVal ; 383 uint32_t sizeCurrVpdTable, maxIndex, tgtIndex; 384 385 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "==>%s:\n", __func__); 386 387 /* Get upper lower index */ 388 GetLowerUpperIndex(channel, pRawDataset->pChannels, 389 pRawDataset->numChannels, &(idxL), &(idxR)); 390 391 for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) { 392 jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1; 393 /* work backwards 'cause highest pdGain for lowest power */ 394 numVpd = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].numVpd; 395 if (numVpd > 0) { 396 pPdGainValues[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pd_gain; 397 Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]; 398 if (Pmin_t2[numPdGainsUsed] >pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]) { 399 Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]; 400 } 401 Pmin_t2[numPdGainsUsed] = (int16_t) 402 (Pmin_t2[numPdGainsUsed] / 2); 403 Pmax_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[numVpd-1]; 404 if (Pmax_t2[numPdGainsUsed] > pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1]) 405 Pmax_t2[numPdGainsUsed] = 406 pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1]; 407 Pmax_t2[numPdGainsUsed] = (int16_t)(Pmax_t2[numPdGainsUsed] / 2); 408 ar2425FillVpdTable( 409 numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed], 410 &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]), 411 &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_L 412 ); 413 ar2425FillVpdTable( 414 numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed], 415 &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]), 416 &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_R 417 ); 418 for (kk = 0; kk < (uint16_t)(Pmax_t2[numPdGainsUsed] - Pmin_t2[numPdGainsUsed]); kk++) { 419 VpdTable_I[numPdGainsUsed][kk] = 420 interpolate_signed( 421 channel, pRawDataset->pChannels[idxL], pRawDataset->pChannels[idxR], 422 (int16_t)VpdTable_L[numPdGainsUsed][kk], (int16_t)VpdTable_R[numPdGainsUsed][kk]); 423 } 424 /* fill VpdTable_I for this pdGain */ 425 numPdGainsUsed++; 426 } 427 /* if this pdGain is used */ 428 } 429 430 *pMinCalPower = Pmin_t2[0]; 431 kk = 0; /* index for the final table */ 432 for (ii = 0; ii < numPdGainsUsed; ii++) { 433 if (ii == (numPdGainsUsed - 1)) 434 pPdGainBoundaries[ii] = Pmax_t2[ii] + 435 PD_GAIN_BOUNDARY_STRETCH_IN_HALF_DB; 436 else 437 pPdGainBoundaries[ii] = (uint16_t) 438 ((Pmax_t2[ii] + Pmin_t2[ii+1]) / 2 ); 439 440 /* Find starting index for this pdGain */ 441 if (ii == 0) 442 ss = 0; /* for the first pdGain, start from index 0 */ 443 else 444 ss = (pPdGainBoundaries[ii-1] - Pmin_t2[ii]) - 445 pdGainOverlap_t2; 446 Vpd_step = (uint16_t)(VpdTable_I[ii][1] - VpdTable_I[ii][0]); 447 Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step); 448 /* 449 *-ve ss indicates need to extrapolate data below for this pdGain 450 */ 451 while (ss < 0) { 452 tmpVal = (int16_t)(VpdTable_I[ii][0] + ss*Vpd_step); 453 pPDADCValues[kk++] = (uint16_t)((tmpVal < 0) ? 0 : tmpVal); 454 ss++; 455 } 456 457 sizeCurrVpdTable = Pmax_t2[ii] - Pmin_t2[ii]; 458 tgtIndex = pPdGainBoundaries[ii] + pdGainOverlap_t2 - Pmin_t2[ii]; 459 maxIndex = (tgtIndex < sizeCurrVpdTable) ? tgtIndex : sizeCurrVpdTable; 460 461 while (ss < (int16_t)maxIndex) 462 pPDADCValues[kk++] = VpdTable_I[ii][ss++]; 463 464 Vpd_step = (uint16_t)(VpdTable_I[ii][sizeCurrVpdTable-1] - 465 VpdTable_I[ii][sizeCurrVpdTable-2]); 466 Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step); 467 /* 468 * for last gain, pdGainBoundary == Pmax_t2, so will 469 * have to extrapolate 470 */ 471 if (tgtIndex > maxIndex) { /* need to extrapolate above */ 472 while(ss < (int16_t)tgtIndex) { 473 tmpVal = (uint16_t) 474 (VpdTable_I[ii][sizeCurrVpdTable-1] + 475 (ss-maxIndex)*Vpd_step); 476 pPDADCValues[kk++] = (tmpVal > 127) ? 477 127 : tmpVal; 478 ss++; 479 } 480 } /* extrapolated above */ 481 } /* for all pdGainUsed */ 482 483 while (ii < MAX_NUM_PDGAINS_PER_CHANNEL) { 484 pPdGainBoundaries[ii] = pPdGainBoundaries[ii-1]; 485 ii++; 486 } 487 while (kk < 128) { 488 pPDADCValues[kk] = pPDADCValues[kk-1]; 489 kk++; 490 } 491 492 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "<==%s\n", __func__); 493} 494 495/* Same as 2413 set power table */ 496static HAL_BOOL 497ar2425SetPowerTable(struct ath_hal *ah, 498 int16_t *minPower, int16_t *maxPower, 499 const struct ieee80211_channel *chan, 500 uint16_t *rfXpdGain) 501{ 502 uint16_t freq = ath_hal_gethwchannel(ah, chan); 503 struct ath_hal_5212 *ahp = AH5212(ah); 504 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; 505 const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL; 506 uint16_t pdGainOverlap_t2; 507 int16_t minCalPower2413_t2; 508 uint16_t *pdadcValues = ahp->ah_pcdacTable; 509 uint16_t gainBoundaries[4]; 510 uint32_t i, reg32, regoffset; 511 512 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s:chan 0x%x flag 0x%x\n", 513 __func__, freq, chan->ic_flags); 514 515 if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan)) 516 pRawDataset = &ee->ee_rawDataset2413[headerInfo11G]; 517 else if (IEEE80211_IS_CHAN_B(chan)) 518 pRawDataset = &ee->ee_rawDataset2413[headerInfo11B]; 519 else { 520 HALDEBUG(ah, HAL_DEBUG_ANY, "%s:illegal mode\n", __func__); 521 return AH_FALSE; 522 } 523 524 pdGainOverlap_t2 = (uint16_t) SM(OS_REG_READ(ah, AR_PHY_TPCRG5), 525 AR_PHY_TPCRG5_PD_GAIN_OVERLAP); 526 527 ar2425getGainBoundariesAndPdadcsForPowers(ah, freq, 528 pRawDataset, pdGainOverlap_t2,&minCalPower2413_t2,gainBoundaries, 529 rfXpdGain, pdadcValues); 530 531 OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN, 532 (pRawDataset->pDataPerChannel[0].numPdGains - 1)); 533 534 /* 535 * Note the pdadc table may not start at 0 dBm power, could be 536 * negative or greater than 0. Need to offset the power 537 * values by the amount of minPower for griffin 538 */ 539 if (minCalPower2413_t2 != 0) 540 ahp->ah_txPowerIndexOffset = (int16_t)(0 - minCalPower2413_t2); 541 else 542 ahp->ah_txPowerIndexOffset = 0; 543 544 /* Finally, write the power values into the baseband power table */ 545 regoffset = 0x9800 + (672 <<2); /* beginning of pdadc table in griffin */ 546 for (i = 0; i < 32; i++) { 547 reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0) | 548 ((pdadcValues[4*i + 1] & 0xFF) << 8) | 549 ((pdadcValues[4*i + 2] & 0xFF) << 16) | 550 ((pdadcValues[4*i + 3] & 0xFF) << 24) ; 551 OS_REG_WRITE(ah, regoffset, reg32); 552 regoffset += 4; 553 } 554 555 OS_REG_WRITE(ah, AR_PHY_TPCRG5, 556 SM(pdGainOverlap_t2, AR_PHY_TPCRG5_PD_GAIN_OVERLAP) | 557 SM(gainBoundaries[0], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) | 558 SM(gainBoundaries[1], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) | 559 SM(gainBoundaries[2], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3) | 560 SM(gainBoundaries[3], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4)); 561 562 return AH_TRUE; 563} 564 565static int16_t 566ar2425GetMinPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data) 567{ 568 uint32_t ii,jj; 569 uint16_t Pmin=0,numVpd; 570 571 for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) { 572 jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1; 573 /* work backwards 'cause highest pdGain for lowest power */ 574 numVpd = data->pDataPerPDGain[jj].numVpd; 575 if (numVpd > 0) { 576 Pmin = data->pDataPerPDGain[jj].pwr_t4[0]; 577 return(Pmin); 578 } 579 } 580 return(Pmin); 581} 582 583static int16_t 584ar2425GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data) 585{ 586 uint32_t ii; 587 uint16_t Pmax=0,numVpd; 588 589 for (ii=0; ii< MAX_NUM_PDGAINS_PER_CHANNEL; ii++) { 590 /* work forwards cuase lowest pdGain for highest power */ 591 numVpd = data->pDataPerPDGain[ii].numVpd; 592 if (numVpd > 0) { 593 Pmax = data->pDataPerPDGain[ii].pwr_t4[numVpd-1]; 594 return(Pmax); 595 } 596 } 597 return(Pmax); 598} 599 600static 601HAL_BOOL 602ar2425GetChannelMaxMinPower(struct ath_hal *ah, 603 const struct ieee80211_channel *chan, 604 int16_t *maxPow, int16_t *minPow) 605{ 606 uint16_t freq = chan->ic_freq; /* NB: never mapped */ 607 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; 608 const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL; 609 const RAW_DATA_PER_CHANNEL_2413 *data = AH_NULL; 610 uint16_t numChannels; 611 int totalD,totalF, totalMin,last, i; 612 613 *maxPow = 0; 614 615 if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan)) 616 pRawDataset = &ee->ee_rawDataset2413[headerInfo11G]; 617 else if (IEEE80211_IS_CHAN_B(chan)) 618 pRawDataset = &ee->ee_rawDataset2413[headerInfo11B]; 619 else 620 return(AH_FALSE); 621 622 numChannels = pRawDataset->numChannels; 623 data = pRawDataset->pDataPerChannel; 624 625 /* Make sure the channel is in the range of the TP values 626 * (freq piers) 627 */ 628 if (numChannels < 1) 629 return(AH_FALSE); 630 631 if ((freq < data[0].channelValue) || 632 (freq > data[numChannels-1].channelValue)) { 633 if (freq < data[0].channelValue) { 634 *maxPow = ar2425GetMaxPower(ah, &data[0]); 635 *minPow = ar2425GetMinPower(ah, &data[0]); 636 return(AH_TRUE); 637 } else { 638 *maxPow = ar2425GetMaxPower(ah, &data[numChannels - 1]); 639 *minPow = ar2425GetMinPower(ah, &data[numChannels - 1]); 640 return(AH_TRUE); 641 } 642 } 643 644 /* Linearly interpolate the power value now */ 645 for (last=0,i=0; (i<numChannels) && (freq > data[i].channelValue); 646 last = i++); 647 totalD = data[i].channelValue - data[last].channelValue; 648 if (totalD > 0) { 649 totalF = ar2425GetMaxPower(ah, &data[i]) - ar2425GetMaxPower(ah, &data[last]); 650 *maxPow = (int8_t) ((totalF*(freq-data[last].channelValue) + 651 ar2425GetMaxPower(ah, &data[last])*totalD)/totalD); 652 totalMin = ar2425GetMinPower(ah, &data[i]) - ar2425GetMinPower(ah, &data[last]); 653 *minPow = (int8_t) ((totalMin*(freq-data[last].channelValue) + 654 ar2425GetMinPower(ah, &data[last])*totalD)/totalD); 655 return(AH_TRUE); 656 } else { 657 if (freq == data[i].channelValue) { 658 *maxPow = ar2425GetMaxPower(ah, &data[i]); 659 *minPow = ar2425GetMinPower(ah, &data[i]); 660 return(AH_TRUE); 661 } else 662 return(AH_FALSE); 663 } 664} 665 666/* 667 * Free memory for analog bank scratch buffers 668 */ 669static void 670ar2425RfDetach(struct ath_hal *ah) 671{ 672 struct ath_hal_5212 *ahp = AH5212(ah); 673 674 HALASSERT(ahp->ah_rfHal != AH_NULL); 675 ath_hal_free(ahp->ah_rfHal); 676 ahp->ah_rfHal = AH_NULL; 677} 678 679/* 680 * Allocate memory for analog bank scratch buffers 681 * Scratch Buffer will be reinitialized every reset so no need to zero now 682 */ 683static HAL_BOOL 684ar2425RfAttach(struct ath_hal *ah, HAL_STATUS *status) 685{ 686 struct ath_hal_5212 *ahp = AH5212(ah); 687 struct ar2425State *priv; 688 689 HALASSERT(ah->ah_magic == AR5212_MAGIC); 690 691 HALASSERT(ahp->ah_rfHal == AH_NULL); 692 priv = ath_hal_malloc(sizeof(struct ar2425State)); 693 if (priv == AH_NULL) { 694 HALDEBUG(ah, HAL_DEBUG_ANY, 695 "%s: cannot allocate private state\n", __func__); 696 *status = HAL_ENOMEM; /* XXX */ 697 return AH_FALSE; 698 } 699 priv->base.rfDetach = ar2425RfDetach; 700 priv->base.writeRegs = ar2425WriteRegs; 701 priv->base.getRfBank = ar2425GetRfBank; 702 priv->base.setChannel = ar2425SetChannel; 703 priv->base.setRfRegs = ar2425SetRfRegs; 704 priv->base.setPowerTable = ar2425SetPowerTable; 705 priv->base.getChannelMaxMinPower = ar2425GetChannelMaxMinPower; 706 priv->base.getNfAdjust = ar5212GetNfAdjust; 707 708 ahp->ah_pcdacTable = priv->pcdacTable; 709 ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable); 710 ahp->ah_rfHal = &priv->base; 711 712 return AH_TRUE; 713} 714 715static HAL_BOOL 716ar2425Probe(struct ath_hal *ah) 717{ 718 return IS_2425(ah) || IS_2417(ah); 719} 720AH_RF(RF2425, ar2425Probe, ar2425RfAttach); 721