Searched refs:psr (Results 76 - 100 of 101) sorted by relevance

12345

/linux-master/arch/powerpc/include/asm/
H A Dopal.h289 int opal_get_power_shift_ratio(u32 handle, int token, u32 *psr);
290 int opal_set_power_shift_ratio(u32 handle, int token, u32 psr);
/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn31/
H A Ddcn31_hwseq.c275 dc->caps.dmub_caps.psr = dc->ctx->dmub_srv->dmub->feature_caps.psr;
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn35/
H A Ddcn35_resource.c791 .psr = {
1550 if (pool->base.psr != NULL)
1551 dmub_psr_destroy(&pool->base.psr);
2034 pool->base.psr = dmub_psr_create(ctx);
2035 if (pool->base.psr == NULL) {
2036 dm_error("DC: failed to create psr obj!\n");
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn30/
H A Ddcn30_resource.c736 .psr = {
1184 if (pool->base.psr != NULL)
1185 dmub_psr_destroy(&pool->base.psr);
2501 pool->base.psr = dmub_psr_create(ctx);
2503 if (pool->base.psr == NULL) {
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn31/
H A Ddcn31_resource.c900 .psr = {
1484 if (pool->base.psr != NULL)
1485 dmub_psr_destroy(&pool->base.psr);
2088 pool->base.psr = dmub_psr_create(ctx);
2089 if (pool->base.psr == NULL) {
2090 dm_error("DC: failed to create psr obj!\n");
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn351/
H A Ddcn351_resource.c771 .psr = {
1530 if (pool->base.psr != NULL)
1531 dmub_psr_destroy(&pool->base.psr);
2013 pool->base.psr = dmub_psr_create(ctx);
2014 if (pool->base.psr == NULL) {
2015 dm_error("DC: failed to create psr obj!\n");
/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn35/
H A Ddcn35_hwseq.c351 dc->caps.dmub_caps.psr = dc->ctx->dmub_srv->dmub->feature_caps.psr;
651 bool is_psr = link && !link->panel_config.psr.disable_psr &&
/linux-master/drivers/atm/
H A Dfore200e.h775 volatile u32 __iomem * psr; /* address of PCI specific register */ member in struct:fore200e_pca_regs
H A Dfore200e.c452 int irq_posted = readl(fore200e->regs.pca.psr);
496 fore200e->regs.pca.psr = fore200e->virt_base + PCA200E_PSR_OFFSET;
/linux-master/arch/sparc/mm/
H A Dhypersparc.S9 #include <asm/psr.h>
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource.c1486 if (pool->base.psr != NULL)
1487 dmub_psr_destroy(&pool->base.psr);
2276 pool->base.psr = dmub_psr_create(ctx);
2277 if (pool->base.psr == NULL) {
2278 dm_error("DC: failed to create psr obj!\n");
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn321/
H A Ddcn321_resource.c1469 if (pool->base.psr != NULL)
1470 dmub_psr_destroy(&pool->base.psr);
1912 pool->base.psr = dmub_psr_create(ctx);
1913 if (pool->base.psr == NULL) {
1914 dm_error("DC: failed to create psr obj!\n");
/linux-master/drivers/staging/rtl8723bs/os_dep/
H A Dioctl_cfg80211.c243 u8 *psr = NULL, sr = 0; local
253 psr = rtw_get_wps_attr_content(wpsie, wpsielen, WPS_ATTR_SELECTED_REGISTRAR, (u8 *)(&sr), NULL);
261 if (psr)
262 *psr = 0; /* clear sr */
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn351/
H A Ddcn351_fpu.c628 link->psr_settings.psr_version == DC_PSR_VERSION_SU_1) && !link->panel_config.psr.disable_psr);
634 /*for psr1/psr-su, we allow z8 and z10 based on latency, for replay with IPS enabled, it will enter ips2*/
/linux-master/drivers/gpu/drm/i915/display/
H A Dintel_vbt_defs.h944 u16 psr; /* 228+ */ member in struct:bdb_lfp_power
H A Dintel_display_types.h342 } psr; member in struct:intel_vbt_panel_data
1867 struct intel_psr psr; member in struct:intel_dp
H A Dintel_display_irq.c878 iir_reg = TRANS_PSR_IIR(intel_dp->psr.transcoder);
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn35/
H A Ddcn35_fpu.c592 link->psr_settings.psr_version == DC_PSR_VERSION_SU_1) && !link->panel_config.psr.disable_psr);
601 /*for psr1/psr-su, we allow z8 and z10 based on latency, for replay with IPS enabled, it will enter ips2*/
/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn30/
H A Ddcn30_hwseq.c806 dc->caps.dmub_caps.psr = dc->ctx->dmub_srv->dmub->feature_caps.psr;
/linux-master/drivers/net/ethernet/agere/
H A Det131x.c2186 struct pkt_stat_desc *psr; local
2210 psr = (struct pkt_stat_desc *)(rx_local->ps_ring_virtaddr) +
2216 len = psr->word1 & 0xFFFF;
2217 ring_index = (psr->word1 >> 26) & 0x03;
2219 buff_index = (psr->word1 >> 16) & 0x3FF;
2220 word0 = psr->word0;
2226 /* Clear psr full and toggle the wrap bit */
/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn32/
H A Ddcn32_hwseq.c956 dc->caps.dmub_caps.psr = dc->ctx->dmub_srv->dmub->feature_caps.psr;
/linux-master/drivers/net/ethernet/renesas/
H A Dravb_main.c1054 u32 ecsr, psr; local
1067 psr = ravb_read(ndev, PSR);
1069 psr ^= PSR_LMON;
1070 if (!(psr & PSR_LMON)) {
/linux-master/drivers/gpu/drm/amd/display/dc/
H A Ddc.h218 bool psr; member in struct:dc_dmub_caps
/linux-master/drivers/gpu/drm/amd/display/dmub/inc/
H A Ddmub_cmd.h463 uint8_t psr; member in struct:dmub_feature_caps
2221 * Set vtotal in psr active for FreeSync PSR.
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddcn20_fpu.c1095 else if (is_pwrseq0 && link->psr_settings.psr_version == DC_PSR_VERSION_1 && !link->panel_config.psr.disable_psr)

Completed in 712 milliseconds

12345