Searched refs:dev_priv (Results 76 - 100 of 269) sorted by relevance

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/linux-master/drivers/gpu/drm/vmwgfx/
H A D	vmwgfx_gmr.c	37 static int vmw_gmr2_bind(struct vmw_private *dev_priv, argument 53 cmd_orig = cmd = VMW_CMD_RESERVE(dev_priv, cmd_size); 100 vmw_cmd_commit(dev_priv, cmd_size); 105 static void vmw_gmr2_unbind(struct vmw_private *dev_priv, argument 112 cmd = VMW_CMD_RESERVE(dev_priv, define_size); 122 vmw_cmd_commit(dev_priv, define_size); 126 int vmw_gmr_bind(struct vmw_private *dev_priv, argument 138 if (unlikely(!(dev_priv->capabilities & SVGA_CAP_GMR2))) 141 return vmw_gmr2_bind(dev_priv, &data_iter, num_pages, gmr_id); 145 void vmw_gmr_unbind(struct vmw_private *dev_priv, in argument [all...]
H A D	vmwgfx_mksstat.h	102 .slot = vmw_mksstat_get_kern_slot(current->pid, dev_priv) \ 108 _##kern_cntr.old_top = dev_priv->mksstat_kern_top_timer[_##kern_cntr.slot]; \ 109 dev_priv->mksstat_kern_top_timer[_##kern_cntr.slot] = kern_cntr; \ 116 const pid_t pid = atomic_cmpxchg(&dev_priv->mksstat_kern_pids[_##kern_cntr.slot], current->pid, MKSSTAT_PID_RESERVED); \ 117 dev_priv->mksstat_kern_top_timer[_##kern_cntr.slot] = _##kern_cntr.old_top; \ 123 BUG_ON(!dev_priv->mksstat_kern_pages[_##kern_cntr.slot]); \ 125 pstat = vmw_mksstat_get_kern_pstat(page_address(dev_priv->mksstat_kern_pages[_##kern_cntr.slot])); \ 134 atomic_set(&dev_priv->mksstat_kern_pids[_##kern_cntr.slot], current->pid); \
H A D	vmwgfx_system_manager.c	60 int vmw_sys_man_init(struct vmw_private *dev_priv) argument 62 struct ttm_device *bdev = &dev_priv->bdev; 78 void vmw_sys_man_fini(struct vmw_private *dev_priv) argument 80 struct ttm_resource_manager *man = ttm_manager_type(&dev_priv->bdev, 83 ttm_resource_manager_evict_all(&dev_priv->bdev, man); 88 ttm_set_driver_manager(&dev_priv->bdev, VMW_PL_SYSTEM, NULL);
H A D	vmwgfx_ldu.c	78 static int vmw_ldu_commit_list(struct vmw_private *dev_priv) argument 80 struct vmw_legacy_display *lds = dev_priv->ldu_priv; 89 if (!(dev_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY)) { 101 return vmw_kms_write_svga(dev_priv, w, h, fb->pitches[0], 110 vmw_kms_write_svga(dev_priv, fb->width, fb->height, fb->pitches[0], 115 vmw_write(dev_priv, SVGA_REG_NUM_GUEST_DISPLAYS, 122 vmw_write(dev_priv, SVGA_REG_DISPLAY_ID, i); 123 vmw_write(dev_priv, SVGA_REG_DISPLAY_IS_PRIMARY, !i); 124 vmw_write(dev_priv, SVGA_REG_DISPLAY_POSITION_X, crtc->x); 125 vmw_write(dev_priv, SVGA_REG_DISPLAY_POSITION_ 145 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev); local 168 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev); local 338 struct vmw_private *dev_priv; local 427 vmw_ldu_init(struct vmw_private *dev_priv, unsigned unit) argument 557 vmw_kms_ldu_init_display(struct vmw_private *dev_priv) argument 597 vmw_kms_ldu_close_display(struct vmw_private *dev_priv) argument 610 vmw_kms_ldu_do_bo_dirty(struct vmw_private *dev_priv, struct vmw_framebuffer *framebuffer, unsigned int flags, unsigned int color, struct drm_mode_rect *clips, unsigned int num_clips) argument [all...]
H A D	vmwgfx_so.c	132 struct vmw_private *dev_priv = res->dev_priv; local 134 mutex_lock(&dev_priv->binding_mutex); 149 mutex_unlock(&dev_priv->binding_mutex); 164 struct vmw_private *dev_priv = res->dev_priv; local 170 mutex_lock(&dev_priv->binding_mutex); 172 mutex_unlock(&dev_priv->binding_mutex); 176 cmd = VMW_CMD_CTX_RESERVE(res->dev_priv, view->cmd_size, view->ctx->id); 178 mutex_unlock(&dev_priv 206 struct vmw_private *dev_priv = res->dev_priv; local 243 struct vmw_private *dev_priv = res->dev_priv; local 326 struct vmw_private *dev_priv = ctx->dev_priv; local 421 vmw_view_cotable_list_destroy(struct vmw_private *dev_priv, struct list_head *list, bool readback) argument 442 vmw_view_surface_list_destroy(struct vmw_private *dev_priv, struct list_head *list) argument [all...]
H A D	vmwgfx_context.c	121 static void vmw_context_cotables_unref(struct vmw_private *dev_priv, argument 126 u32 cotable_max = has_sm5_context(dev_priv) ? 144 struct vmw_private *dev_priv = res->dev_priv; local 153 mutex_lock(&dev_priv->cmdbuf_mutex); 155 mutex_lock(&dev_priv->binding_mutex); 158 mutex_unlock(&dev_priv->binding_mutex); 159 if (dev_priv->pinned_bo != NULL && 160 !dev_priv->query_cid_valid) 161 __vmw_execbuf_release_pinned_bo(dev_priv, NUL 180 vmw_gb_context_init(struct vmw_private *dev_priv, bool dx, struct vmw_resource *res, void (*res_free)(struct vmw_resource *res)) argument 241 vmw_context_init(struct vmw_private *dev_priv, struct vmw_resource *res, void (*res_free)(struct vmw_resource *res), bool dx) argument 300 struct vmw_private *dev_priv = res->dev_priv; local 344 struct vmw_private *dev_priv = res->dev_priv; local 372 struct vmw_private *dev_priv = res->dev_priv; local 436 struct vmw_private *dev_priv = res->dev_priv; local 467 struct vmw_private *dev_priv = res->dev_priv; local 511 struct vmw_private *dev_priv = res->dev_priv; local 581 struct vmw_private *dev_priv = res->dev_priv; local 652 struct vmw_private *dev_priv = res->dev_priv; local 728 struct vmw_private *dev_priv = vmw_priv(dev); local [all...]
H A D	vmwgfx_mob.c	86 static int vmw_mob_pt_populate(struct vmw_private *dev_priv, 106 * @dev_priv: Pointer to a device private structure 108 * @offset Start of table offset into dev_priv::otable_bo 114 static int vmw_setup_otable_base(struct vmw_private *dev_priv, argument 145 ret = vmw_mob_pt_populate(dev_priv, mob); 153 cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd)); 175 vmw_cmd_commit(dev_priv, sizeof(*cmd)); 190 * @dev_priv: Pointer to a device private structure 194 static void vmw_takedown_otable_base(struct vmw_private *dev_priv, argument 208 cmd = VMW_CMD_RESERVE(dev_priv, sizeo 237 vmw_otable_batch_setup(struct vmw_private *dev_priv, struct vmw_otable_batch *batch) argument 301 vmw_otables_setup(struct vmw_private *dev_priv) argument 332 vmw_otable_batch_takedown(struct vmw_private *dev_priv, struct vmw_otable_batch *batch) argument 361 vmw_otables_takedown(struct vmw_private *dev_priv) argument 414 vmw_mob_pt_populate(struct vmw_private *dev_priv, struct vmw_mob *mob) argument 551 vmw_mob_unbind(struct vmw_private *dev_priv, struct vmw_mob *mob) argument 599 vmw_mob_bind(struct vmw_private *dev_priv, struct vmw_mob *mob, const struct vmw_sg_table *vsgt, unsigned long num_data_pages, int32_t mob_id) argument [all...]
/linux-master/drivers/gpu/drm/i915/display/
H A D	skl_universal_plane.h	20 skl_universal_plane_create(struct drm_i915_private *dev_priv, 33 bool icl_is_nv12_y_plane(struct drm_i915_private *dev_priv, 36 bool icl_is_hdr_plane(struct drm_i915_private *dev_priv, enum plane_id plane_id);
H A D	g4x_dp.h	25 bool g4x_dp_port_enabled(struct drm_i915_private *dev_priv, 28 bool g4x_dp_init(struct drm_i915_private *dev_priv, 43 static inline bool g4x_dp_port_enabled(struct drm_i915_private *dev_priv, argument 49 static inline bool g4x_dp_init(struct drm_i915_private *dev_priv, argument
H A D	intel_display.c	134 int vlv_get_hpll_vco(struct drm_i915_private *dev_priv) argument 139 hpll_freq = vlv_cck_read(dev_priv, CCK_FUSE_REG) & 145 int vlv_get_cck_clock(struct drm_i915_private *dev_priv, argument 151 val = vlv_cck_read(dev_priv, reg); 154 drm_WARN(&dev_priv->drm, (val & CCK_FREQUENCY_STATUS) != 161 int vlv_get_cck_clock_hpll(struct drm_i915_private *dev_priv, argument 166 vlv_cck_get(dev_priv); 168 if (dev_priv->hpll_freq == 0) 169 dev_priv->hpll_freq = vlv_get_hpll_vco(dev_priv); 178 intel_update_czclk(struct drm_i915_private *dev_priv) argument 198 skl_wa_827(struct drm_i915_private *dev_priv, enum pipe pipe, bool enable) argument 207 icl_wa_scalerclkgating(struct drm_i915_private *dev_priv, enum pipe pipe, bool enable) argument 217 icl_wa_cursorclkgating(struct drm_i915_private *dev_priv, enum pipe pipe, bool enable) argument 292 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 306 assert_transcoder(struct drm_i915_private *dev_priv, enum transcoder cpu_transcoder, bool state) argument 353 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 360 vlv_wait_port_ready(struct drm_i915_private *dev_priv, struct intel_digital_port *dig_port, unsigned int expected_mask) argument 398 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 458 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 535 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); local 573 intel_plane_fb_max_stride(struct drm_i915_private *dev_priv, u32 pixel_format, u64 modifier) argument 613 struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); local 634 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 697 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 733 intel_has_pending_fb_unpin(struct drm_i915_private *dev_priv) argument 793 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 832 struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); local 846 struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); local 857 struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); local 1024 struct drm_i915_private *dev_priv = to_i915(state->base.dev); local 1132 struct drm_i915_private *dev_priv = to_i915(state->base.dev); local 1246 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 1482 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 1555 glk_pipe_scaler_clock_gating_wa(struct drm_i915_private *dev_priv, enum pipe pipe, bool apply) argument 1572 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 1610 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 1641 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 1732 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 1750 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 1817 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 1839 intel_phy_is_combo(struct drm_i915_private *dev_priv, enum phy phy) argument 1860 intel_phy_is_tc(struct drm_i915_private *dev_priv, enum phy phy) argument 1880 intel_phy_is_snps(struct drm_i915_private *dev_priv, enum phy phy) argument 1906 intel_port_to_tc(struct drm_i915_private *dev_priv, enum port port) argument 1932 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 1969 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 2020 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 2071 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 2114 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 2131 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 2183 const struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 2234 struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); local 2502 intel_panel_sanitize_ssc(struct drm_i915_private *dev_priv) argument 2547 intel_cpu_transcoder_has_m2_n2(struct drm_i915_private *dev_priv, enum transcoder transcoder) argument 2560 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 2577 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 2590 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 2671 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 2702 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 2716 struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); local 2733 struct drm_i915_private *dev_priv = to_i915(dev); local 2799 struct drm_i915_private *dev_priv = to_i915(dev); local 2814 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 2879 i9xx_has_pfit(struct drm_i915_private *dev_priv) argument 2891 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 2919 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 2940 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 3064 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 3128 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 3158 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 3207 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 3266 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 3283 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 3296 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 3332 struct drm_i915_private *dev_priv = to_i915(dev); local 3422 transcoder_ddi_func_is_enabled(struct drm_i915_private *dev_priv, enum transcoder cpu_transcoder) argument 3437 enabled_bigjoiner_pipes(struct drm_i915_private *dev_priv, u8 *master_pipes, u8 *slave_pipes) argument 3528 struct drm_i915_private *dev_priv = to_i915(dev); local 3632 struct drm_i915_private *dev_priv = to_i915(dev); local 3670 struct drm_i915_private *dev_priv = to_i915(dev); local 3731 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 3886 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 3980 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 4127 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 4149 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 4175 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 4303 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 4525 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 4792 pipe_config_infoframe_mismatch(struct drm_i915_private *dev_priv, bool fastset, const char *name, const union hdmi_infoframe *a, const union hdmi_infoframe *b) argument 4859 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 4946 struct drm_i915_private *dev_priv = to_i915(current_config->uapi.crtc->dev); local 5448 struct drm_i915_private *dev_priv = to_i915(state->base.dev); local 5557 struct drm_i915_private *dev_priv = to_i915(state->base.dev); local 5599 struct drm_i915_private *dev_priv = to_i915(state->base.dev); local 5629 active_planes_affects_min_cdclk(struct drm_i915_private *dev_priv) argument 5682 struct drm_i915_private *dev_priv = to_i915(state->base.dev); local 6304 struct drm_i915_private *dev_priv = to_i915(dev); local 6520 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 6537 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 6583 struct drm_i915_private *dev_priv = to_i915(state->base.dev); local 6613 struct drm_i915_private *dev_priv = to_i915(state->base.dev); local 6635 struct drm_i915_private *dev_priv = to_i915(state->base.dev); local 6744 struct drm_i915_private *dev_priv = to_i915(state->base.dev); local 6843 struct drm_i915_private *dev_priv = to_i915(state->base.dev); local 7064 struct drm_i915_private *dev_priv = to_i915(dev); local 7341 struct drm_i915_private *dev_priv = to_i915(dev); local 7471 ilk_has_edp_a(struct drm_i915_private *dev_priv) argument 7485 intel_ddi_crt_present(struct drm_i915_private *dev_priv) argument 7513 intel_setup_outputs(struct drm_i915_private *dev_priv) argument 7696 struct drm_i915_private *dev_priv = to_i915(dev); local 7775 intel_cpu_transcoder_mode_valid(struct drm_i915_private *dev_priv, const struct drm_display_mode *mode) argument 7809 intel_mode_valid_max_plane_size(struct drm_i915_private *dev_priv, const struct drm_display_mode *mode, bool bigjoiner) argument 7893 intel_init_display_hooks(struct drm_i915_private *dev_priv) argument 7980 i830_enable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe) argument 8060 i830_disable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe) argument [all...]
H A D	intel_hdmi.c	71 struct drm_i915_private *dev_priv = intel_hdmi_to_i915(intel_hdmi); local 74 enabled_bits = HAS_DDI(dev_priv) ? DDI_BUF_CTL_ENABLE : SDVO_ENABLE; 76 drm_WARN(&dev_priv->drm, 77 intel_de_read(dev_priv, intel_hdmi->hdmi_reg) & enabled_bits, 82 assert_hdmi_transcoder_func_disabled(struct drm_i915_private *dev_priv, argument 85 drm_WARN(&dev_priv->drm, 86 intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder)) & 157 hsw_dip_data_reg(struct drm_i915_private *dev_priv, argument 183 static int hsw_dip_data_size(struct drm_i915_private *dev_priv, argument 192 if (DISPLAY_VER(dev_priv) > 207 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 242 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 256 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 275 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 313 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 328 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 350 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 391 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 406 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 424 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 463 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 479 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 500 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 541 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 554 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 594 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 821 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 855 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 967 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 992 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 1016 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 1039 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 1098 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 1147 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 1205 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 1245 struct drm_i915_private *dev_priv = intel_hdmi_to_i915(hdmi); local 1458 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); local 1497 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); local 1771 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 1834 struct drm_i915_private *dev_priv = intel_hdmi_to_i915(hdmi); local 1981 struct drm_i915_private *dev_priv = intel_hdmi_to_i915(hdmi); local 2059 struct drm_i915_private *dev_priv = local 2288 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 2404 struct drm_i915_private *dev_priv = to_i915(connector->dev); local 2456 struct drm_i915_private *dev_priv = to_i915(connector->dev); local 2498 struct drm_i915_private *dev_priv = to_i915(connector->dev); local 2611 struct drm_i915_private *dev_priv = to_i915(connector->dev); local 2650 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 2667 chv_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port) argument 2689 bxt_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port) argument 2708 cnp_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port) argument 2734 icl_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port) argument 2747 mcc_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port) argument 2770 rkl_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port) argument 2806 dg1_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port) argument 2811 adls_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port) argument 2827 g4x_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port) argument 2852 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 2944 struct drm_i915_private *dev_priv = local 2989 struct drm_i915_private *dev_priv = to_i915(dev); local [all...]
H A D	intel_display_reg_defs.h	11 #define DISPLAY_MMIO_BASE(dev_priv) (DISPLAY_INFO(dev_priv)->mmio_offset) 39 #define _MMIO_PIPE2(pipe, reg) _MMIO(DISPLAY_INFO(dev_priv)->pipe_offsets[(pipe)] - \ 40 DISPLAY_INFO(dev_priv)->pipe_offsets[PIPE_A] + \ 41 DISPLAY_MMIO_BASE(dev_priv) + (reg)) 42 #define _MMIO_TRANS2(tran, reg) _MMIO(DISPLAY_INFO(dev_priv)->trans_offsets[(tran)] - \ 43 DISPLAY_INFO(dev_priv)->trans_offsets[TRANSCODER_A] + \ 44 DISPLAY_MMIO_BASE(dev_priv) + (reg)) 45 #define _MMIO_CURSOR2(pipe, reg) _MMIO(DISPLAY_INFO(dev_priv)->cursor_offsets[(pipe)] - \ 46 DISPLAY_INFO(dev_priv) [all...]
H A D	g4x_hdmi.h	19 void g4x_hdmi_init(struct drm_i915_private *dev_priv, 24 static inline void g4x_hdmi_init(struct drm_i915_private *dev_priv, argument
H A D	vlv_dsi.h	18 void vlv_dsi_init(struct drm_i915_private *dev_priv); 27 static inline void vlv_dsi_init(struct drm_i915_private *dev_priv) argument
H A D	intel_cdclk.h	62 void intel_init_cdclk_hooks(struct drm_i915_private *dev_priv); 63 void intel_update_max_cdclk(struct drm_i915_private *dev_priv); 64 void intel_update_cdclk(struct drm_i915_private *dev_priv); 65 u32 intel_read_rawclk(struct drm_i915_private *dev_priv); 74 void intel_cdclk_get_cdclk(struct drm_i915_private *dev_priv, 87 int intel_cdclk_init(struct drm_i915_private *dev_priv);
H A D	intel_sprite_uapi.c	11 static bool has_dst_key_in_primary_plane(struct drm_i915_private *dev_priv) argument 13 return DISPLAY_VER(dev_priv) >= 9; 20 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); local 37 if (DISPLAY_VER(dev_priv) >= 9 && plane->id != PLANE_PRIMARY && 45 struct drm_i915_private *dev_priv = to_i915(dev); local 63 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && 76 if (DISPLAY_VER(dev_priv) >= 9 && 101 if (!ret && has_dst_key_in_primary_plane(dev_priv)) { 103 intel_crtc_for_pipe(dev_priv, [all...]
H A D	intel_ddi.c	123 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 130 if (drm_WARN_ON_ONCE(&dev_priv->drm, !trans)) 134 if (has_iboost(dev_priv) && 139 intel_de_write(dev_priv, DDI_BUF_TRANS_LO(port, i), 141 intel_de_write(dev_priv, DDI_BUF_TRANS_HI(port, i), 154 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 162 if (drm_WARN_ON_ONCE(&dev_priv->drm, !trans)) 166 if (has_iboost(dev_priv) && 171 intel_de_write(dev_priv, DDI_BUF_TRANS_LO(port, 9), 173 intel_de_write(dev_priv, DDI_BUF_TRANS_H 189 intel_wait_ddi_buf_idle(struct drm_i915_private *dev_priv, enum port port) argument 203 intel_wait_ddi_buf_active(struct drm_i915_private *dev_priv, enum port port) argument 355 icl_calc_tbt_pll_link(struct drm_i915_private *dev_priv, enum port port) argument 391 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 480 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 591 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 624 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 636 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 679 struct drm_i915_private *dev_priv = to_i915(dev); local 697 struct drm_i915_private *dev_priv = to_i915(dev); local 765 struct drm_i915_private *dev_priv = to_i915(dev); local 958 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 985 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 1005 struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); local 1020 _skl_ddi_set_iboost(struct drm_i915_private *dev_priv, enum port port, u8 iboost) argument 1039 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 1074 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 1114 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 1178 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 1229 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 1330 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 1456 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 2088 struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev); local 2181 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 2192 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 2303 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 2315 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 2433 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 2606 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 2748 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 2814 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 2846 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 2870 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 2911 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 2935 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 2962 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 2987 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 3006 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 3071 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 3103 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 3211 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 3238 gen9_chicken_trans_reg_by_port(struct drm_i915_private *dev_priv, enum port port) argument 3262 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 3494 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 3535 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 3585 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 3635 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 3666 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 3689 intel_ddi_is_audio_enabled(struct drm_i915_private *dev_priv, enum transcoder cpu_transcoder) argument 3728 struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); local 3740 bdw_transcoder_master_readout(struct drm_i915_private *dev_priv, enum transcoder cpu_transcoder) argument 3769 struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); local 3803 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 3928 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 4202 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 4280 struct drm_i915_private *dev_priv = to_i915(ref_crtc_state->uapi.crtc->dev); local 4473 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 4607 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 4615 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 4623 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 4647 struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev); local 4667 struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev); local 4697 xelpd_hpd_pin(struct drm_i915_private *dev_priv, enum port port) argument 4708 dg1_hpd_pin(struct drm_i915_private *dev_priv, enum port port) argument 4717 tgl_hpd_pin(struct drm_i915_private *dev_priv, enum port port) argument 4726 rkl_hpd_pin(struct drm_i915_private *dev_priv, enum port port) argument 4738 icl_hpd_pin(struct drm_i915_private *dev_priv, enum port port) argument 4747 ehl_hpd_pin(struct drm_i915_private *dev_priv, enum port port) argument 4759 skl_hpd_pin(struct drm_i915_private *dev_priv, enum port port) argument 4858 intel_ddi_init(struct drm_i915_private *dev_priv, const struct intel_bios_encoder_data *devdata) argument [all...]
H A D	intel_dpll.c	375 struct drm_i915_private *dev_priv = to_i915(dev); local 379 return dev_priv->display.vbt.lvds_ssc_freq; 380 else if (HAS_PCH_SPLIT(dev_priv)) 382 else if (DISPLAY_VER(dev_priv) != 2) 393 struct drm_i915_private *dev_priv = to_i915(dev); local 406 if (IS_PINEVIEW(dev_priv)) { 414 if (DISPLAY_VER(dev_priv) != 2) { 415 if (IS_PINEVIEW(dev_priv)) 432 drm_dbg_kms(&dev_priv->drm, 438 if (IS_PINEVIEW(dev_priv)) 485 struct drm_i915_private *dev_priv = to_i915(dev); local 512 struct drm_i915_private *dev_priv = to_i915(dev); local 546 intel_pll_is_valid(struct drm_i915_private *dev_priv, const struct intel_limit *limit, const struct dpll *clock) argument 586 struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); local 966 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 986 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 1065 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 1114 struct drm_i915_private *dev_priv = to_i915(state->base.dev); local 1143 struct drm_i915_private *dev_priv = to_i915(state->base.dev); local 1205 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 1238 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 1313 struct drm_i915_private *dev_priv = to_i915(state->base.dev); local 1472 struct drm_i915_private *dev_priv = to_i915(state->base.dev); local 1521 struct drm_i915_private *dev_priv = to_i915(state->base.dev); local 1559 struct drm_i915_private *dev_priv = to_i915(state->base.dev); local 1599 struct drm_i915_private *dev_priv = to_i915(state->base.dev); local 1732 intel_dpll_init_clock_hook(struct drm_i915_private *dev_priv) argument 1756 i9xx_has_pps(struct drm_i915_private *dev_priv) argument 1767 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 1813 vlv_pllb_recal_opamp(struct drm_i915_private *dev_priv, enum dpio_phy phy) argument 1845 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 1936 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 1950 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 1976 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 2071 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 2102 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 2156 vlv_force_pll_on(struct drm_i915_private *dev_priv, enum pipe pipe, const struct dpll *dpll) argument 2184 vlv_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe) argument 2200 chv_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe) argument 2230 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 2253 vlv_force_pll_off(struct drm_i915_private *dev_priv, enum pipe pipe) argument 2262 assert_pll(struct drm_i915_private *dev_priv, enum pipe pipe, bool state) argument [all...]
H A D	intel_vdsc.c	265 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 278 drm_dbg_kms(&dev_priv->drm, "Slice dimension requirements not met\n"); 289 if (DISPLAY_VER(dev_priv) >= 14 && 316 if (DISPLAY_VER(dev_priv) >= 13) { 429 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 460 drm_dbg_kms(&dev_priv->drm, "PPS0 = 0x%08x\n", pps_val); 465 drm_dbg_kms(&dev_priv->drm, "PPS1 = 0x%08x\n", pps_val); 471 drm_dbg_kms(&dev_priv->drm, "PPS2 = 0x%08x\n", pps_val); 477 drm_dbg_kms(&dev_priv->drm, "PPS3 = 0x%08x\n", pps_val); 483 drm_dbg_kms(&dev_priv 761 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 777 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 804 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 964 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local [all...]
H A D	intel_bw.c	40 static int dg1_mchbar_read_qgv_point_info(struct drm_i915_private *dev_priv, argument 47 val = intel_uncore_read(&dev_priv->uncore, SA_PERF_STATUS_0_0_0_MCHBAR_PC); 55 val = intel_uncore_read(&dev_priv->uncore, SKL_MC_BIOS_DATA_0_0_0_MCHBAR_PCU); 62 val = intel_uncore_read(&dev_priv->uncore, MCHBAR_CH0_CR_TC_PRE_0_0_0_MCHBAR); 66 val = intel_uncore_read(&dev_priv->uncore, MCHBAR_CH0_CR_TC_PRE_0_0_0_MCHBAR_HIGH); 75 static int icl_pcode_read_qgv_point_info(struct drm_i915_private *dev_priv, argument 83 ret = snb_pcode_read(&dev_priv->uncore, ICL_PCODE_MEM_SUBSYSYSTEM_INFO | 90 sp->dclk = DIV_ROUND_UP((16667 * dclk) + (DISPLAY_VER(dev_priv) >= 12 ? 500 : 0), 103 static int adls_pcode_read_psf_gv_point_info(struct drm_i915_private *dev_priv, argument 110 ret = snb_pcode_read(&dev_priv 149 icl_pcode_restrict_qgv_points(struct drm_i915_private *dev_priv, u32 points_mask) argument 175 mtl_read_qgv_point_info(struct drm_i915_private *dev_priv, struct intel_qgv_point *sp, int point) argument 199 intel_read_qgv_point_info(struct drm_i915_private *dev_priv, struct intel_qgv_point *sp, int point) argument 211 icl_get_qgv_points(struct drm_i915_private *dev_priv, struct intel_qgv_info *qi, bool is_y_tile) argument 386 icl_get_bw_info(struct drm_i915_private *dev_priv, const struct intel_sa_info *sa) argument 455 tgl_get_bw_info(struct drm_i915_private *dev_priv, const struct intel_sa_info *sa) argument 597 icl_max_bw_index(struct drm_i915_private *dev_priv, int num_planes, int qgv_point) argument 625 tgl_max_bw_index(struct drm_i915_private *dev_priv, int num_planes, int qgv_point) argument 653 adl_psf_bw(struct drm_i915_private *dev_priv, int psf_gv_point) argument 662 intel_bw_init_hw(struct drm_i915_private *dev_priv) argument 745 intel_bw_num_active_planes(struct drm_i915_private *dev_priv, const struct intel_bw_state *bw_state) argument 757 intel_bw_data_rate(struct drm_i915_private *dev_priv, const struct intel_bw_state *bw_state) argument 775 struct drm_i915_private *dev_priv = to_i915(state->base.dev); local 786 struct drm_i915_private *dev_priv = to_i915(state->base.dev); local 797 struct drm_i915_private *dev_priv = to_i915(state->base.dev); local 1138 struct drm_i915_private *dev_priv = to_i915(state->base.dev); local 1316 intel_bw_init(struct drm_i915_private *dev_priv) argument [all...]
H A D	intel_dpll.h	18 void intel_dpll_init_clock_hook(struct drm_i915_private *dev_priv); 28 int vlv_force_pll_on(struct drm_i915_private *dev_priv, enum pipe pipe, 30 void vlv_force_pll_off(struct drm_i915_private *dev_priv, enum pipe pipe); 33 void chv_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe); 35 void vlv_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe);
/linux-master/drivers/gpu/drm/gma500/
H A D	psb_irq.h	26 void gma_enable_pipestat(struct drm_psb_private *dev_priv, int pipe, u32 mask); 27 void gma_disable_pipestat(struct drm_psb_private *dev_priv, int pipe, u32 mask);
H A D	framebuffer.c	126 struct drm_psb_private *dev_priv = to_drm_psb_private(dev); local 133 if (!dev_priv->backlight_property) 134 dev_priv->backlight_property = drm_property_create_range(dev, 0, 136 dev_priv->ops->output_init(dev); 151 crtc_mask = dev_priv->ops->sdvo_mask; 155 crtc_mask = dev_priv->ops->lvds_mask; 167 crtc_mask = dev_priv->ops->hdmi_mask; 187 struct drm_psb_private *dev_priv = to_drm_psb_private(dev); local 188 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev; 200 for (i = 0; i < dev_priv 216 struct drm_psb_private *dev_priv = to_drm_psb_private(dev); local [all...]
/linux-master/drivers/gpu/drm/i915/
H A D	i915_sysfs.c	158 void i915_setup_sysfs(struct drm_i915_private *dev_priv) argument 160 struct device *kdev = dev_priv->drm.primary->kdev; 163 if (HAS_L3_DPF(dev_priv)) { 166 drm_err(&dev_priv->drm, 169 if (NUM_L3_SLICES(dev_priv) > 1) { 173 drm_err(&dev_priv->drm, 178 dev_priv->sysfs_gt = kobject_create_and_add("gt", &kdev->kobj); 179 if (!dev_priv->sysfs_gt) 180 drm_warn(&dev_priv->drm, 183 i915_gpu_error_sysfs_setup(dev_priv); 188 i915_teardown_sysfs(struct drm_i915_private *dev_priv) argument [all...]
/linux-master/drivers/gpu/drm/xe/display/
H A D	intel_fbdev_fb.c	21 struct drm_i915_private *dev_priv = to_i915(dev); local 42 if (!IS_DGFX(dev_priv)) { 43 obj = xe_bo_create_pin_map(dev_priv, xe_device_get_root_tile(dev_priv), 49 drm_info(&dev_priv->drm, "Allocated fbdev into stolen\n"); 51 drm_info(&dev_priv->drm, "Allocated fbdev into stolen failed: %li\n", PTR_ERR(obj)); 54 obj = xe_bo_create_pin_map(dev_priv, xe_device_get_root_tile(dev_priv), NULL, size, 56 XE_BO_CREATE_VRAM_IF_DGFX(xe_device_get_root_tile(dev_priv)) | 61 drm_err(&dev_priv [all...]

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Indexes created Tue May 14 10:18:19 MDT 2024