Searched refs:dev_priv (Results 51 - 75 of 263) sorted by relevance

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/linux-master/drivers/gpu/drm/i915/display/
H A D	intel_pps.c	21 static void vlv_steal_power_sequencer(struct drm_i915_private *dev_priv, 63 struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); local 69 wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_DISPLAY_CORE); 70 mutex_lock(&dev_priv->display.pps.mutex); 78 struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); local 80 mutex_unlock(&dev_priv->display.pps.mutex); 81 intel_display_power_put(dev_priv, POWER_DOMAIN_DISPLAY_CORE, wakeref); 89 struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); local 97 if (drm_WARN(&dev_priv->drm, 98 intel_de_read(dev_priv, intel_d 163 vlv_find_free_pps(struct drm_i915_private *dev_priv) argument 201 struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); local 249 struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); local 273 pps_has_pp_on(struct drm_i915_private *dev_priv, int pps_idx) argument 278 pps_has_vdd_on(struct drm_i915_private *dev_priv, int pps_idx) argument 283 pps_any(struct drm_i915_private *dev_priv, int pps_idx) argument 289 vlv_initial_pps_pipe(struct drm_i915_private *dev_priv, enum port port, pps_check check) argument 313 struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); local 435 intel_pps_reset_all(struct drm_i915_private *dev_priv) argument 482 struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); local 529 struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); local 542 struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); local 555 struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); local 589 struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); local 695 struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); local 716 struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); local 797 struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); local 896 struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); local 919 struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); local 981 struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); local 1036 struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); local 1062 struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); local 1112 struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev); local 1142 vlv_steal_power_sequencer(struct drm_i915_private *dev_priv, enum pipe pipe) argument 1173 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 1217 struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); local 1269 struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); local 1338 struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); local 1385 struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); local 1406 struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); local 1469 struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); local 1645 intel_pps_unlock_regs_wa(struct drm_i915_private *dev_priv) argument 1704 assert_pps_unlocked(struct drm_i915_private *dev_priv, enum pipe pipe) argument [all...]
H A D	i9xx_wm.c	96 static void chv_set_memory_dvfs(struct drm_i915_private *dev_priv, bool enable) argument 100 vlv_punit_get(dev_priv); 102 val = vlv_punit_read(dev_priv, PUNIT_REG_DDR_SETUP2); 109 vlv_punit_write(dev_priv, PUNIT_REG_DDR_SETUP2, val); 111 if (wait_for((vlv_punit_read(dev_priv, PUNIT_REG_DDR_SETUP2) & 113 drm_err(&dev_priv->drm, 116 vlv_punit_put(dev_priv); 119 static void chv_set_memory_pm5(struct drm_i915_private *dev_priv, bool enable) argument 123 vlv_punit_get(dev_priv); 125 val = vlv_punit_read(dev_priv, PUNIT_REG_DSPSSP 138 _intel_set_memory_cxsr(struct drm_i915_private *dev_priv, bool enable) argument 227 intel_set_memory_cxsr(struct drm_i915_private *dev_priv, bool enable) argument 264 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 300 i9xx_get_fifo_size(struct drm_i915_private *dev_priv, enum i9xx_plane_id i9xx_plane) argument 316 i830_get_fifo_size(struct drm_i915_private *dev_priv, enum i9xx_plane_id i9xx_plane) argument 333 i845_get_fifo_size(struct drm_i915_private *dev_priv, enum i9xx_plane_id i9xx_plane) argument 616 single_enabled_crtc(struct drm_i915_private *dev_priv) argument 631 pnv_update_wm(struct drm_i915_private *dev_priv) argument 713 g4x_write_wm_values(struct drm_i915_private *dev_priv, const struct g4x_wm_values *wm) argument 745 vlv_write_wm_values(struct drm_i915_private *dev_priv, const struct vlv_wm_values *wm) argument 823 g4x_setup_wm_latency(struct drm_i915_private *dev_priv) argument 880 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); local 934 struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); local 950 struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); local 974 struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); local 1054 struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); local 1198 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 1277 g4x_merge_wm(struct drm_i915_private *dev_priv, struct g4x_wm_values *wm) argument 1321 g4x_program_watermarks(struct drm_i915_private *dev_priv) argument 1345 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 1358 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 1387 vlv_setup_wm_latency(struct drm_i915_private *dev_priv) argument 1407 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); local 1448 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 1532 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 1560 struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); local 1577 struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); local 1636 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 1756 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 1903 vlv_merge_wm(struct drm_i915_private *dev_priv, struct vlv_wm_values *wm) argument 1946 vlv_program_watermarks(struct drm_i915_private *dev_priv) argument 1982 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 1995 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 2008 i965_update_wm(struct drm_i915_private *dev_priv) argument 2097 i9xx_update_wm(struct drm_i915_private *dev_priv) argument 2240 i845_update_wm(struct drm_i915_private *dev_priv) argument 2415 ilk_display_fifo_size(const struct drm_i915_private *dev_priv) argument 2426 ilk_plane_wm_reg_max(const struct drm_i915_private *dev_priv, int level, bool is_sprite) argument 2444 ilk_cursor_wm_reg_max(const struct drm_i915_private *dev_priv, int level) argument 2452 ilk_fbc_wm_reg_max(const struct drm_i915_private *dev_priv) argument 2461 ilk_plane_wm_max(const struct drm_i915_private *dev_priv, int level, const struct intel_wm_config *config, enum intel_ddb_partitioning ddb_partitioning, bool is_sprite) argument 2502 ilk_cursor_wm_max(const struct drm_i915_private *dev_priv, int level, const struct intel_wm_config *config) argument 2514 ilk_compute_wm_maximums(const struct drm_i915_private *dev_priv, int level, const struct intel_wm_config *config, enum intel_ddb_partitioning ddb_partitioning, struct ilk_wm_maximums *max) argument 2526 ilk_compute_wm_reg_maximums(const struct drm_i915_private *dev_priv, int level, struct ilk_wm_maximums *max) argument 2581 ilk_compute_wm_level(const struct drm_i915_private *dev_priv, const struct intel_crtc *crtc, int level, struct intel_crtc_state *crtc_state, const struct intel_plane_state *pristate, const struct intel_plane_state *sprstate, const struct intel_plane_state *curstate, struct intel_wm_level *result) argument 2661 intel_fixup_spr_wm_latency(struct drm_i915_private *dev_priv, u16 wm[5]) argument 2669 intel_fixup_cur_wm_latency(struct drm_i915_private *dev_priv, u16 wm[5]) argument 2677 ilk_increase_wm_latency(struct drm_i915_private *dev_priv, u16 wm[5], u16 min) argument 2692 snb_wm_latency_quirk(struct drm_i915_private *dev_priv) argument 2714 snb_wm_lp3_irq_quirk(struct drm_i915_private *dev_priv) argument 2743 ilk_setup_wm_latency(struct drm_i915_private *dev_priv) argument 2770 ilk_validate_pipe_wm(struct drm_i915_private *dev_priv, struct intel_pipe_wm *pipe_wm) argument 2797 struct drm_i915_private *dev_priv = to_i915(state->base.dev); local 2871 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 2928 ilk_merge_wm_level(struct drm_i915_private *dev_priv, int level, struct intel_wm_level *ret_wm) argument 2961 ilk_wm_merge(struct drm_i915_private *dev_priv, const struct intel_wm_config *config, const struct ilk_wm_maximums *max, struct intel_pipe_wm *merged) argument 3018 ilk_wm_lp_latency(struct drm_i915_private *dev_priv, int level) argument 3027 ilk_compute_wm_results(struct drm_i915_private *dev_priv, const struct intel_pipe_wm *merged, enum intel_ddb_partitioning partitioning, struct ilk_wm_values *results) argument 3096 ilk_find_best_result(struct drm_i915_private *dev_priv, struct intel_pipe_wm *r1, struct intel_pipe_wm *r2) argument 3128 ilk_compute_wm_dirty(struct drm_i915_private *dev_priv, const struct ilk_wm_values *old, const struct ilk_wm_values *new) argument 3174 _ilk_disable_lp_wm(struct drm_i915_private *dev_priv, unsigned int dirty) argument 3208 ilk_write_wm_values(struct drm_i915_private *dev_priv, struct ilk_wm_values *results) argument 3263 ilk_disable_lp_wm(struct drm_i915_private *dev_priv) argument 3268 ilk_compute_wm_config(struct drm_i915_private *dev_priv, struct intel_wm_config *config) argument 3286 ilk_program_watermarks(struct drm_i915_private *dev_priv) argument 3321 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 3334 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 3350 struct drm_i915_private *dev_priv = to_i915(dev); local 3432 ilk_wm_sanitize(struct drm_i915_private *dev_priv) argument 3517 g4x_read_wm_values(struct drm_i915_private *dev_priv, struct g4x_wm_values *wm) argument 3543 vlv_read_wm_values(struct drm_i915_private *dev_priv, struct vlv_wm_values *wm) argument 3619 g4x_wm_get_hw_state(struct drm_i915_private *dev_priv) argument 3712 g4x_wm_sanitize(struct drm_i915_private *dev_priv) argument 3767 vlv_wm_get_hw_state(struct drm_i915_private *dev_priv) argument 3867 vlv_wm_sanitize(struct drm_i915_private *dev_priv) argument 3923 ilk_init_lp_watermarks(struct drm_i915_private *dev_priv) argument 3935 ilk_wm_get_hw_state(struct drm_i915_private *dev_priv) argument 4012 i9xx_wm_init(struct drm_i915_private *dev_priv) argument [all...]
H A D	intel_vga.c	27 void intel_vga_disable(struct drm_i915_private *dev_priv) argument 29 struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev); 30 i915_reg_t vga_reg = intel_vga_cntrl_reg(dev_priv); 33 if (intel_de_read(dev_priv, vga_reg) & VGA_DISP_DISABLE) 44 intel_de_write(dev_priv, vga_reg, VGA_DISP_DISABLE); 45 intel_de_posting_read(dev_priv, vga_reg); 48 void intel_vga_redisable_power_on(struct drm_i915_private *dev_priv) argument 50 i915_reg_t vga_reg = intel_vga_cntrl_reg(dev_priv); 52 if (!(intel_de_read(dev_priv, vga_reg) & VGA_DISP_DISABLE)) { 53 drm_dbg_kms(&dev_priv [all...]
H A D	i9xx_plane.c	110 static bool i9xx_plane_has_fbc(struct drm_i915_private *dev_priv, argument 113 if (!HAS_FBC(dev_priv)) 116 if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) 118 else if (IS_IVYBRIDGE(dev_priv)) 121 else if (DISPLAY_VER(dev_priv) >= 4) 127 static struct intel_fbc *i9xx_plane_fbc(struct drm_i915_private *dev_priv, argument 130 if (i9xx_plane_has_fbc(dev_priv, i9xx_plane)) 131 return dev_priv->display.fbc[INTEL_FBC_A]; 138 struct drm_i915_private *dev_priv local 155 struct drm_i915_private *dev_priv = local 227 struct drm_i915_private *dev_priv = local 356 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 422 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); local 450 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); local 520 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); local 550 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); local 570 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); local 665 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); local 743 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); local 777 intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe) argument 980 struct drm_i915_private *dev_priv = to_i915(dev); local 1067 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local [all...]
H A D	intel_gmbus.h	37 int intel_gmbus_setup(struct drm_i915_private *dev_priv); 38 void intel_gmbus_teardown(struct drm_i915_private *dev_priv); 39 bool intel_gmbus_is_valid_pin(struct drm_i915_private *dev_priv, 44 intel_gmbus_get_adapter(struct drm_i915_private *dev_priv, unsigned int pin); 47 void intel_gmbus_reset(struct drm_i915_private *dev_priv);
H A D	intel_fbc.h	34 void intel_fbc_init(struct drm_i915_private *dev_priv); 35 void intel_fbc_cleanup(struct drm_i915_private *dev_priv); 36 void intel_fbc_sanitize(struct drm_i915_private *dev_priv); 40 void intel_fbc_invalidate(struct drm_i915_private *dev_priv, 43 void intel_fbc_flush(struct drm_i915_private *dev_priv,
H A D	icl_dsi.c	52 static int header_credits_available(struct drm_i915_private *dev_priv, argument 55 return (intel_de_read(dev_priv, DSI_CMD_TXCTL(dsi_trans)) & FREE_HEADER_CREDIT_MASK) 59 static int payload_credits_available(struct drm_i915_private *dev_priv, argument 62 return (intel_de_read(dev_priv, DSI_CMD_TXCTL(dsi_trans)) & FREE_PLOAD_CREDIT_MASK) 66 static bool wait_for_header_credits(struct drm_i915_private *dev_priv, argument 69 if (wait_for_us(header_credits_available(dev_priv, dsi_trans) >= 71 drm_err(&dev_priv->drm, "DSI header credits not released\n"); 78 static bool wait_for_payload_credits(struct drm_i915_private *dev_priv, argument 81 if (wait_for_us(payload_credits_available(dev_priv, dsi_trans) >= 83 drm_err(&dev_priv 100 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 176 struct drm_i915_private *dev_priv = to_i915(intel_dsi->base.base.dev); local 210 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 233 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 279 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 343 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 382 get_dsi_io_power_domains(struct drm_i915_private *dev_priv, struct intel_dsi *intel_dsi) argument 399 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 412 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 423 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 465 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 508 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 527 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 568 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 601 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 617 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 633 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 652 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 681 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 841 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 1005 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 1025 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 1072 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 1130 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 1213 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 1269 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 1300 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 1346 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 1366 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 1496 struct drm_i915_private *dev_priv = to_i915(dev); local 1548 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 1570 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 1679 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 1824 struct drm_i915_private *dev_priv = to_i915(dev); local 1932 icl_dsi_init(struct drm_i915_private *dev_priv, const struct intel_bios_encoder_data *devdata) argument [all...]
H A D	g4x_hdmi.c	30 struct drm_i915_private *dev_priv = to_i915(dev); local 39 if (!HAS_PCH_SPLIT(dev_priv) && crtc_state->limited_color_range) 54 if (HAS_PCH_CPT(dev_priv)) 56 else if (IS_CHERRYVIEW(dev_priv)) 61 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, hdmi_val); 62 intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg); 68 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 73 wakeref = intel_display_power_get_if_enabled(dev_priv, 78 ret = intel_sdvo_port_enabled(dev_priv, intel_hdmi->hdmi_reg, pipe); 80 intel_display_power_put(dev_priv, encode 157 struct drm_i915_private *dev_priv = to_i915(dev); local 224 struct drm_i915_private *dev_priv = to_i915(dev); local 284 struct drm_i915_private *dev_priv = to_i915(dev); local 331 struct drm_i915_private *dev_priv = to_i915(dev); local 387 struct drm_i915_private *dev_priv = to_i915(dev); local 484 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 545 struct drm_i915_private *dev_priv = to_i915(dev); local 562 struct drm_i915_private *dev_priv = to_i915(dev); local 686 g4x_hdmi_init(struct drm_i915_private *dev_priv, i915_reg_t hdmi_reg, enum port port) argument [all...]
H A D	vlv_dsi_pll.c	60 static int dsi_calc_mnp(struct drm_i915_private *dev_priv, argument 71 drm_err(&dev_priv->drm, "DSI CLK Out of Range\n"); 75 if (IS_CHERRYVIEW(dev_priv)) { 119 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 125 int refclk = IS_CHERRYVIEW(dev_priv) ? 100000 : 25000; 150 drm_err(&dev_priv->drm, "wrong P1 divisor\n"); 160 drm_err(&dev_priv->drm, "wrong m_seed programmed\n"); 178 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 185 ret = dsi_calc_mnp(dev_priv, config, dsi_clk); 187 drm_dbg_kms(&dev_priv 216 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 248 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 263 bxt_dsi_pll_is_enabled(struct drm_i915_private *dev_priv) argument 304 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 323 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 355 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 381 struct drm_i915_private *dev_priv = to_i915(dev); local 428 struct drm_i915_private *dev_priv = to_i915(dev); local 481 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 539 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 574 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local [all...]
H A D	g4x_dp.c	59 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 63 if (IS_G4X(dev_priv)) { 66 } else if (HAS_PCH_SPLIT(dev_priv)) { 69 } else if (IS_CHERRYVIEW(dev_priv)) { 72 } else if (IS_VALLEYVIEW(dev_priv)) { 91 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 120 intel_dp->DP = intel_de_read(dev_priv, intel_dp->output_reg) & DP_DETECTED; 128 if (IS_IVYBRIDGE(dev_priv) && port == PORT_A) { 139 } else if (HAS_PCH_CPT(dev_priv) && port != PORT_A) { 142 intel_de_rmw(dev_priv, TRANS_DP_CT 169 struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev); local 179 assert_edp_pll(struct drm_i915_private *dev_priv, bool state) argument 194 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 234 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); local 249 cpt_dp_port_selected(struct drm_i915_private *dev_priv, enum port port, enum pipe *pipe) argument 272 g4x_dp_port_enabled(struct drm_i915_private *dev_priv, i915_reg_t dp_reg, enum port port, enum pipe *pipe) argument 299 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 335 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 412 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 581 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 598 struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); local 626 struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); local 652 struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); local 676 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 1028 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 1076 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 1128 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 1205 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 1213 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 1236 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); local 1252 struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); local 1265 struct drm_i915_private *dev_priv = to_i915(encoder->dev); local 1287 g4x_dp_init(struct drm_i915_private *dev_priv, i915_reg_t output_reg, enum port port) argument [all...]
H A D	skl_universal_plane.h	20 skl_universal_plane_create(struct drm_i915_private *dev_priv, 33 bool icl_is_nv12_y_plane(struct drm_i915_private *dev_priv, 36 bool icl_is_hdr_plane(struct drm_i915_private *dev_priv, enum plane_id plane_id);
H A D	intel_opregion.c	303 static int swsci(struct drm_i915_private *dev_priv, argument 307 struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev); 312 ret = check_swsci_function(dev_priv, function); 316 swsci = dev_priv->display.opregion->swsci; 334 drm_dbg(&dev_priv->drm, "SWSCI request already in progress\n"); 358 drm_dbg(&dev_priv->drm, "SWSCI request timed out\n"); 367 drm_dbg(&dev_priv->drm, "SWSCI request error %u\n", scic); 387 struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev); local 394 if (!HAS_DDI(dev_priv)) 398 ret = check_swsci_function(dev_priv, SWSCI_SBCB_DISPLAY_POWER_STAT 469 intel_opregion_notify_adapter(struct drm_i915_private *dev_priv, pci_power_t state) argument 486 asle_set_backlight(struct drm_i915_private *dev_priv, u32 bclp) argument 527 asle_set_als_illum(struct drm_i915_private *dev_priv, u32 alsi) argument 535 asle_set_pwm_freq(struct drm_i915_private *dev_priv, u32 pfmb) argument 541 asle_set_pfit(struct drm_i915_private *dev_priv, u32 pfit) argument 549 asle_set_supported_rotation_angles(struct drm_i915_private *dev_priv, u32 srot) argument 555 asle_set_button_array(struct drm_i915_private *dev_priv, u32 iuer) argument 579 asle_set_convertible(struct drm_i915_private *dev_priv, u32 iuer) argument 591 asle_set_docking(struct drm_i915_private *dev_priv, u32 iuer) argument 602 asle_isct_state(struct drm_i915_private *dev_priv) argument 612 struct drm_i915_private *dev_priv = opregion->i915; local 723 intel_didl_outputs(struct drm_i915_private *dev_priv) argument 762 intel_setup_cadls(struct drm_i915_private *dev_priv) argument 792 swsci_setup(struct drm_i915_private *dev_priv) argument 870 intel_opregion_setup(struct drm_i915_private *dev_priv) argument 1057 intel_opregion_get_panel_type(struct drm_i915_private *dev_priv) argument [all...]
H A D	g4x_dp.h	25 bool g4x_dp_port_enabled(struct drm_i915_private *dev_priv, 28 bool g4x_dp_init(struct drm_i915_private *dev_priv, 43 static inline bool g4x_dp_port_enabled(struct drm_i915_private *dev_priv, argument 49 static inline bool g4x_dp_init(struct drm_i915_private *dev_priv, argument
/linux-master/drivers/gpu/drm/gma500/
H A D	mid_bios.c	21 struct drm_psb_private *dev_priv = to_drm_psb_private(dev); local 48 dev_priv->iLVDS_enable = fuse_value & FB_MIPI_DISABLE; 51 dev_priv->iLVDS_enable ? "LVDS display" : "MIPI display"); 54 if (dev_priv->iLVDS_enable) { 55 dev_priv->is_lvds_on = true; 56 dev_priv->is_mipi_on = false; 58 dev_priv->is_mipi_on = true; 59 dev_priv->is_lvds_on = false; 62 dev_priv->video_device_fuse = fuse_value; 70 dev_priv 94 mid_get_pci_revID(struct drm_psb_private *dev_priv) argument 162 mid_get_vbt_data_r0(struct drm_psb_private *dev_priv, u32 addr) argument 190 mid_get_vbt_data_r1(struct drm_psb_private *dev_priv, u32 addr) argument 218 mid_get_vbt_data_r10(struct drm_psb_private *dev_priv, u32 addr) argument 270 mid_get_vbt_data(struct drm_psb_private *dev_priv) argument 327 struct drm_psb_private *dev_priv = to_drm_psb_private(dev); local [all...]
H A D	gem.c	32 struct drm_psb_private *dev_priv = to_drm_psb_private(dev); local 33 u32 gpu_base = dev_priv->gtt.gatt_start; 55 psb_gtt_insert_pages(dev_priv, &pobj->resource, pages); 56 psb_mmu_insert_pages(psb_mmu_get_default_pd(dev_priv->mmu), pages, 77 struct drm_psb_private *dev_priv = to_drm_psb_private(dev); local 78 u32 gpu_base = dev_priv->gtt.gatt_start; 95 psb_mmu_remove_pages(psb_mmu_get_default_pd(dev_priv->mmu), 97 psb_gtt_remove_pages(dev_priv, &pobj->resource); 141 struct drm_psb_private *dev_priv = to_drm_psb_private(dev); local 155 ret = psb_gtt_allocate_resource(dev_priv, 264 struct drm_psb_private *dev_priv; local 332 struct drm_psb_private *dev_priv = to_drm_psb_private(dev); local 371 struct drm_psb_private *dev_priv = to_drm_psb_private(dev); local 407 struct drm_psb_private *dev_priv = to_drm_psb_private(dev); local [all...]
H A D	intel_gmbus.c	55 #define GMBUS_REG_READ(reg) ioread32(dev_priv->gmbus_reg + (reg)) 56 #define GMBUS_REG_WRITE(reg, val) iowrite32((val), dev_priv->gmbus_reg + (reg)) 71 struct drm_psb_private *dev_priv; member in struct:intel_gpio 78 struct drm_psb_private *dev_priv = to_drm_psb_private(dev); local 82 static void intel_i2c_quirk_set(struct drm_psb_private *dev_priv, bool enable) argument 89 if (!IS_PINEVIEW(dev_priv->dev)) 105 struct drm_psb_private *dev_priv = gpio->dev_priv; local 119 struct drm_psb_private *dev_priv = gpio->dev_priv; local 129 struct drm_psb_private *dev_priv = gpio->dev_priv; local 139 struct drm_psb_private *dev_priv = gpio->dev_priv; local 156 struct drm_psb_private *dev_priv = gpio->dev_priv; local 171 intel_gpio_create(struct drm_psb_private *dev_priv, u32 pin) argument 219 intel_i2c_quirk_xfer(struct drm_psb_private *dev_priv, struct i2c_adapter *adapter, struct i2c_msg *msgs, int num) argument 253 struct drm_psb_private *dev_priv = adapter->algo_data; local 397 struct drm_psb_private *dev_priv = to_drm_psb_private(dev); local 467 struct drm_psb_private *dev_priv = adapter->algo_data; local 482 struct drm_psb_private *dev_priv = to_drm_psb_private(dev); local [all...]
H A D	psb_irq.h	26 void gma_enable_pipestat(struct drm_psb_private *dev_priv, int pipe, u32 mask); 27 void gma_disable_pipestat(struct drm_psb_private *dev_priv, int pipe, u32 mask);
/linux-master/drivers/gpu/drm/i915/
H A D	i915_debugfs.h	15 void i915_debugfs_register(struct drm_i915_private *dev_priv); 18 static inline void i915_debugfs_register(struct drm_i915_private *dev_priv) {} argument
H A D	i915_irq.h	23 void intel_irq_init(struct drm_i915_private *dev_priv); 24 void intel_irq_fini(struct drm_i915_private *dev_priv); 25 int intel_irq_install(struct drm_i915_private *dev_priv); 26 void intel_irq_uninstall(struct drm_i915_private *dev_priv); 28 void gen5_enable_gt_irq(struct drm_i915_private *dev_priv, u32 mask); 29 void gen5_disable_gt_irq(struct drm_i915_private *dev_priv, u32 mask); 30 void gen11_reset_rps_interrupts(struct drm_i915_private *dev_priv); 31 void gen6_reset_rps_interrupts(struct drm_i915_private *dev_priv); 32 void gen6_enable_rps_interrupts(struct drm_i915_private *dev_priv); 33 void gen6_disable_rps_interrupts(struct drm_i915_private *dev_priv); [all...]
H A D	i915_vgpu.c	57 * @dev_priv: i915 device private 62 void intel_vgpu_detect(struct drm_i915_private *dev_priv) argument 64 struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev); 77 if (GRAPHICS_VER(dev_priv) < 6) 82 drm_err(&dev_priv->drm, 93 drm_info(&dev_priv->drm, "VGT interface version mismatch!\n"); 97 dev_priv->vgpu.caps = readl(shared_area + vgtif_offset(vgt_caps)); 99 dev_priv->vgpu.active = true; 100 mutex_init(&dev_priv->vgpu.lock); 101 drm_info(&dev_priv 117 intel_vgpu_active(struct drm_i915_private *dev_priv) argument 122 intel_vgpu_has_full_ppgtt(struct drm_i915_private *dev_priv) argument 127 intel_vgpu_has_hwsp_emulation(struct drm_i915_private *dev_priv) argument 132 intel_vgpu_has_huge_gtt(struct drm_i915_private *dev_priv) argument 151 struct drm_i915_private *dev_priv = ggtt->vm.i915; local 174 struct drm_i915_private *dev_priv = ggtt->vm.i915; local 190 struct drm_i915_private *dev_priv = ggtt->vm.i915; local 255 struct drm_i915_private *dev_priv = ggtt->vm.i915; local [all...]
/linux-master/drivers/gpu/drm/vmwgfx/
H A D	vmwgfx_streamoutput.c	93 struct vmw_private *dev_priv = res->dev_priv; local 102 cmd = VMW_CMD_CTX_RESERVE(dev_priv, sizeof(*cmd), so->ctx->id); 112 vmw_cmd_commit(dev_priv, sizeof(*cmd)); 121 struct vmw_private *dev_priv = res->dev_priv; local 128 mutex_lock(&dev_priv->binding_mutex); 130 mutex_unlock(&dev_priv->binding_mutex); 141 struct vmw_private *dev_priv = res->dev_priv; local 163 struct vmw_private *dev_priv = res->dev_priv; local 196 struct vmw_private *dev_priv = res->dev_priv; local 222 struct vmw_private *dev_priv = res->dev_priv; local 284 struct vmw_private *dev_priv = ctx->dev_priv; local 355 vmw_dx_streamoutput_cotable_list_scrub(struct vmw_private *dev_priv, struct list_head *list, bool readback) argument [all...]
H A D	vmwgfx_overlay.c	88 static int vmw_overlay_send_put(struct vmw_private *dev_priv, argument 95 bool have_so = (dev_priv->active_display_unit == vmw_du_screen_object); 119 cmds = VMW_CMD_RESERVE(dev_priv, fifo_size); 166 vmw_cmd_commit(dev_priv, fifo_size); 177 static int vmw_overlay_send_stop(struct vmw_private *dev_priv, argument 189 cmds = VMW_CMD_RESERVE(dev_priv, sizeof(*cmds)); 193 ret = vmw_fallback_wait(dev_priv, false, true, 0, 208 vmw_cmd_commit(dev_priv, sizeof(*cmds)); 219 static int vmw_overlay_move_buffer(struct vmw_private *dev_priv, argument 224 return vmw_bo_unpin(dev_priv, bu 244 vmw_overlay_stop(struct vmw_private *dev_priv, uint32_t stream_id, bool pause, bool interruptible) argument 291 vmw_overlay_update_stream(struct vmw_private *dev_priv, struct vmw_bo *buf, struct drm_vmw_control_stream_arg *arg, bool interruptible) argument 357 vmw_overlay_resume_all(struct vmw_private *dev_priv) argument 391 vmw_overlay_pause_all(struct vmw_private *dev_priv) argument 415 vmw_overlay_available(const struct vmw_private *dev_priv) argument 426 struct vmw_private *dev_priv = vmw_priv(dev); local 463 vmw_overlay_num_overlays(struct vmw_private *dev_priv) argument 471 vmw_overlay_num_free_overlays(struct vmw_private *dev_priv) argument 490 vmw_overlay_claim(struct vmw_private *dev_priv, uint32_t *out) argument 515 vmw_overlay_unref(struct vmw_private *dev_priv, uint32_t stream_id) argument 534 vmw_overlay_init(struct vmw_private *dev_priv) argument 558 vmw_overlay_close(struct vmw_private *dev_priv) argument [all...]
H A D	vmwgfx_ioctl.c	39 struct vmw_private *dev_priv = vmw_priv(dev); local 46 param->value = vmw_overlay_num_overlays(dev_priv); 49 param->value = vmw_overlay_num_free_overlays(dev_priv); 52 param->value = vmw_supports_3d(dev_priv) ? 1 : 0; 55 param->value = dev_priv->capabilities; 58 param->value = dev_priv->capabilities2; 61 param->value = vmw_fifo_caps(dev_priv); 64 param->value = dev_priv->max_primary_mem; 68 if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS)) 72 dev_priv, 128 struct vmw_private *dev_priv = vmw_priv(dev); local 175 struct vmw_private *dev_priv = vmw_priv(dev); local 251 struct vmw_private *dev_priv = vmw_priv(dev); local [all...]
H A D	vmwgfx_drv.h	126 * @dev_priv: Pointer to the device private for this resource. Immutable. 127 * @id: Device id. Protected by @dev_priv::resource_lock. 145 * @lru_head: List head for the LRU list. Protected by @dev_priv::resource_lock. 147 * the @dev_priv::binding_mutex 157 struct vmw_private *dev_priv; member in struct:vmw_resource 348 struct vmw_private *dev_priv; member in struct:vmw_ttm_tt 669 static inline void vmw_write(struct vmw_private *dev_priv, argument 672 if (vmw_is_svga_v3(dev_priv)) { 673 iowrite32(value, dev_priv->rmmio + offset); 675 spin_lock(&dev_priv 682 vmw_read(struct vmw_private *dev_priv, unsigned int offset) argument 705 has_sm4_context(const struct vmw_private *dev_priv) argument 716 has_sm4_1_context(const struct vmw_private *dev_priv) argument 727 has_sm5_context(const struct vmw_private *dev_priv) argument 738 has_gl43_context(const struct vmw_private *dev_priv) argument 744 vmw_max_num_uavs(struct vmw_private *dev_priv) argument 897 vmw_fifo_caps(const struct vmw_private *dev_priv) argument 911 vmw_is_cursor_bypass3_enabled(const struct vmw_private *dev_priv) argument 1416 vmw_fifo_resource_inc(struct vmw_private *dev_priv) argument 1421 vmw_fifo_resource_dec(struct vmw_private *dev_priv) argument 1455 vmw_fence_read(struct vmw_private *dev_priv) argument 1465 vmw_fence_write(struct vmw_private *dev_priv, u32 fence) argument [all...]
H A D	vmwgfx_gmr.c	37 static int vmw_gmr2_bind(struct vmw_private *dev_priv, argument 53 cmd_orig = cmd = VMW_CMD_RESERVE(dev_priv, cmd_size); 100 vmw_cmd_commit(dev_priv, cmd_size); 105 static void vmw_gmr2_unbind(struct vmw_private *dev_priv, argument 112 cmd = VMW_CMD_RESERVE(dev_priv, define_size); 122 vmw_cmd_commit(dev_priv, define_size); 126 int vmw_gmr_bind(struct vmw_private *dev_priv, argument 138 if (unlikely(!(dev_priv->capabilities & SVGA_CAP_GMR2))) 141 return vmw_gmr2_bind(dev_priv, &data_iter, num_pages, gmr_id); 145 void vmw_gmr_unbind(struct vmw_private *dev_priv, in argument [all...]

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Indexes created Mon May 20 13:24:45 MDT 2024