/linux-master/drivers/gpu/drm/amd/amdkfd/ |
H A D | kfd_mqd_manager.c | 125 if (gfx_info->max_sh_per_se > KFD_MAX_NUM_SH_PER_SE) { 127 gfx_info->max_sh_per_se * gfx_info->max_shader_engines); 146 for (sh = 0; sh < gfx_info->max_sh_per_se; sh++) 192 for (sh = 0; sh < gfx_info->max_sh_per_se; sh++) {
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H A D | kfd_topology.c | 1665 for (j = 0; j < gfx_info->max_sh_per_se; j++) { 1733 for (j = 0; j < gfx_info->max_sh_per_se; j++) { 1989 gfx_info->max_sh_per_se;
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H A D | kfd_crat.c | 2250 cu->array_count = gfx_info->max_sh_per_se *
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/linux-master/drivers/gpu/drm/amd/amdgpu/ |
H A D | amdgpu_atomfirmware.c | 778 adev->gfx.config.max_sh_per_se = gfx_info->v24.max_sh_per_se; 796 adev->gfx.config.max_sh_per_se = gfx_info->v27.max_sh_per_se; 817 adev->gfx.config.max_sh_per_se = gfx_info->v30.max_sh_per_se;
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H A D | gfx_v6_0.c | 1322 adev->gfx.config.max_sh_per_se); 1363 unsigned sh_per_se = max_t(unsigned, adev->gfx.config.max_sh_per_se, 1); 1456 adev->gfx.config.max_sh_per_se; 1461 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { 1465 ((i * adev->gfx.config.max_sh_per_se + j) * 1489 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { 1537 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { 1575 adev->gfx.config.max_sh_per_se = 2; 1592 adev->gfx.config.max_sh_per_se = 2; 1609 adev->gfx.config.max_sh_per_se [all...] |
H A D | gfx_v7_0.c | 1597 adev->gfx.config.max_sh_per_se); 1639 unsigned sh_per_se = max_t(unsigned, adev->gfx.config.max_sh_per_se, 1); 1757 adev->gfx.config.max_sh_per_se; 1762 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { 1765 active_rbs |= data << ((i * adev->gfx.config.max_sh_per_se + j) * 1791 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { 3301 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { 4220 adev->gfx.config.max_sh_per_se = 1; 4237 adev->gfx.config.max_sh_per_se = 1; 4255 adev->gfx.config.max_sh_per_se [all...] |
H A D | amdgpu_gfx.h | 186 unsigned max_sh_per_se; member in struct:amdgpu_gfx_config
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H A D | gfx_v8_0.c | 1665 adev->gfx.config.max_sh_per_se = 1; 1682 adev->gfx.config.max_sh_per_se = 1; 1729 adev->gfx.config.max_sh_per_se = 1; 1745 adev->gfx.config.max_sh_per_se = 1; 1762 adev->gfx.config.max_sh_per_se = 1; 1780 adev->gfx.config.max_sh_per_se = 1; 3436 adev->gfx.config.max_sh_per_se); 3487 unsigned sh_per_se = max_t(unsigned, adev->gfx.config.max_sh_per_se, 1); 3598 adev->gfx.config.max_sh_per_se; 3603 for (j = 0; j < adev->gfx.config.max_sh_per_se; [all...] |
H A D | amdgpu_debugfs.c | 130 if ((sh_bank != 0xFFFFFFFF && sh_bank >= adev->gfx.config.max_sh_per_se) || 256 if ((rd->id.grbm.sh != 0xFFFFFFFF && rd->id.grbm.sh >= adev->gfx.config.max_sh_per_se) || 898 config[no_regs++] = adev->gfx.config.max_sh_per_se;
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H A D | gfx_v9_0.c | 1495 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { 2252 adev->gfx.config.max_sh_per_se); 2263 adev->gfx.config.max_sh_per_se; 2267 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { 2270 active_rbs |= data << ((i * adev->gfx.config.max_sh_per_se + j) * 2433 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { 4355 adev->gfx.config.max_sh_per_se; 7205 adev->gfx.config.max_sh_per_se > 16) 7210 adev->gfx.config.max_sh_per_se); 7214 for (j = 0; j < adev->gfx.config.max_sh_per_se; [all...] |
H A D | gfx_v9_4_3.c | 1188 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { 4201 adev->gfx.config.max_sh_per_se > 16) 4206 adev->gfx.config.max_sh_per_se); 4211 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { 4218 disable_masks[i * adev->gfx.config.max_sh_per_se + j],
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H A D | amdgpu_atombios.c | 728 adev->gfx.config.max_sh_per_se = gfx_info->info.max_sh_per_se;
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H A D | amdgpu_amdkfd_gfx_v9.c | 1051 sh_cnt = adev->gfx.config.max_sh_per_se;
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H A D | gfxhub_v2_1.c | 551 adev->gfx.config.max_sh_per_se *
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H A D | gfx_v11_0.c | 1589 sa_mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_sh_per_se * 1630 adev->gfx.config.max_sh_per_se; 1632 adev->gfx.config.max_sh_per_se; 6361 adev->gfx.config.max_sh_per_se * 6445 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { 6446 bitmap = i * adev->gfx.config.max_sh_per_se + j;
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H A D | gfx_v9_4_2.c | 1864 for (sh_idx = 0; sh_idx < adev->gfx.config.max_sh_per_se; 1897 for (sh_idx = 0; sh_idx < adev->gfx.config.max_sh_per_se;
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H A D | amdgpu_discovery.c | 1480 adev->gfx.config.max_sh_per_se = le32_to_cpu(gc_info->v1.gc_num_sa_per_se); 1514 adev->gfx.config.max_sh_per_se = le32_to_cpu(gc_info->v2.gc_num_sh_per_se);
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H A D | gfx_v10_0.c | 4738 adev->gfx.config.max_sh_per_se); 4750 adev->gfx.config.max_sh_per_se; 4754 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { 4755 bitmap = i * adev->gfx.config.max_sh_per_se + j; 4766 active_rbs |= data << ((i * adev->gfx.config.max_sh_per_se + j) * 4793 num_sc = adev->gfx.config.max_shader_engines * adev->gfx.config.max_sh_per_se * 4927 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { 9369 adev->gfx.config.max_sh_per_se * 9458 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { 9459 bitmap = i * adev->gfx.config.max_sh_per_se [all...] |
H A D | amdgpu_kms.c | 866 dev_info->num_shader_arrays_per_engine = adev->gfx.config.max_sh_per_se;
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/linux-master/drivers/gpu/drm/radeon/ |
H A D | radeon_kms.c | 465 *value = rdev->config.cik.max_sh_per_se; 467 *value = rdev->config.si.max_sh_per_se;
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H A D | si.c | 3083 rdev->config.si.max_sh_per_se = 2; 3100 rdev->config.si.max_sh_per_se = 2; 3118 rdev->config.si.max_sh_per_se = 2; 3135 rdev->config.si.max_sh_per_se = 1; 3152 rdev->config.si.max_sh_per_se = 1; 3269 rdev->config.si.max_sh_per_se, 3273 rdev->config.si.max_sh_per_se, 3278 for (j = 0; j < rdev->config.si.max_sh_per_se; j++) { 5309 for (j = 0; j < rdev->config.si.max_sh_per_se; j++) {
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H A D | cik.c | 3181 rdev->config.cik.max_sh_per_se = 1; 3198 rdev->config.cik.max_sh_per_se = 1; 3216 rdev->config.cik.max_sh_per_se = 1; 3234 rdev->config.cik.max_sh_per_se = 1; 3336 rdev->config.cik.max_sh_per_se, 3341 for (j = 0; j < rdev->config.cik.max_sh_per_se; j++) { 5787 for (j = 0; j < rdev->config.cik.max_sh_per_se; j++) { 6554 for (j = 0; j < rdev->config.cik.max_sh_per_se; j++) {
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H A D | radeon.h | 2126 unsigned max_sh_per_se; member in struct:si_asic 2157 unsigned max_sh_per_se; member in struct:cik_asic
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/linux-master/drivers/gpu/drm/amd/include/ |
H A D | atomfirmware.h | 1748 uint8_t max_sh_per_se; member in struct:atom_gfx_info_v2_2 1768 uint8_t max_sh_per_se; member in struct:atom_gfx_info_v2_3 1793 uint8_t max_sh_per_se; member in struct:atom_gfx_info_v2_4 1828 uint8_t max_sh_per_se; member in struct:atom_gfx_info_v2_7 1869 uint8_t max_sh_per_se; member in struct:atom_gfx_info_v3_0
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/linux-master/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
H A D | vangogh_ppt.c | 2217 adev->gfx.config.max_sh_per_se * adev->gfx.config.max_shader_engines; 2243 aon_bits = hweight32(tmp) * adev->gfx.config.max_sh_per_se * adev->gfx.config.max_shader_engines;
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