#
00a11f97 |
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12-Jan-2024 |
Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com> |
drm/amdgpu: Enable seq64 manager and fix bugs - Enable the seq64 mapping sequence. - Fix wflinfo va conflict and other bugs. v1: - The seq64 area needs to be included in the AMDGPU_VA_RESERVED_SIZE otherwise the areas will conflict with user space allocations (Alex) - It needs to be mapped read only in the user VM (Alex) v2: - Instead of just one define for TOP/BOTTOM reserved space separate them into two (Christian) - Fix the CPU and VA calculations and while at it also cleanup error handling and kerneldoc (Christian) Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
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#
d3f452f3 |
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02-Oct-2023 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: add new INFO IOCTL query for input power Some chips provide both average and input power. Previously we just exposed average power, add a new query for input power. Example userspace: https://github.com/Umio-Yasuno/libdrm-amdgpu-sys-rs/tree/input_power Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d0206985 |
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02-Oct-2023 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: fall back to INPUT power for AVG power via INFO IOCTL For backwards compatibility with userspace. Fixes: 47f1724db4fe ("drm/amd: Introduce `AMDGPU_PP_SENSOR_GPU_INPUT_POWER`") Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2897 Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c8031019 |
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10-Oct-2023 |
Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com> |
drm/amdgpu: Implement a new 64bit sequence memory driver Developed a new driver which allocates a 64bit memory on each request in sequence order. At the moment, user queue fence memory is the main consumer of this seq64 driver. v2: Worked on review comments from Christian for the following modifications - Move driver name from "semaphore" to "seq64" - Remove unnecessary PT/PD mapping - Move enable_mes check into init/fini functions. v3: Worked on review comments from Christian - drop enable_mes check - use DECLARE_BITMAP for bit array - added kerneldoc for seq64 v4: Worked on review comments from Christian - Rename amdgpu_seq64_get name with amdgpu_seq64_alloc v5: Worked on review comments from Christian - Fix seq64 lockdep warning - move fpriv->seq64_va check into amdgpu_seq64_unmap() - make the function amdgpu_seq64_unmap() return as void. - reserve the buffers as not interruptible. v6: port to drm_exec (Alex) v7: disable for now (Arun) Signed-off-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6cb8e3ee |
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05-Oct-2023 |
Boyuan Zhang <boyuan.zhang@amd.com> |
drm/amdgpu: update ib start and size alignment Update IB starting address alignment and size alignment with correct values for decode and encode IPs. Decode IB starting address alignment: 256 bytes Decode IB size alignment: 64 bytes Encode IB starting address alignment: 256 bytes Encode IB size alignment: 4 bytes Also bump amdgpu driver version for this update. Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
cbad0dd1 |
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20-Sep-2023 |
Sathishkumar S <sathishkumar.sundararaju@amd.com> |
drm/amdgpu: fix ip count query for xcp partitions fix wrong ip count INFO on spatial partitions. update the query to return the instance count corresponding to the partition id. v2: initialize variables only when required to be (Christian) move variable declarations to the beginning of function (Christian) Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
7a41ed8b |
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06-Oct-2020 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: add new INFO ioctl query for the last GPU page fault Add a interface to query the last GPU page fault for the process. Useful for debugging context lost errors. v2: split vmhub representation between kernel and userspace v3: add locking when fetching fault info in INFO IOCTL Mesa MR: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23238 libdrm MR: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23238 Cc: samuel.pitoiset@gmail.com Reviewed-by: Christian König <christian.koenig@amd.com> Acked-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
ff96ddc3 |
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11-Sep-2023 |
Lijo Lazar <lijo.lazar@amd.com> |
drm/amdgpu: Add more fields to IP version Include subrevision and variant fileds also to IP version. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5aba5123 |
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12-Sep-2023 |
Sathishkumar S <sathishkumar.sundararaju@amd.com> |
drm/amdgpu: update IP count INFO query update the query to return the number of functional instances where there is more than an instance of the requested type and for others continue to return one. v2: count must reflect the actual number of engines (Alex) v3: fix wrong number of engines for vcn (Alex) Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d11bbace |
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12-Sep-2023 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: add VPE IP discovery info to HW IP info query Add missing IP discovery info. Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Lang Yu <lang.yu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
4e8303cf |
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11-Sep-2023 |
Lijo Lazar <lijo.lazar@amd.com> |
drm/amdgpu: Use function for IP version check Use an inline function for version check. Gives more flexibility to handle any format changes. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
86f2ec22 |
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05-Sep-2023 |
David Francis <David.Francis@amd.com> |
drm/amdgpu: Handle null atom context in VBIOS info ioctl On some APU systems, there is no atom context and so the atom_context struct is null. Add a check to the VBIOS_INFO branch of amdgpu_info_ioctl to handle this case, returning all zeroes. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: David Francis <David.Francis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f705a6f0 |
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25-Aug-2023 |
Mukul Joshi <mukul.joshi@amd.com> |
drm/amdgpu: Store CU info from all XCCs for GFX v9.4.3 Currently, we store CU info only for a single XCC assuming that it is the same for all XCCs. However, that may not be true. As a result, store CU info for all XCCs. This info is later used for CU masking. Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5f6e9cdc |
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30-May-2023 |
Lang Yu <Lang.Yu@amd.com> |
drm/amdgpu: add VPE FW version query support Add support to query VPE FW version. Signed-off-by: Lang Yu <Lang.Yu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
523c1280 |
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18-Dec-2022 |
Lang Yu <Lang.Yu@amd.com> |
drm/amdgpu: add user space CS support for VPE Enable command submission to VPE from user space. Signed-off-by: Lang Yu <Lang.Yu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5e7e8225 |
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05-Sep-2023 |
David Francis <David.Francis@amd.com> |
drm/amdgpu: Handle null atom context in VBIOS info ioctl On some APU systems, there is no atom context and so the atom_context struct is null. Add a check to the VBIOS_INFO branch of amdgpu_info_ioctl to handle this case, returning all zeroes. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: David Francis <David.Francis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
97e3c6a8 |
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25-Aug-2023 |
Mukul Joshi <mukul.joshi@amd.com> |
drm/amdgpu: Store CU info from all XCCs for GFX v9.4.3 Currently, we store CU info only for a single XCC assuming that it is the same for all XCCs. However, that may not be true. As a result, store CU info for all XCCs. This info is later used for CU masking. Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
9366c2e8 |
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10-Aug-2023 |
Mario Limonciello <mario.limonciello@amd.com> |
drm/amd: Rename AMDGPU_PP_SENSOR_GPU_POWER Use the clearer name `AMDGPU_PP_SENSOR_GPU_AVG_POWER` instead. Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
a0cc8e15 |
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22-Jul-2023 |
Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> |
drm/amdgpu: Update min() to min_t() in 'amdgpu_info_ioctl' Fixes the following: WARNING: min() should probably be min_t(size_t, size, sizeof(ip)) + ret = copy_to_user(out, &ip, min((size_t)size, sizeof(ip))); And other style fixes: WARNING: Prefer 'unsigned int' to bare use of 'unsigned' WARNING: Missing a blank line after declarations Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
adf64e21 |
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18-Jul-2023 |
Mario Limonciello <mario.limonciello@amd.com> |
drm/amd: Avoid reading the VBIOS part number twice The VBIOS part number is read both in amdgpu_atom_parse() as well as in atom_get_vbios_pn() and stored twice in the `struct atom_context` structure. Remove the first unnecessary read and move the `pr_info` line from that read into the second. v2: squash in unused variable removal Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5003ca63 |
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13-Jul-2023 |
Guchun Chen <guchun.chen@amd.com> |
drm/amdgpu: fix slab-out-of-bounds issue in amdgpu_vm_pt_create Recent code set xcp_id stored from file private data when opening device to amdgpu bo for accounting memory usage etc, but not all VMs are attached to this fpriv structure like the vm cases in amdgpu_mes_self_test, otherwise, KASAN will complain below out of bound access. And more importantly, VM code should not touch fpriv structure, so drop fpriv code handling from amdgpu_vm_pt. [ 77.292314] BUG: KASAN: slab-out-of-bounds in amdgpu_vm_pt_create+0x17e/0x4b0 [amdgpu] [ 77.293845] Read of size 4 at addr ffff888102c48a48 by task modprobe/1069 [ 77.294146] Call Trace: [ 77.294178] <TASK> [ 77.294208] dump_stack_lvl+0x49/0x63 [ 77.294260] print_report+0x16f/0x4a6 [ 77.294307] ? amdgpu_vm_pt_create+0x17e/0x4b0 [amdgpu] [ 77.295979] ? kasan_complete_mode_report_info+0x3c/0x200 [ 77.296057] ? amdgpu_vm_pt_create+0x17e/0x4b0 [amdgpu] [ 77.297556] kasan_report+0xb4/0x130 [ 77.297609] ? amdgpu_vm_pt_create+0x17e/0x4b0 [amdgpu] [ 77.299202] __asan_load4+0x6f/0x90 [ 77.299272] amdgpu_vm_pt_create+0x17e/0x4b0 [amdgpu] [ 77.300796] ? amdgpu_init+0x6e/0x1000 [amdgpu] [ 77.302222] ? amdgpu_vm_pt_clear+0x750/0x750 [amdgpu] [ 77.303721] ? preempt_count_sub+0x18/0xc0 [ 77.303786] amdgpu_vm_init+0x39e/0x870 [amdgpu] [ 77.305186] ? amdgpu_vm_wait_idle+0x90/0x90 [amdgpu] [ 77.306683] ? kasan_set_track+0x25/0x30 [ 77.306737] ? kasan_save_alloc_info+0x1b/0x30 [ 77.306795] ? __kasan_kmalloc+0x87/0xa0 [ 77.306852] amdgpu_mes_self_test+0x169/0x620 [amdgpu] v2: without specifying xcp partition for PD/PT bo, the xcp id is -1. Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2686 Fixes: 3ebfd221c1a8 ("drm/amdkfd: Store xcp partition id to amdgpu bo") Signed-off-by: Guchun Chen <guchun.chen@amd.com> Tested-by: Mikhail Gavrilov <mikhail.v.gavrilov@gmail.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
50e63308 |
|
16-Jul-2023 |
Guchun Chen <guchun.chen@amd.com> |
drm/amdgpu: Allocate root PD on correct partition file_priv needs to be setup firstly, otherwise, root PD will always be allocated on partition 0, even if opening the device from other partitions. Fixes: 3ebfd221c1a8 ("drm/amdkfd: Store xcp partition id to amdgpu bo") Signed-off-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
bc8ba5f2 |
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29-Jun-2023 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: return an error if query_video_caps is not set Should only be an issue for bring up when the function pointer is not set, but check it anyway to be safe. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
8ecee4cb |
|
13-Jul-2023 |
Guchun Chen <guchun.chen@amd.com> |
drm/amdgpu: fix slab-out-of-bounds issue in amdgpu_vm_pt_create Recent code set xcp_id stored from file private data when opening device to amdgpu bo for accounting memory usage etc, but not all VMs are attached to this fpriv structure like the vm cases in amdgpu_mes_self_test, otherwise, KASAN will complain below out of bound access. And more importantly, VM code should not touch fpriv structure, so drop fpriv code handling from amdgpu_vm_pt. [ 77.292314] BUG: KASAN: slab-out-of-bounds in amdgpu_vm_pt_create+0x17e/0x4b0 [amdgpu] [ 77.293845] Read of size 4 at addr ffff888102c48a48 by task modprobe/1069 [ 77.294146] Call Trace: [ 77.294178] <TASK> [ 77.294208] dump_stack_lvl+0x49/0x63 [ 77.294260] print_report+0x16f/0x4a6 [ 77.294307] ? amdgpu_vm_pt_create+0x17e/0x4b0 [amdgpu] [ 77.295979] ? kasan_complete_mode_report_info+0x3c/0x200 [ 77.296057] ? amdgpu_vm_pt_create+0x17e/0x4b0 [amdgpu] [ 77.297556] kasan_report+0xb4/0x130 [ 77.297609] ? amdgpu_vm_pt_create+0x17e/0x4b0 [amdgpu] [ 77.299202] __asan_load4+0x6f/0x90 [ 77.299272] amdgpu_vm_pt_create+0x17e/0x4b0 [amdgpu] [ 77.300796] ? amdgpu_init+0x6e/0x1000 [amdgpu] [ 77.302222] ? amdgpu_vm_pt_clear+0x750/0x750 [amdgpu] [ 77.303721] ? preempt_count_sub+0x18/0xc0 [ 77.303786] amdgpu_vm_init+0x39e/0x870 [amdgpu] [ 77.305186] ? amdgpu_vm_wait_idle+0x90/0x90 [amdgpu] [ 77.306683] ? kasan_set_track+0x25/0x30 [ 77.306737] ? kasan_save_alloc_info+0x1b/0x30 [ 77.306795] ? __kasan_kmalloc+0x87/0xa0 [ 77.306852] amdgpu_mes_self_test+0x169/0x620 [amdgpu] v2: without specifying xcp partition for PD/PT bo, the xcp id is -1. Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2686 Fixes: 3ebfd221c1a8 ("drm/amdkfd: Store xcp partition id to amdgpu bo") Signed-off-by: Guchun Chen <guchun.chen@amd.com> Tested-by: Mikhail Gavrilov <mikhail.v.gavrilov@gmail.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
dcaa32e1 |
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16-Jul-2023 |
Guchun Chen <guchun.chen@amd.com> |
drm/amdgpu: Allocate root PD on correct partition file_priv needs to be setup firstly, otherwise, root PD will always be allocated on partition 0, even if opening the device from other partitions. Fixes: 3ebfd221c1a8 ("drm/amdkfd: Store xcp partition id to amdgpu bo") Signed-off-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
02ff519e |
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16-Jun-2023 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: make mcbp a per device setting So we can selectively enable it on certain devices. No intended functional change. Reviewed-and-tested-by: Jiadong Zhu <Jiadong.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5daff15c |
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05-May-2023 |
Lang Yu <Lang.Yu@amd.com> |
drm/amdgpu: unmap and remove csa_va properly Root PD BO should be reserved before unmap and remove a bo_va from VM otherwise lockdep will complain. v2: check fpriv->csa_va is not NULL instead of amdgpu_mcbp (christian) [14616.936827] WARNING: CPU: 6 PID: 1711 at drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c:1762 amdgpu_vm_bo_del+0x399/0x3f0 [amdgpu] [14616.937096] Call Trace: [14616.937097] <TASK> [14616.937102] amdgpu_driver_postclose_kms+0x249/0x2f0 [amdgpu] [14616.937187] drm_file_free+0x1d6/0x300 [drm] [14616.937207] drm_close_helper.isra.0+0x62/0x70 [drm] [14616.937220] drm_release+0x5e/0x100 [drm] [14616.937234] __fput+0x9f/0x280 [14616.937239] ____fput+0xe/0x20 [14616.937241] task_work_run+0x61/0x90 [14616.937246] exit_to_user_mode_prepare+0x215/0x220 [14616.937251] syscall_exit_to_user_mode+0x2a/0x60 [14616.937254] do_syscall_64+0x48/0x90 [14616.937257] entry_SYSCALL_64_after_hwframe+0x63/0xcd Signed-off-by: Lang Yu <Lang.Yu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
109b4d8c |
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14-May-2023 |
Su Hui <suhui@nfschina.com> |
drm/amdgpu: remove unnecessary (void*) conversions No need cast (void*) to (struct amdgpu_device *). Signed-off-by: Su Hui <suhui@nfschina.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
934deb64 |
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23-Feb-2023 |
Philip Yang <Philip.Yang@amd.com> |
drm/amdgpu: Add memory partition id to amdgpu_vm If xcp_mgr is initialized, add mem_id to amdgpu_vm structure to store memory partition number when creating amdgpu_vm for the xcp. The xcp number is decided when opening the render device, for example /dev/dri/renderD129 is xcp_id 0, /dev/dri/renderD130 is xcp_id 1. Signed-off-by: Philip Yang <Philip.Yang@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
be3800f5 |
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28-Feb-2023 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu: find partition ID when open device Find partition ID when open device from render device minor. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-and-tested-by: Philip Yang<Philip.Yang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
bc224553 |
|
23-May-2022 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu/jpeg: add multiple jpeg rings support Add multiple jpeg rings support. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
1ba91b54 |
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09-Mar-2023 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: add support for new GFX shadow size query Use the new callback to fetch the data. Return an error if not supported. UMDs should use this query to check whether shadow buffers are supported and if so what size they should be. v2: return an error rather than a zerod structure. v3: drop GDS, move into dev_info structure. Data will be 0 if not supported. v4: drop local variable r Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5c65a4b8 |
|
19-Apr-2023 |
Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> |
drm/amd/amdgpu: Fix spaces in array indexing and indentations in amdgpu_kms.c Fix the following errors reported by checkpatch: ERROR: space prohibited before open square bracket '[' +#define TA_FW_NAME(type) [TA_FW_TYPE_PSP_##type] = #type ERROR: code indent should use tabs where possible + query_fw.fw_type = AMDGPU_INFO_FW_GFX_RLCV;$ Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
4f18b9a6 |
|
13-Apr-2023 |
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> |
drm/amdgpu: Add support for querying the max ibs in a submission. (v3) This info would be used by radv to figure out when we need to split a submission into multiple submissions. radv currently has a limit of 192 which seems to work for most gfx submissions, but is way too high for e.g. compute or sdma. Userspace is available at https://gitlab.freedesktop.org/bnieuwenhuizen/mesa/-/commits/ib-rejection-v3 v3: Completely rewrote based on suggestion of making it a separate query. Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2498 Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
b299221f |
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29-Jan-2023 |
Marek Olšák <marek.olsak@amd.com> |
drm/amdgpu: add more fields into device info, caches sizes, etc. AMDGPU_IDS_FLAGS_CONFORMANT_TRUNC_COORD: important for conformance on gfx11 Other fields are exposed from IP discovery. enabled_rb_pipes_mask_hi is added for future chips, currently 0. Mesa MR: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21403 Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
e3e84b0a |
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24-Dec-2022 |
Marek Olšák <marek.olsak@amd.com> |
drm/amdgpu: return the PCIe gen and lanes from the INFO ioctl For computing PCIe bandwidth in userspace and troubleshooting PCIe bandwidth issues. Note that this intentionally fills holes and padding in drm_amdgpu_info_device. Mesa MR: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20790 Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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88347fa1 |
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04-Dec-2022 |
Evan Quan <evan.quan@amd.com> |
drm/amdgpu: expose the minimum shader/memory clock frequency Otherwise, some UMD tools will treate them as 0 at default while actually they are not. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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5cfd9784 |
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04-Dec-2022 |
Evan Quan <evan.quan@amd.com> |
drm/amdgpu: expose peak profiling mode shader/memory clocks Expose those informations to UMD who need them as for standard profiling mode. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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56ee5122 |
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29-Nov-2022 |
Konstantin Meskhidze <konstantin.meskhidze@huawei.com> |
drm/amdgpu: Fix logic error This commit fixes logic error in function 'amdgpu_hw_ip_info': - value 'uvd' might be 'vcn'. Signed-off-by: Konstantin Meskhidze <konstantin.meskhidze@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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45b64fd9 |
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03-Nov-2022 |
Thomas Zimmermann <tzimmermann@suse.de> |
drm/fb-helper: Remove unnecessary include statements Remove include statements for <drm/drm_fb_helper.h> where it is not required (i.e., most of them). In a few places include other header files that are required by the source code. v3: * fix amdgpu include statements * fix rockchip include statements Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20221103151446.2638-23-tzimmermann@suse.de
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8a1fbb4a |
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28-Oct-2022 |
Yiqing Yao <yiqing.yao@amd.com> |
drm/amdgpu: Disable MCBP from soc21 for SRIOV [why] Start from soc21, CP does not support MCBP, so disable it. [how] Used amgpu_mcbp flag alone instead of checking if is in SRIOV to enable/disable MCBP. Only set flag to enable on asic_type prior to soc21 in SRIOV. Signed-off-by: Yiqing Yao <yiqing.yao@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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1d522b51 |
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25-Oct-2022 |
Graham Sider <Graham.Sider@amd.com> |
drm/amdgpu: correct MES debugfs versions Use mes.sched_version, mes.kiq_version for debugfs as mes.ucode_fw_version does not contain correct versioning information. Signed-off-by: Graham Sider <Graham.Sider@amd.com> Reviewed-by: Jack Xiao <Jack.Xiao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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b7236296 |
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16-Sep-2022 |
David Francis <David.Francis@amd.com> |
drm/amd: Add IMU fw version to fw version queries IMU is a new firmware for GFX11. There are four means by which firmware version can be queried from the driver: device attributes, vf2pf, debugfs, and the AMDGPU_INFO_FW_VERSION option in the amdgpu info ioctl. Add IMU as an option for those four methods. V2: Added debugfs Reviewed-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: David Francis <David.Francis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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e542ca6e |
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25-Oct-2022 |
Graham Sider <Graham.Sider@amd.com> |
drm/amdgpu: correct MES debugfs versions Use mes.sched_version, mes.kiq_version for debugfs as mes.ucode_fw_version does not contain correct versioning information. Signed-off-by: Graham Sider <Graham.Sider@amd.com> Reviewed-by: Jack Xiao <Jack.Xiao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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68bc1473 |
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16-Sep-2022 |
David Francis <David.Francis@amd.com> |
drm/amd: Add IMU fw version to fw version queries IMU is a new firmware for GFX11. There are four means by which firmware version can be queried from the driver: device attributes, vf2pf, debugfs, and the AMDGPU_INFO_FW_VERSION option in the amdgpu info ioctl. Add IMU as an option for those four methods. V2: Added debugfs Reviewed-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: David Francis <David.Francis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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10faf078 |
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15-Sep-2022 |
Yifan Zhang <yifan1.zhang@amd.com> |
drm/amdgpu: add MES and MES-KIQ version in debugfs This patch addes MES and MES-KIQ version in debugfs. Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com> Reviewed-by: Tim Huang <Tim.Huang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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670c6edf |
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13-Sep-2022 |
Hawking Zhang <Hawking.Zhang@amd.com> |
drm/amdgpu: add rlcv/rlcp version info to debugfs amdgpu_firmware_info debugfs will show rlcv/rlcp ucode version info Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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c4f306e3 |
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01-Jul-2022 |
Danilo Krummrich <dakr@redhat.com> |
drm/amdgpu: use idr_init_base() to initialize fpriv->bo_list_handles idr_init_base(), implemented by commit 6ce711f27500 ("idr: Make 1-based IDRs more efficient"), let us set an arbitrary base other than idr_init(), which uses base 0. Since, for this IDR, no ID < 1 is ever requested/allocated, using idr_init_base(&idr, 1) avoids unnecessary tree walks. Signed-off-by: Danilo Krummrich <dakr@redhat.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20220701185303.284082-3-dakr@redhat.com
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af14e7c2 |
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05-May-2022 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: add the IP discovery IP versions for HW INFO data Use the former pad element to store the IP versions from the IP discovery table. This allows userspace to get the IP version from the kernel to better align with hardware IP versions. Proposed mesa patch: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17411/diffs?commit_id=c8a63590dfd0d64e6e6a634dcfed993f135dd075 Reviewed-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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9c913f38 |
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14-Jul-2022 |
Guchun Chen <guchun.chen@amd.com> |
drm/amdgpu: drop runpm from amdgpu_device structure It's redundant, as now switching to rpm_mode to indicate runtime power management mode. Suggested-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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75a9ad8c |
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14-Jul-2022 |
Guchun Chen <guchun.chen@amd.com> |
drm/amdgpu: drop runtime pm disablement quirk on several sienna cichlid cards This quirk is not needed any more as it's fixed by bypassing SMU FW reloading in runtime resume. Signed-off-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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50fe04d4 |
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14-Jul-2022 |
Guchun Chen <guchun.chen@amd.com> |
drm/amdgpu: introduce runtime pm mode It can benefit code consistency in future. Suggested-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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ea937ad6 |
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10-Jun-2022 |
Michel Dänzer <mdaenzer@redhat.com> |
drm/amdgpu: Fix GTT size reporting in amdgpu_ioctl The commit below changed the TTM manager size unit from pages to bytes, but failed to adjust the corresponding calculations in amdgpu_ioctl. Fixes: dfa714b88eb0 ("drm/amdgpu: remove GTT accounting v2") Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1930 Bug: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6642 Tested-by: Martin Roukala <martin.roukala@mupuf.org> Tested-by: Mike Lothian <mike@fireburn.co.uk> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Michel Dänzer <mdaenzer@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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c904e3ac |
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10-Jun-2022 |
Michel Dänzer <mdaenzer@redhat.com> |
drm/amdgpu: Fix GTT size reporting in amdgpu_ioctl The commit below changed the TTM manager size unit from pages to bytes, but failed to adjust the corresponding calculations in amdgpu_ioctl. Fixes: dfa714b88eb0 ("drm/amdgpu: remove GTT accounting v2") Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1930 Bug: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6642 Tested-by: Martin Roukala <martin.roukala@mupuf.org> Tested-by: Mike Lothian <mike@fireburn.co.uk> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Michel Dänzer <mdaenzer@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org # 5.18.x
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69493c03 |
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13-May-2022 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: cleanup ctx implementation Let each context have a pointer to the ctx manager and properly initialize the adev pointer inside the context manager. Reduce the BUG_ON() in amdgpu_ctx_add_fence() into a WARN_ON() and directly return the sequence number instead of writing into a parmeter. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Shashank Sharma <shashank.sharma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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5a90c24a |
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04-May-2022 |
Alex Deucher <alexander.deucher@amd.com> |
Revert "drm/amdgpu: disable runpm if we are the primary adapter" This reverts commit b95dc06af3e683d6b7ddbbae178b2b2a21ee8b2b. This workaround is no longer necessary. We have a better workaround in commit f95af4a9236695 ("drm/amdgpu: don't runtime suspend if there are displays attached (v3)"). Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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d1acd68b |
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27-Apr-2022 |
Guchun Chen <guchun.chen@amd.com> |
drm/amdgpu: disable runtime pm on several sienna cichlid cards(v2) Disable runtime power management on several sienna cichlid cards, otherwise SMU will possibly fail to be resumed from runtime suspend. Will drop this after a clean solution between kernel driver and SMU FW is available. amdgpu 0000:63:00.0: amdgpu: GECC is enabled amdgpu 0000:63:00.0: amdgpu: SECUREDISPLAY: securedisplay ta ucode is not available amdgpu 0000:63:00.0: amdgpu: SMU is resuming... amdgpu 0000:63:00.0: amdgpu: SMU: I'm not done with your command: SMN_C2PMSG_66:0x0000000E SMN_C2PMSG_82:0x00000080 amdgpu 0000:63:00.0: amdgpu: Failed to SetDriverDramAddr! amdgpu 0000:63:00.0: amdgpu: Failed to setup smc hw! [drm:amdgpu_device_ip_resume_phase2 [amdgpu]] *ERROR* resume of IP block <smu> failed -62 amdgpu 0000:63:00.0: amdgpu: amdgpu_device_ip_resume failed (-62) v2: seperate to a function. Signed-off-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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7db47b83 |
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12-Jul-2021 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: remove VRAM accounting v2 This is provided by TTM now. Also switch man->size to bytes instead of pages and fix the double printing of size and usage in debugfs. v2: fix size checking as well Signed-off-by: Christian König <christian.koenig@amd.com> Tested-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220214093439.2989-8-christian.koenig@amd.com
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dfa714b8 |
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12-Jul-2021 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: remove GTT accounting v2 This is provided by TTM now. Also switch man->size to bytes instead of pages and fix the double printing of size and usage in debugfs. v2: fix size checking as well Signed-off-by: Christian König <christian.koenig@amd.com> Tested-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220214093439.2989-6-christian.koenig@amd.com
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b6fba4ec |
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07-Feb-2022 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: reserve the pd while cleaning up PRTs We want to have lockdep annotation here, so make sure that we reserve the PD while removing PRTs even if it isn't strictly necessary since the VM object is about to be destroyed anyway. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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e56694f7 |
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01-Feb-2022 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: rename amdgpu_vm_bo_rmv to _del Some people complained about the name and this matches much more Linux naming conventions for object functions. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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d0d66b8c |
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25-Jan-2022 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: move runtime pm init after drm and fbdev init Seems more logical to enable runtime pm at the end of the init sequence so we don't end up entering runtime suspend before init is finished. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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901e2be2 |
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24-Jan-2022 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: move PX checking into amdgpu_device_ip_early_init We need to set the APU flag from IP discovery before we evaluate this code. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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82890466 |
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18-Jan-2022 |
Mario Limonciello <mario.limonciello@amd.com> |
drm/amd: Fix MSB of SMU version printing Yellow carp has been outputting versions like `1093.24.0`, but this is supposed to be 69.24.0. That is the MSB is being interpreted incorrectly. The MSB is not part of the major version, but has generally been treated that way thus far. It's actually the program, and used to distinguish between two programs from a similar family but different codebase. Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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c4381d0e |
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12-Jan-2022 |
Bokun Zhang <Bokun.Zhang@amd.com> |
drm/amdgpu: Add interface to load SRIOV cap FW - Add interface to load SRIOV cap FW. If the FW does not exist, simply skip this FW loading routine. This FW will only be loaded under SRIOV. Other driver configuration will not be affected. By adding this interface, it will make us easier to prepare SRIOV Linux guest driver for different users. - Update sysfs interface to read cap FW version. - Refactor PSP FW loading routine under SRIOV to use a unified SWITCH statement instead of using IF statement - Remove redundant amdgpu_sriov_vf() check in FW loading routine Acked-by: Monk Liu <monk.liu@amd.com> Acked-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Bokun Zhang <Bokun.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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ec6aae97 |
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07-Jan-2022 |
Nirmoy Das <nirmoy.das@amd.com> |
drm/amdgpu: do not pass ttm_resource_manager to vram_mgr Do not allow exported amdgpu_vram_mgr_*() to accept any ttm_resource_manager pointer. Also there is no need to force other module to call a ttm function just to eventually call vram_mgr functions. v2: pass adev's vram_mgr instead of adev Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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1dd8b1b9 |
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07-Jan-2022 |
Nirmoy Das <nirmoy.das@amd.com> |
drm/amdgpu: do not pass ttm_resource_manager to gtt_mgr Do not allow exported amdgpu_gtt_mgr_*() to accept any ttm_resource_manager pointer. Also there is no need to force other module to call a ttm function just to eventually call gtt_mgr functions. v4: remove unused adev. v3: upcast mgr from ttm resopurce manager instead of getting it from adev. v2: pass adev's gtt_mgr instead of adev. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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b95dc06a |
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22-Dec-2021 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: disable runpm if we are the primary adapter If we are the primary adapter (i.e., the one used by the firwmare framebuffer), disable runtime pm. This fixes a regression caused by commit 55285e21f045 which results in the displays waking up shortly after they go to sleep due to the device coming out of runtime suspend and sending a hotplug uevent. v2: squash in reworked fix from Evan Fixes: 55285e21f045 ("fbdev/efifb: Release PCI device's runtime PM ref during FB destroy") Bug: https://bugzilla.kernel.org/show_bug.cgi?id=215203 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1840 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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c92f9096 |
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30-Jul-2021 |
Mario Limonciello <mario.limonciello@amd.com> |
drm/amdgpu: Convert SMU version to decimal in debugfs This is more useful when talking to the SMU team to have the information in this format, save one less step to manually do it. Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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4320e6f8 |
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21-Oct-2021 |
Candice Li <candice.li@amd.com> |
drm/amdgpu: Update TA version output in driver TA version should only be displayed in firmware version column. Signed-off-by: Candice Li <candice.li@amd.com> Reviewed-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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de3a1e33 |
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08-Sep-2021 |
Candice Li <candice.li@amd.com> |
drm/amdgpu: Unify PSP TA context Remove all TA binary structures and add the specific binary structure in struct ta_context. Signed-off-by: Candice Li <candice.li@amd.com> Reviewed-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6457205c |
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12-Aug-2021 |
Candice Li <candice.li@amd.com> |
drm/amd/amdgpu: consolidate PSP TA context Signed-off-by: Candice Li <candice.li@amd.com> Reviewed-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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222e0a71 |
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21-Jul-2021 |
Candice Li <candice.li@amd.com> |
drm/amd/amdgpu: add consistent PSP FW loading size checking Signed-off-by: Candice Li <candice.li@amd.com> Reviewed-by: John Clements <John.Clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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88f7f881 |
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02-Jul-2021 |
Nirmoy Das <nirmoy.das@amd.com> |
drm/amdgpu: separate out vm pasid assignment Use new helper function amdgpu_vm_set_pasid() to assign vm pasid value. This also ensures that we don't free a pasid from vm code as pasids are allocated somewhere else. Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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391629bd |
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15-Jun-2021 |
Nirmoy Das <nirmoy.das@amd.com> |
drm/amdgpu: remove amdgpu_vm_pt Page table entries are now in embedded in VM BO, so we do not need struct amdgpu_vm_pt. This patch replaces struct amdgpu_vm_pt with struct amdgpu_vm_bo_base. Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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415e51bd |
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24-May-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amdgpu: make audio dev's D-state transition PMFW-aware To correctly kick into BACO state, the audio dev's D-state transition(D0->D3) needs to be PMFW-aware. So, if the audio dev entered D3 state prior to our driver, we need to bring it back to D0 state and make sure there will be a D-state transition on runpm suspend. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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29b4c589 |
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14-Apr-2021 |
Jiawei Gu <Jiawei.Gu@amd.com> |
drm/amdgpu: Add vbios info ioctl interface Add AMDGPU_INFO_VBIOS_INFO subquery id for detailed vbios info. Provides a way for the user application to get the VBIOS information without having to parse the binary. It is useful for the user to be able to display in a simple way the VBIOS version in their system if they happen to encounter an issue. V2: Use numeric serial. Parse and expose vbios version string. V3: Remove redundant data in drm_amdgpu_info_vbios struct. V4: 64 bit alignment in drm_amdgpu_info_vbios. v5: squash together all the reverts, etc. (Alex) Signed-off-by: Jiawei Gu <Jiawei.Gu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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3fa8f89d |
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26-May-2021 |
Sathishkumar S <sathishkumar.sundararaju@amd.com> |
drm/amdgpu: enable smart shift on dGPU (v5) enable smart shift on dGPU if it is part of HG system and the platform supports ATCS method to handle power shift. V2: avoid psc updates in baco enter and exit (Lijo) fix alignment (Shashank) V3: rebased on unified ATCS handling. (Alex) V4: check for return value and warn on failed update (Shashank) return 0 if device does not support smart shift. (Lizo) V5: rebased on ATPX/ATCS structures global (Alex) Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Shashank Sharma <shashank.sharma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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72c8c97b |
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12-May-2021 |
Andrey Grodzovsky <andrey.grodzovsky@amd.com> |
drm/amdgpu: Split amdgpu_device_fini into early and late Some of the stuff in amdgpu_device_fini such as HW interrupts disable and pending fences finilization must be done right away on pci_remove while most of the stuff which relates to finilizing and releasing driver data structures can be kept until drm_driver.release hook is called, i.e. when the last device reference is dropped. v4: Change functions prefix early->hw and late->sw Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210512142648.666476-3-andrey.grodzovsky@amd.com
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8ab0d6f0 |
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04-May-2021 |
Luben Tuikov <luben.tuikov@amd.com> |
drm/amdgpu: Rename to ras_*_enabled Rename, ras_hw_supported --> ras_hw_enabled, and ras_features --> ras_enabled, to show that ras_enabled is a subset of ras_hw_enabled, which itself is a subset of the ASIC capability. Cc: Alexander Deucher <Alexander.Deucher@amd.com> Cc: John Clements <john.clements@amd.com> Cc: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Luben Tuikov <luben.tuikov@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: John Clements <John.Clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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acdae216 |
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03-May-2021 |
Luben Tuikov <luben.tuikov@amd.com> |
drm/amdgpu: Remove redundant ras->supported Remove redundant ras->supported, as this value is also stored in adev->ras_features. Use adev->ras_features, as that supercedes "ras", since the latter is its member. The dependency goes like this: ras <== adev->ras_features <== hw_supported, and is read as "ras depends on ras_features, which depends on hw_supported." The arrows show the flow of information, i.e. the dependency update. "hw_supported" should also live in "adev". Cc: Alexander Deucher <Alexander.Deucher@amd.com> Cc: John Clements <john.clements@amd.com> Cc: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Luben Tuikov <luben.tuikov@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: John Clements <John.Clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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a35455d0 |
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21-Apr-2021 |
Nirmoy Das <nirmoy.das@amd.com> |
drm/amdgpu: cleanup amdgpu_vm_init() Currently only way to create compute vm is through amdgpu_vm_make_compute(). So vm_context isn't required anymore for amdgpu_vm_init(). Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f4d3da72 |
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30-Mar-2021 |
Huacai Chen <chenhuacai@kernel.org> |
drm/amdgpu: Set a suitable dev_info.gart_page_size In Mesa, dev_info.gart_page_size is used for alignment and it was set to AMDGPU_GPU_PAGE_SIZE(4KB). However, the page table of AMDGPU driver requires an alignment on CPU pages. So, for non-4KB page system, gart_page_size should be max_t(u32, PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE). Signed-off-by: Rui Wang <wangr@lemote.com> Signed-off-by: Huacai Chen <chenhc@lemote.com> Link: https://github.com/loongson-community/linux-stable/commit/caa9c0a1 [Xi: rebased for drm-next, use max_t for checkpatch, and reworded commit message.] Signed-off-by: Xi Ruoyao <xry111@mengyan1223.wang> BugLink: https://gitlab.freedesktop.org/drm/amd/-/issues/1549 Tested-by: Dan Horák <dan@danny.cz> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
b98c6299 |
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09-Mar-2021 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: disentangle HG systems from vgaswitcheroo There's no need to keep vgaswitcheroo around for HG systems. They don't use muxes and their power control is handled via ACPI. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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b2aba43a |
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22-Jan-2021 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: enable DPM_FLAG_MAY_SKIP_RESUME and DPM_FLAG_SMART_SUSPEND flags (v2) Once the device has runtime suspended, we don't need to power it back up again for system suspend. Likewise for resume, we don't to power up the device again on resume only to power it back off again via runtime pm because it's still idle. v2: add DPM_FLAG_SMART_PREPARE as well Reviewed-by: Evan Quan <evan.quan@amd.com> Acked-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com> (v1) Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
e7bdf00e |
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01-Mar-2021 |
Kevin Wang <kevin1.wang@amd.com> |
drm/amdgpu: add SECURE DISPLAY TA firmware info in debugfs add SECUREDISPLAY TA firmware info in amdgpu_fimrware_info() Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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4d5ae731 |
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01-Mar-2021 |
Kevin Wang <kevin1.wang@amd.com> |
drm/amdgpu: refine PSP TA firmware info print in debugfs refine PSP TA firmware info print in amdgpu_firmware_info(). Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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03e0dbcd |
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01-Mar-2021 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: enable BACO runpm by default on sienna cichlid and navy flounder It works fine and was only disabled because primary GPUs don't enter runpm if there is a console bound to the fbdev due to the kmap. This will at least allow runpm on secondary cards. Reviewed-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
3e9e62c7 |
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28-Feb-2021 |
Kevin Wang <kevin1.wang@amd.com> |
drm/amdgpu: correct TA RAP firmware information print error miss RAP TA in loop. (when i == 4) Fix: drm/amdgpu: add RAP TA version print in amdgpu_firmware_info Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reported-by: Candice Li <candice.li@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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4890d4e9 |
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25-Feb-2021 |
Kevin Wang <kevin1.wang@amd.com> |
drm/amdgpu: add RAP TA version print in amdgpu_firmware_info add RAP TA version print in amdgpu_firmware_info. Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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6f786950 |
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02-Feb-2021 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/codec: drop the internal codec index And just use the ioctl index. They are the same. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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f35e9bdb |
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07-Jan-2021 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: add INFO ioctl support for querying video caps (v4) We currently hardcode these in mesa, but querying them from the kernel makes more sense since there may be board specific limitations that the kernel driver is better suited to determining. Userpace patches that use this interface: https://gitlab.freedesktop.org/leoliu/drm/-/commits/info_video_caps https://gitlab.freedesktop.org/leoliu/mesa/-/commits/info_video_caps v2: reorder the codecs to better align with mesa v3: add max_pixels_per_frame to handle the portrait case, squash in memory leak fix v4: drop extra break Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> (v2) Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
98d28ac2 |
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15-Feb-2021 |
Nirmoy Das <nirmoy.das@amd.com> |
drm/amdgpu: do not use drm middle layer for debugfs Use debugfs API directly instead of drm middle layer. This also includes following debugfs file output changes: 1 amdgpu_evict_vram/amdgpu_evict_gtt output will not contain any braces. e.g. (0) --> 0 2 amdgpu_gpu_recover output will print return value of amdgpu_device_gpu_recover() instead of not so important "gpu recover" message. v2: * checkpatch.pl: use '0444' instead of S_IRUGO. * remove S_IFREG from mode. * remove mode variable. Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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566c6e25 |
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30-Mar-2021 |
Huacai Chen <chenhuacai@kernel.org> |
drm/amdgpu: Set a suitable dev_info.gart_page_size In Mesa, dev_info.gart_page_size is used for alignment and it was set to AMDGPU_GPU_PAGE_SIZE(4KB). However, the page table of AMDGPU driver requires an alignment on CPU pages. So, for non-4KB page system, gart_page_size should be max_t(u32, PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE). Signed-off-by: Rui Wang <wangr@lemote.com> Signed-off-by: Huacai Chen <chenhc@lemote.com> Link: https://github.com/loongson-community/linux-stable/commit/caa9c0a1 [Xi: rebased for drm-next, use max_t for checkpatch, and reworded commit message.] Signed-off-by: Xi Ruoyao <xry111@mengyan1223.wang> BugLink: https://gitlab.freedesktop.org/drm/amd/-/issues/1549 Tested-by: Dan Horák <dan@danny.cz> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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25951362 |
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01-Mar-2021 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: enable BACO runpm by default on sienna cichlid and navy flounder It works fine and was only disabled because primary GPUs don't enter runpm if there is a console bound to the fbdev due to the kmap. This will at least allow runpm on secondary cards. Reviewed-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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8f66090b |
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07-Jan-2021 |
Thomas Zimmermann <tzimmermann@suse.de> |
drm/amdgpu: Remove references to struct drm_device.pdev Using struct drm_device.pdev is deprecated. Convert amdgpu to struct drm_device.dev. No functional changes. v3: * rebased Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210107080748.4768-3-tzimmermann@suse.de
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d00a88ab |
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09-Dec-2020 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: print what method we are using for runtime pm So we know when it's enabled and what method we are using. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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157e8306 |
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09-Dec-2020 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: support runtime pm for GPUs that support BOCO Enable runtime pm on non HG/PX BOCO capable boards. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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b10c1c5b |
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09-Dec-2020 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: add check for ACPI power resources Check if the device has ACPI power resources so we can enable runtime pm if so. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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fd496ca8 |
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08-Dec-2020 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: split BOCO and ATPX handling In preparation for systems that support d3cold on dGPUs independent of PX/HG. No functional change intended. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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35d3f41d |
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04-Dec-2020 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: enable runtime pm using BACO on CI dGPUs Works using BACO. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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8970b698 |
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12-Nov-2020 |
Lee Jones <lee.jones@linaro.org> |
drm/amd/amdgpu/amdgpu_kms: Fix misnaming of parameter 'dev' Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c:487: warning: Function parameter or member 'dev' not described in 'amdgpu_info_ioctl' drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c:487: warning: Excess function parameter 'adev' description in 'amdgpu_info_ioctl' Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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a5a52a43 |
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06-Nov-2020 |
Lee Jones <lee.jones@linaro.org> |
drm/amd/amdgpu/amdgpu_kms: Remove 'struct drm_amdgpu_info_device dev_info' from the stack Place it on the heap instead. Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c: In function ‘amdgpu_info_ioctl’: drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c:979:1: warning: the frame size of 1128 bytes is larger than 1024 bytes [-Wframe-larger-than=] Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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5088d657 |
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04-Nov-2020 |
Luben Tuikov <luben.tuikov@amd.com> |
drm/amdgpu: Make struct drm_driver const Make the definition of struct drm_driver a constant, to follow the latest developments in the DRM layer. Signed-off-by: Luben Tuikov <luben.tuikov@amd.com> [danvet: Rebase onto devm_drm_dev_alloc patch and drop the freesync ioctl line again that escaped from internal trees.] Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20201104100425.1922351-6-daniel.vetter@ffwll.ch
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5120cb54 |
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27-Aug-2020 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: add TOC firmware support for apu (v3) APU needs load toc firmware for gfx10 series on psp front door loading. v2: rebase against latest code v3: clarify error message Signed-off-by: Huang Rui <ray.huang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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9b498efa |
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23-Sep-2020 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: store noretry parameter per driver instance This will allow us to have different defaults per asic in a future patch. Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Luben Tuikov <luben.tuikov@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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c7b6bac9 |
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15-Sep-2020 |
Fenghua Yu <fenghua.yu@intel.com> |
drm, iommu: Change type of pasid to u32 PASID is defined as a few different types in iommu including "int", "u32", and "unsigned int". To be consistent and to match with uapi definitions, define PASID and its variations (e.g. max PASID) as "u32". "u32" is also shorter and a little more explicit than "unsigned int". No PASID type change in uapi although it defines PASID as __u64 in some places. Suggested-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Tony Luck <tony.luck@intel.com> Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com> Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Joerg Roedel <jroedel@suse.de> Link: https://lkml.kernel.org/r/1600187413-163670-2-git-send-email-fenghua.yu@intel.com
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f399d4de |
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08-Sep-2020 |
Changfeng <Changfeng.Zhu@amd.com> |
drm/amdgpu: add ta DTM/HDCP print in amdgpu_firmware_info for apu It needs to add ta DTM/HDCP print to get HDCP/DTM version info when cat amdgpu_firmware_info Signed-off-by: Changfeng <Changfeng.Zhu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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faeefe4e |
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26-Aug-2020 |
Jiansong Chen <Jiansong.Chen@amd.com> |
drm/amdgpu: disable runtime pm for navy_flounder Disable runtime pm for navy_flounder temporarily. Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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cf851f3f |
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25-Aug-2020 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: Fix buffer overflow in INFO ioctl The values for "se_num" and "sh_num" come from the user in the ioctl. They can be in the 0-255 range but if they're more than AMDGPU_GFX_MAX_SE (4) or AMDGPU_GFX_MAX_SH_PER_SE (2) then it results in an out of bounds read. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Acked-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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8aba21b7 |
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14-Aug-2020 |
Luben Tuikov <luben.tuikov@amd.com> |
drm/amdgpu: Embed drm_device into amdgpu_device (v3) a) Embed struct drm_device into struct amdgpu_device. b) Modify the inline-f drm_to_adev() accordingly. c) Modify the inline-f adev_to_drm() accordingly. d) Eliminate the use of drm_device.dev_private, in amdgpu. e) Switch from using drm_dev_alloc() to drm_dev_init(). f) Add a DRM driver release function, which frees the container amdgpu_device after all krefs on the contained drm_device have been released. v2: Split out adding adev_to_drm() into its own patch (previous commit), making this patch more succinct and clear. More detailed commit description. v3: squash in fix to call drmm_add_final_kfree() to avoid a warning. Signed-off-by: Luben Tuikov <luben.tuikov@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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82dff839 |
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26-Aug-2020 |
Jiansong Chen <Jiansong.Chen@amd.com> |
drm/amdgpu: disable runtime pm for navy_flounder Disable runtime pm for navy_flounder temporarily. Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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b5b97cab |
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25-Aug-2020 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: Fix buffer overflow in INFO ioctl The values for "se_num" and "sh_num" come from the user in the ioctl. They can be in the 0-255 range but if they're more than AMDGPU_GFX_MAX_SE (4) or AMDGPU_GFX_MAX_SH_PER_SE (2) then it results in an out of bounds read. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Acked-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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1348969a |
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23-Aug-2020 |
Luben Tuikov <luben.tuikov@amd.com> |
drm/amdgpu: drm_device to amdgpu_device by inline-f (v2) Get the amdgpu_device from the DRM device by use of an inline function, drm_to_adev(). The inline function resolves a pointer to struct drm_device to a pointer to struct amdgpu_device. v2: Use a typed visible static inline function instead of an invisible macro. Signed-off-by: Luben Tuikov <luben.tuikov@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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f1403342 |
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12-Aug-2020 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: revert "fix system hang issue during GPU reset" The whole approach wasn't thought through till the end. We already had a reset lock like this in the past and it caused the same problems like this one. Completely revert the patch for now and add individual trylock protection to the hardware access functions as necessary. This reverts commit df9c8d1aa278c435c30a69b8f2418b4a52fcb929. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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16c642ec |
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30-Jul-2020 |
Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> |
drm/amdgpu: new ids flag for tmz (v2) Allows UMD to know if TMZ is supported and enabled. This commit also bumps KMS_DRIVER_MINOR because if we don't UMD can't tell if "ids_flags & AMDGPU_IDS_FLAGS_TMZ == 0" means "tmz is not enabled" or "tmz may be enabled but the kernel doesn't report it". v2: use amdgpu_is_tmz() and reworded commit message. Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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9de59bc2 |
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03-Aug-2020 |
Dave Airlie <airlied@redhat.com> |
drm/ttm: rename ttm_mem_type_manager -> ttm_resource_manager. This name makes a lot more sense, since these are about managing driver resources rather than just memory ranges. Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200804025632.3868079-59-airlied@gmail.com
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6c28aed6 |
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03-Aug-2020 |
Dave Airlie <airlied@redhat.com> |
drm/amdgfx/ttm: use wrapper to get ttm memory managers Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200804025632.3868079-38-airlied@gmail.com
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8e326285 |
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28-Jul-2020 |
Peilin Ye <yepeilin.cs@gmail.com> |
drm/amdgpu: Prevent kernel-infoleak in amdgpu_info_ioctl() Compiler leaves a 4-byte hole near the end of `dev_info`, causing amdgpu_info_ioctl() to copy uninitialized kernel stack memory to userspace when `size` is greater than 356. In 2015 we tried to fix this issue by doing `= {};` on `dev_info`, which unfortunately does not initialize that 4-byte hole. Fix it by using memset() instead. Cc: stable@vger.kernel.org Fixes: c193fa91b918 ("drm/amdgpu: information leak in amdgpu_info_ioctl()") Fixes: d38ceaf99ed0 ("drm/amdgpu: add core driver (v4)") Suggested-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Peilin Ye <yepeilin.cs@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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543e8669 |
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28-Jul-2020 |
Peilin Ye <yepeilin.cs@gmail.com> |
drm/amdgpu: Prevent kernel-infoleak in amdgpu_info_ioctl() Compiler leaves a 4-byte hole near the end of `dev_info`, causing amdgpu_info_ioctl() to copy uninitialized kernel stack memory to userspace when `size` is greater than 356. In 2015 we tried to fix this issue by doing `= {};` on `dev_info`, which unfortunately does not initialize that 4-byte hole. Fix it by using memset() instead. Cc: stable@vger.kernel.org Fixes: c193fa91b918 ("drm/amdgpu: information leak in amdgpu_info_ioctl()") Fixes: d38ceaf99ed0 ("drm/amdgpu: add core driver (v4)") Suggested-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Peilin Ye <yepeilin.cs@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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df9c8d1a |
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08-Jul-2020 |
Dennis Li <Dennis.Li@amd.com> |
drm/amdgpu: fix system hang issue during GPU reset when GPU hang, driver has multi-paths to enter amdgpu_device_gpu_recover, the atomic adev->in_gpu_reset and hive->in_reset are used to avoid re-entering GPU recovery. During GPU reset and resume, it is unsafe that other threads access GPU, which maybe cause GPU reset failed. Therefore the new rw_semaphore adev->reset_sem is introduced, which protect GPU from being accessed by external threads during recovery. v2: 1. add rwlock for some ioctls, debugfs and file-close function. 2. change to use dqm->is_resetting and dqm_lock for protection in kfd driver. 3. remove try_lock and change adev->in_gpu_reset as atomic, to avoid re-enter GPU recovery for the same GPU hang. v3: 1. change back to use adev->reset_sem to protect kfd callback functions, because dqm_lock couldn't protect all codes, for example: free_mqd must be called outside of dqm_lock; [ 1230.176199] Hardware name: Supermicro SYS-7049GP-TRT/X11DPG-QT, BIOS 3.1 05/23/2019 [ 1230.177221] Call Trace: [ 1230.178249] dump_stack+0x98/0xd5 [ 1230.179443] amdgpu_virt_kiq_reg_write_reg_wait+0x181/0x190 [amdgpu] [ 1230.180673] gmc_v9_0_flush_gpu_tlb+0xcc/0x310 [amdgpu] [ 1230.181882] amdgpu_gart_unbind+0xa9/0xe0 [amdgpu] [ 1230.183098] amdgpu_ttm_backend_unbind+0x46/0x180 [amdgpu] [ 1230.184239] ? ttm_bo_put+0x171/0x5f0 [ttm] [ 1230.185394] ttm_tt_unbind+0x21/0x40 [ttm] [ 1230.186558] ttm_tt_destroy.part.12+0x12/0x60 [ttm] [ 1230.187707] ttm_tt_destroy+0x13/0x20 [ttm] [ 1230.188832] ttm_bo_cleanup_memtype_use+0x36/0x80 [ttm] [ 1230.189979] ttm_bo_put+0x1be/0x5f0 [ttm] [ 1230.191230] amdgpu_bo_unref+0x1e/0x30 [amdgpu] [ 1230.192522] amdgpu_amdkfd_free_gtt_mem+0xaf/0x140 [amdgpu] [ 1230.193833] free_mqd+0x25/0x40 [amdgpu] [ 1230.195143] destroy_queue_cpsch+0x1a7/0x270 [amdgpu] [ 1230.196475] pqm_destroy_queue+0x105/0x260 [amdgpu] [ 1230.197819] kfd_ioctl_destroy_queue+0x37/0x70 [amdgpu] [ 1230.199154] kfd_ioctl+0x277/0x500 [amdgpu] [ 1230.200458] ? kfd_ioctl_get_clock_counters+0x60/0x60 [amdgpu] [ 1230.201656] ? tomoyo_file_ioctl+0x19/0x20 [ 1230.202831] ksys_ioctl+0x98/0xb0 [ 1230.204004] __x64_sys_ioctl+0x1a/0x20 [ 1230.205174] do_syscall_64+0x5f/0x250 [ 1230.206339] entry_SYSCALL_64_after_hwframe+0x49/0xbe 2. remove try_lock and introduce atomic hive->in_reset, to avoid re-enter GPU recovery. v4: 1. remove an unnecessary whitespace change in kfd_chardev.c 2. remove comment codes in amdgpu_device.c 3. add more detailed comment in commit message 4. define a wrap function amdgpu_in_reset v5: 1. Fix some style issues. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Suggested-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Suggested-by: Christian König <christian.koenig@amd.com> Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com> Suggested-by: Lijo Lazar <Lijo.Lazar@amd.com> Suggested-by: Luben Tukov <luben.tuikov@amd.com> Signed-off-by: Dennis Li <Dennis.Li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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cd527780 |
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24-Jun-2020 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: enable runtime pm on vega10 when noretry=0 The failures with ROCm only happen with noretry=1, so enable runtime pm when noretry=0 (the current default). Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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b38c6968 |
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24-Apr-2020 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: rework runtime pm enablement for BACO Add a switch statement to simplify asic checks. Note that BACO is not supported on APUs, so there is no need to check them. Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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9ba8923c |
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14-Jun-2020 |
Navid Emamdoost <navid.emamdoost@gmail.com> |
drm/amdgpu: fix ref count leak in amdgpu_driver_open_kms in amdgpu_driver_open_kms the call to pm_runtime_get_sync increments the counter even in case of failure, leading to incorrect ref count. In case of failure, decrement the ref count before returning. Signed-off-by: Navid Emamdoost <navid.emamdoost@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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9b76e061 |
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16-Apr-2020 |
Likun Gao <Likun.Gao@amd.com> |
drm/amdgpu: disable runtime pm for sienna_cichlid temporarily Disable runtime pm for sienna_cichlid temporarily as BACO regression issue. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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d7aca4f0 |
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18-May-2020 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: simplify mec2 fw check Check if mec2 fw exists rather than checking asic types. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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b5861544 |
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06-May-2020 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: only set DPM_FLAG_NEVER_SKIP for legacy ATPX BOCO We only need to set DPM_FLAG_NEVER_SKIP for the legacy ATPX BOCO case. D3cold and BACO work as expected. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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f0d69678 |
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07-May-2020 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: drop pm_runtime_set_active The pci core handles this for us in pci_pm_init. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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e0751556 |
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18-Apr-2020 |
Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
PM: sleep: core: Rename DPM_FLAG_NEVER_SKIP Rename DPM_FLAG_NEVER_SKIP to DPM_FLAG_NO_DIRECT_COMPLETE which matches its purpose more closely. No functional impact. Suggested-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> # for PCI parts Acked-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Acked-by: Alan Stern <stern@rowland.harvard.edu> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Alex Deucher <alexander.deucher@amd.com>
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ad36d71b |
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07-Apr-2020 |
Aurabindo Pillai <mail@aurabindo.in> |
amdgpu_kms: Remove unnecessary condition check Execution will only reach here if the asserted condition is true. Hence there is no need for the additional check. Signed-off-by: Aurabindo Pillai <mail@aurabindo.in> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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5d11e37c |
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01-Mar-2020 |
Feifei Xu <Feifei.Xu@amd.com> |
drm/amdgpu/runpm: disable runpm on Vega10 Some framework test will fail if enable runpm on Vega10. Disable it untill issue fixed. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Tested-by: Kyle Chen <Kyle.Chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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752c683d |
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19-Feb-2020 |
Monk Liu <Monk.Liu@amd.com> |
drm/amdgpu: fix IB test MCBP bug 1)for gfx IB test we shouldn't insert DE meta data 2)we should make sure IB test finished before we send event 3 to hypervisor otherwise the IDLE from event 3 will preempt IB test, which is not designed as a compatible structure for MCBP Signed-off-by: Monk Liu <Monk.Liu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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e3eff4b5 |
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23-Jan-2020 |
Thomas Zimmermann <tzimmermann@suse.de> |
drm/amdgpu: Convert to CRTC VBLANK callbacks VBLANK callbacks in struct drm_driver are deprecated in favor of their equivalents in struct drm_crtc_funcs. Convert amdgpu over. v2: * don't wrap existing functions; change signature instead Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200123135943.24140-6-tzimmermann@suse.de
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4fdda2e6 |
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10-Oct-2019 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/runpm: enable runpm on baco capable VI+ asics Seems to work reliably on VI+ except for a few so enable runpm barring those where baco for runtime power management is not supported. [rajneesh] Picked https://patchwork.freedesktop.org/patch/335402/ to enable runtime pm with baco for kfd. Also fixed a checkpatch warning and added extra checks for VEGA20 and ARCTURUS. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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c9ffa427 |
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30-Oct-2019 |
Yintian Tao <yttao@amd.com> |
drm/amd/powerplay: enable pp one vf mode for vega10 Originally, due to the restriction from PSP and SMU, VF has to send message to hypervisor driver to handle powerplay change which is complicated and redundant. Currently, SMU and PSP can support VF to directly handle powerplay change by itself. Therefore, the old code about the handshake between VF and PF to handle powerplay will be removed and VF will use new the registers below to handshake with SMU. mmMP1_SMN_C2PMSG_101: register to handle SMU message mmMP1_SMN_C2PMSG_102: register to handle SMU parameter mmMP1_SMN_C2PMSG_103: register to handle SMU response v2: remove module parameter pp_one_vf v3: fix the parens v4: forbid vf to change smu feature v5: use hwmon_attributes_visible to skip sepicified hwmon atrribute v6: change skip condition at vega10_copy_table_to_smc Signed-off-by: Yintian Tao <yttao@amd.com> Acked-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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70f7eb63 |
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14-Nov-2019 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: disable gfxoff when using register read interface When gfxoff is enabled, accessing gfx registers via MMIO can lead to a hang. Bug: https://bugzilla.kernel.org/show_bug.cgi?id=205497 Acked-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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c57040d3 |
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14-Nov-2019 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: disable gfxoff when using register read interface When gfxoff is enabled, accessing gfx registers via MMIO can lead to a hang. Bug: https://bugzilla.kernel.org/show_bug.cgi?id=205497 Acked-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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72f058b7 |
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04-Oct-2019 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: enable runtime pm on BACO capable boards if runpm=1 BACO - Bus Active, Chip Off Everything is in place now. Not enabled by default yet. You still have to specify runpm=1. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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6ae6c7d4 |
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07-Nov-2019 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: start to disentangle boco from runtime pm BACO - Bus Active, Chip Off BOCO - Bus Off, Chip Off We originally only supported runtime pm on PX/HG laptops so most of the runtime pm code looks for this. Add a new flag to check for runtime pm enablement and use this rather than checking for PX/HG. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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31af062a |
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04-Oct-2019 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: rename amdgpu_device_is_px to amdgpu_device_supports_boco (v2) BACO - Bus Active, Chip Off BOCO - Bus Off, Chip Off To better match what we are checking for and to align with amdgpu_device_supports_baco. BOCO is used on PowerXpress/Hybrid Graphics systems and BACO is used on desktop dGPU boards. v2: fix typo in documentation Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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ca9317b9 |
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14-Nov-2019 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: disable gfxoff when using register read interface When gfxoff is enabled, accessing gfx registers via MMIO can lead to a hang. Bug: https://bugzilla.kernel.org/show_bug.cgi?id=205497 Acked-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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52f2e779 |
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08-Nov-2019 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: add driver support for JPEG2.0 and above By using JPEG IP block type Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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0388aee7 |
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08-Nov-2019 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: use the JPEG structure for general driver support JPEG1.0 will be functional along with VCN1.0 Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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976e51a7 |
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25-Oct-2019 |
Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> |
drm/amdgpu: Add DMCUB to firmware query interface The DMCUB firmware version can be read using the AMDGPU_INFO ioctl or the amdgpu_firmware_info debugfs entry. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Hersen Wu <hersenxs.wu@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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6a299d7a |
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05-Nov-2019 |
Evan Quan <evan.quan@amd.com> |
drm/amdgpu: register gpu instance before fan boost feature enablment Otherwise, the feature enablement will be skipped due to wrong count. Fixes: beff74bc6e0fa91 ("drm/amdgpu: fix a race in GPU reset with IB test (v2)") Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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b0adca4d |
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05-Nov-2019 |
Evan Quan <evan.quan@amd.com> |
drm/amdgpu: register gpu instance before fan boost feature enablment Otherwise, the feature enablement will be skipped due to wrong count. Fixes: beff74bc6e0fa91 ("drm/amdgpu: fix a race in GPU reset with IB test (v2)") Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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402c60d7 |
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10-Oct-2019 |
Hans de Goede <hdegoede@redhat.com> |
drm/amdgpu: Bail earlier when amdgpu.cik_/si_support is not set to 1 Bail from the pci_driver probe function instead of from the drm_driver load function. This avoid /dev/dri/card0 temporarily getting registered and then unregistered again, sending unwanted add / remove udev events to userspace. Specifically this avoids triggering the (userspace) bug fixed by this plymouth merge-request: https://gitlab.freedesktop.org/plymouth/plymouth/merge_requests/59 Note that despite that being a userspace bug, not sending unnecessary udev events is a good idea in general. BugLink: https://bugzilla.redhat.com/show_bug.cgi?id=1490490 Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
984d7a92 |
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10-Oct-2019 |
Hans de Goede <hdegoede@redhat.com> |
drm/amdgpu: Bail earlier when amdgpu.cik_/si_support is not set to 1 Bail from the pci_driver probe function instead of from the drm_driver load function. This avoid /dev/dri/card0 temporarily getting registered and then unregistered again, sending unwanted add / remove udev events to userspace. Specifically this avoids triggering the (userspace) bug fixed by this plymouth merge-request: https://gitlab.freedesktop.org/plymouth/plymouth/merge_requests/59 Note that despite that being a userspace bug, not sending unnecessary udev events is a good idea in general. BugLink: https://bugzilla.redhat.com/show_bug.cgi?id=1490490 Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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cf21e76a |
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24-Sep-2019 |
Marek Olšák <marek.olsak@amd.com> |
drm/amdgpu: return tcc_disabled_mask to userspace UMDs need this for correct programming of harvested chips. Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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6de088a0 |
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19-Sep-2019 |
Marek Olšák <marek.olsak@amd.com> |
drm/amdgpu: remove gfx9 NGG Never used. Signed-off-by: Marek Olšák <marek.olsak@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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815fb4c9 |
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24-Sep-2019 |
Marek Olšák <marek.olsak@amd.com> |
drm/amdgpu: return tcc_disabled_mask to userspace UMDs need this for correct programming of harvested chips. Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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73d8e6c7 |
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31-Aug-2019 |
Trek <trek00@inbox.ru> |
drm/amdgpu: Check for valid number of registers to read Do not try to allocate any amount of memory requested by the user. Instead limit it to 128 registers. Actually the longest series of consecutive allowed registers are 48, mmGB_TILE_MODE0-31 and mmGB_MACROTILE_MODE0-15 (0x2644-0x2673). Bug: https://bugs.freedesktop.org/show_bug.cgi?id=111273 Signed-off-by: Trek <trek00@inbox.ru> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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13238d4f |
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31-Aug-2019 |
Trek <trek00@inbox.ru> |
drm/amdgpu: Check for valid number of registers to read Do not try to allocate any amount of memory requested by the user. Instead limit it to 128 registers. Actually the longest series of consecutive allowed registers are 48, mmGB_TILE_MODE0-31 and mmGB_MACROTILE_MODE0-15 (0x2644-0x2673). Bug: https://bugs.freedesktop.org/show_bug.cgi?id=111273 Signed-off-by: Trek <trek00@inbox.ru> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
7c6e68c7 |
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13-Sep-2019 |
Andrey Grodzovsky <andrey.grodzovsky@amd.com> |
drm/amdgpu: Avoid HW GPU reset for RAS. Problem: Under certain conditions, when some IP bocks take a RAS error, we can get into a situation where a GPU reset is not possible due to issues in RAS in SMU/PSP. Temporary fix until proper solution in PSP/SMU is ready: When uncorrectable error happens the DF will unconditionally broadcast error event packets to all its clients/slave upon receiving fatal error event and freeze all its outbound queues, err_event_athub interrupt will be triggered. In such case and we use this interrupt to issue GPU reset. THe GPU reset code is modified for such case to avoid HW reset, only stops schedulers, deatches all in progress and not yet scheduled job's fences, set error code on them and signals. Also reject any new incoming job submissions from user space. All this is done to notify the applications of the problem. v2: Extract amdgpu_amdkfd_pre/post_reset from amdgpu_device_lock/unlock_adev Move amdgpu_job_stop_all_jobs_on_sched to amdgpu_job.c Remove print param from amdgpu_ras_query_error_count v3: Update based on prevoius bug fixing patch to properly call amdgpu_amdkfd_pre_reset for other XGMI hive memebers. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
9d1b3c78 |
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30-Aug-2019 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: reserve at least 4MB of VRAM for page tables v2 This hopefully helps reduce the contention for page tables. v2: adjust maximum reported VRAM size as well Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5a5011a7 |
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05-Aug-2019 |
Gerd Hoffmann <kraxel@redhat.com> |
drm/amdgpu: switch driver from bo->resv to bo->base.resv Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Christian König <christian.koenig@amd.com> Link: http://patchwork.freedesktop.org/patch/msgid/20190805140119.7337-14-kraxel@redhat.com
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#
cd1fd7b3 |
|
09-Jul-2019 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu: add harvest support for Arcturus Add VCN harvest support for Arcturus Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
fa739f4b |
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10-Jul-2019 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu: add multiple instances support for Arcturus Arcturus has dual-VCN. Need add multiple instances support for Arcturus. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c01b6a1d |
|
10-Jul-2019 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu: modify amdgpu_vcn to support multiple instances Arcturus has dual-VCN. Need Restruct amdgpu_device::vcn to support multiple vcns. There are no any logical changes here Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
fdafb359 |
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25-Jun-2019 |
Evan Quan <evan.quan@amd.com> |
drm/amdgpu: fix MGPU fan boost enablement for XGMI reset MGPU fan boost feature should not be enabled until all the devices from the same hive are all back from reset. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
be9250fb |
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12-Jun-2018 |
Hawking Zhang <Hawking.Zhang@amd.com> |
drm/amdgpu: set the default value of pa_sc_tile_steering_override So userspace can access it. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f92d5c61 |
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10-Jan-2019 |
Jack Xiao <Jack.Xiao@amd.com> |
drm/amdgpu: enable the static csa when mcbp enabled CSA is the Context Save Area for preemption. Acked-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
fdf2f6c5 |
|
09-Jun-2019 |
Sam Ravnborg <sam@ravnborg.org> |
drm/amd: drop use of drmP.h in amdgpu/amdgpu* Drop use of drmP.h in all files named amdgpu* in drm/amd/amdgpu/ Fix fallout. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: "David (ChunMing) Zhou" <David1.Zhou@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20190609220757.10862-10-sam@ravnborg.org
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#
beff74bc |
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28-May-2019 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: fix a race in GPU reset with IB test (v2) Split late_init into two functions, one (do_late_init) which just does the hw init, and late_init which calls do_late_init and schedules the IB test work. Call do_late_init in the GPU reset code to run the init code, but not schedule the IB test code. The IB test code is called directly in the gpu reset code so no need to run the IB tests in a separate work thread. If we do, we end up racing. v2: Rework late_init. Pull out the mgpu fan boost and xgmi pstate code into late_init so they get called in all cases. rename the late_init worker thread to delayed work since it's just the IB tests now which can happen later. Schedule the work at init and resume time. It's not needed at reset time because the IB tests are called directly. Reviewed-by: Christian König <christian.koenig@amd.com> Cc: Xinhui Pan <xinhui.pan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
dca29491 |
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10-May-2019 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: remove static GDS, GWS and OA allocation As far as we know this was never used by userspace and so should be removed. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
bb5a2bdf |
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09-Apr-2019 |
Yintian Tao <yttao@amd.com> |
drm/amdgpu: support dpm level modification under virtualization v3 Under vega10 virtualuzation, smu ip block will not be added. Therefore, we need add pp clk query and force dpm level function at amdgpu_virt_ops to support the feature. v2: add get_pp_clk existence check and use kzalloc to allocate buf v3: return -ENOMEM for allocation failure and correct the coding style Signed-off-by: Yintian Tao <yttao@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
1febb00e |
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06-Mar-2019 |
xinhui pan <xinhui.pan@amd.com> |
drm/amdgpu: export both supported and enabled ras features Signed-off-by: xinhui pan <xinhui.pan@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5cb77114 |
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17-Dec-2018 |
xinhui pan <xinhui.pan@amd.com> |
drm/amdgpu: add ioctl query for enabled ras features (v2) Add a query for userspace to check which RAS features are enabled. v2: squash in warning fix Signed-off-by: xinhui pan <xinhui.pan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
9b9ca62d |
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19-Nov-2018 |
xinhui pan <xinhui.pan@amd.com> |
drm/amdgpu: export ta fw info Output the ta fw, aka xgmi/ras, via debugfs. Signed-off-by: xinhui pan <xinhui.pan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
d3315853 |
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18-Feb-2019 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: Set DPM_FLAG_NEVER_SKIP when enabling PM-runtime Based on a similar patch from Rafael for radeon. When using ATPX to control dGPU power, the state is not retained across suspend and resume cycles by default. This can probably be loosened for Hybrid Graphics (_PR3) laptops where I think the state is properly retained. Fixes: c62ec4610c40 ("PM / core: Fix direct_complete handling for devices with no callbacks") Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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#
9b49c197 |
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12-Feb-2019 |
Colin Ian King <colin.king@canonical.com> |
drm/amdgpu: fix several indentation issues There are several statements that are incorrectly indented. Fix these. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
3bfa8897 |
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26-Oct-2018 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: wait for IB test on first device open Instead of delaying that to the first query. Otherwise we could try to use the SDMA for VM updates before the IB tests are done. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
2c486cc4 |
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26-Oct-2018 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: wait for IB test on first device open Instead of delaying that to the first query. Otherwise we could try to use the SDMA for VM updates before the IB tests are done. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
1e256e27 |
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15-Oct-2018 |
Rex Zhu <Rex.Zhu@amd.com> |
drm/amdgpu: Refine CSA related functions There is no functional changes, Use function arguments for SRIOV special variables which is hardcode in those functions. so we can share those functions in baremetal. Reviewed-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c66ed765 |
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19-Oct-2018 |
Andrey Grodzovsky <andrey.grodzovsky@amd.com> |
drm/amdgpu: Retire amdgpu_ring.ready flag v4 Start using drm_gpu_scheduler.ready isntead. v3: Add helper function to run ring test and set sched.ready flag status accordingly, clean explicit sched.ready sets from the IP specific files. v4: Add kerneldoc and rebase. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6ffb6b7f |
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22-Oct-2018 |
Rex Zhu <Rex.Zhu@amd.com> |
drm/amdgpu: Reverse the sequence of ctx_mgr_fini and vm_fini in amdgpu_driver_postclose_kms csa buffer will be created per ctx, when ctx fini, the csa buffer and va will be released. so need to do ctx_mgr fin before vm fini. Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
62d73fbc |
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26-Sep-2018 |
Evan Quan <evan.quan@amd.com> |
drm/amdgpu: added AMD GPU instance counting V2 Count all GPU instances from AMD(including iGPUs and dGPUs) in the system. V2: drop unnecessary initialization for other gpu_info members except mutex Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
77a2faa5 |
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14-Sep-2018 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: fix up GDS/GWS/OA shifting That only worked by pure coincident. Completely remove the shifting and always apply correct PAGE_SHIFT. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
4d11b4b2 |
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13-Sep-2018 |
David Francis <David.Francis@amd.com> |
drm/amdgpu: Add DMCU to firmware query interface DMCU firmware version can be read using the AMDGPU_INFO ioctl or the amdgpu_firmware_info debugfs entry Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
44876ae2 |
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12-Sep-2018 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: use IP presence to free uvd and vce handles Rather than checking the asic type, check whether the UVD or VCE IP blocks exist. This way we don't have to update the check with new asics that use VCN. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
b95874cf |
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10-Jul-2018 |
Likun Gao <Likun.Gao@amd.com> |
drm/amdgpu: add picasso for amdgpu kms Add picasso for amdgpu kms Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
ad9a5b78 |
|
27-Aug-2018 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: correctly sign extend 48bit addresses v3 Correct sign extend the GMC addresses to 48bit. v2: sign extending turned out easier than thought. v3: clean up the defines and move them into amdgpu_gmc.h as well Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
1b1f2fec |
|
01-Aug-2018 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: rework ctx entity creation Use a fixed number of entities for each hardware IP. The number of compute entities is reduced to four, SDMA keeps it two entities and all other engines just expose one entity. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
a245daf3 |
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01-Aug-2018 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: cleanup HW_IP query Move the code into a separate function. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
09b6f25b |
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15-Aug-2018 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: fix VM size reporting on Raven Raven doesn't have an VCE block and so also no buggy VCE firmware. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5df58525 |
|
09-Aug-2018 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: move display definitions into amdgpu_display header Demangle amdgpu.h. Signed-off-by: Huang Rui <ray.huang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
2cddc50e |
|
13-Aug-2018 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: move gem definitions into amdgpu_gem header Demangle amdgpu.h. Signed-off-by: Huang Rui <ray.huang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
a0f20845 |
|
30-Jul-2018 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: nuke amdgpu_bo_list_free The RCU grace period is harmless and avoiding it is not worth the effort of doubling the implementation. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f1e582eb |
|
25-Jul-2018 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: implement harvesting support for UVD 7.2 (v3) Properly handle cases where one or more instance of the IP block may be harvested. v2: make sure ip_num_rings is initialized amdgpu_queue_mgr.c v3: rebase on Christian's UVD changes, drop unused var Reviewed-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
4d4831a3 |
|
18-Jul-2018 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: expose only the first UVD instance for now Going to completely rework the context to ring mapping with Nayan's GSoC work, but for now just stopping to expose the second UVD instance should do it. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
f8a91d45 |
|
18-Jul-2018 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: clean up coding style a bit No need to bitcast a boolean and even if we should use "!!" instead. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
a5ccfe5c2 |
|
10-Jul-2018 |
Michel Dänzer <michel.daenzer@amd.com> |
drm/amdgpu: Make pin_size values atomic Concurrent execution of the non-atomic arithmetic could result in completely bogus values. v2: * Rebased on v2 of the previous patch Cc: stable@vger.kernel.org Bugzilla: https://bugs.freedesktop.org/106872 Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
ddc21af4 |
|
10-Jul-2018 |
Michel Dänzer <michel.daenzer@amd.com> |
drm/amdgpu: Keep track of amount of pinned CPU visible VRAM Instead of CPU invisible VRAM. Preparation for the following, no functional change intended. v2: * Also change amdgpu_vram_mgr_bo_invisible_size to amdgpu_vram_mgr_bo_visible_size, allowing further simplification (Christian König) Cc: stable@vger.kernel.org Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
8e2c7ad9 |
|
15-Jun-2018 |
Chunming Zhou <david1.zhou@amd.com> |
drm/amdgpu: update ib_start/size_alignment same as windows used PAGE_SIZE for start_alignment is far much than hw requirement, And now, update to expereince value from window side. Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Marek Olšák <marek.olsak@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
4bafe440 |
|
01-May-2018 |
Boyuan Zhang <boyuan.zhang@amd.com> |
drm/amdgpu: add AMDGPU_HW_IP_VCN_JPEG to info query Add AMDGPU_HW_IP_VCN_JPEG to info query Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
48ad368a |
|
30-May-2018 |
Andrey Grodzovsky <andrey.grodzovsky@amd.com> |
drm/amdgpu: move amdgpu_ctx_mgr_entity_fini to f_ops flush hook (V4) With this we can now terminate jobs enqueue into SW queue the moment the task is being killed instead of waiting for last user of drm file to release it. Also stop checking for kref_read(&ctx->refcount) == 1 when calling drm_sched_entity_do_release since other task might still hold a reference to this entity but we don't care since KILL means terminate job submission regardless of what other tasks are doing. v2: Use returned remaining timeout as parameter for the next call. Rebase. v3: Switch to working with jiffies. Streamline remainder TO usage. Rebase. v4: Rebase. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
10dd74ea |
|
15-May-2018 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu/vg20:Restruct uvd.inst to support multiple instances Vega20 has dual-UVD. Need add multiple instances support for uvd. Restruct uvd.inst, using uvd.inst[0] to replace uvd.inst->. Repurpose amdgpu_ring::me for instance index, and initialize to 0. There are no any logical changes here. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
2bb795f5 |
|
15-May-2018 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu/vg20:Restruct uvd to support multiple uvds Vega20 has dual-UVD. Need Restruct amdgpu_device::uvd to support multiple uvds. There are no any logical changes here. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
621a6318 |
|
22-Jan-2018 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: add save restore list cntl gpm and srm firmware support RLC save/restore list cntl/gpm_mem/srm_mem ucodes are used for CGPG and gfxoff function. Signed-off-by: Huang Rui <ray.huang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
32d8c662 |
|
17-Apr-2018 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: print the vbios version in the debugfs firmware info Useful for info gathering about what firmwares are in use in the driver. Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
2c773de2 |
|
15-Apr-2018 |
Shirish S <shirish.s@amd.com> |
drm/amdgpu: defer test IBs on the rings at boot (V3) amdgpu_ib_ring_tests() runs test IB's on rings at boot contributes to ~500 ms of amdgpu driver's boot time. This patch defers it and ensures that its executed in amdgpu_info_ioctl() if it wasn't scheduled. V2: Use queue_delayed_work() & flush_delayed_work(). V3: removed usage of separate wq, ensure ib tests is run before enabling clockgating. Signed-off-by: Shirish S <shirish.s@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5b79d048 |
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04-Apr-2018 |
Rex Zhu <Rex.Zhu@amd.com> |
drm/amd/pp: Remove struct pp_gpu_power Currently smu only calculate average gpu power in real time. for vddc/vddci/max power, User need to set start time and end time, firmware can calculate the average vddc/vddci/max power. but the type of return values is not unified. For Vi, return type is uint. For vega, return type is float. so this struct can't be suitable for all asics. Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
8ee3a52e |
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15-Apr-2018 |
Emily Deng <Emily.Deng@amd.com> |
drm/gpu-sched: fix force APP kill hang(v4) issue: there are VMC page fault occurred if force APP kill during 3dmark test, the cause is in entity_fini we manually signal all those jobs in entity's queue which confuse the sync/dep mechanism: 1)page fault occurred in sdma's clear job which operate on shadow buffer, and shadow buffer's Gart table is cleaned by ttm_bo_release since the fence in its reservation was fake signaled by entity_fini() under the case of SIGKILL received. 2)page fault occurred in gfx' job because during the lifetime of gfx job we manually fake signal all jobs from its entity in entity_fini(), thus the unmapping/clear PTE job depend on those result fence is satisfied and sdma start clearing the PTE and lead to GFX page fault. fix: 1)should at least wait all jobs already scheduled complete in entity_fini() if SIGKILL is the case. 2)if a fence signaled and try to clear some entity's dependency, should set this entity guilty to prevent its job really run since the dependency is fake signaled. v2: splitting drm_sched_entity_fini() into two functions: 1)The first one is does the waiting, removes the entity from the runqueue and returns an error when the process was killed. 2)The second one then goes over the entity, install it as completion signal for the remaining jobs and signals all jobs with an error code. v3: 1)Replace the fini1 and fini2 with better name 2)Call the first part before the VM teardown in amdgpu_driver_postclose_kms() and the second part after the VM teardown 3)Keep the original function drm_sched_entity_fini to refine the code. v4: 1)Rename entity->finished to entity->last_scheduled; 2)Rename drm_sched_entity_fini_job_cb() to drm_sched_entity_kill_jobs_cb(); 3)Pass NULL to drm_sched_entity_fini_job_cb() if -ENOENT; 4)Replace the type of entity->fini_status with "int"; 5)Remove the check about entity->finished. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Emily Deng <Emily.Deng@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
b13aa109 |
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26-Mar-2018 |
Rex Zhu <Rex.Zhu@amd.com> |
drm/amdgpu: Use dpm_enabled as dpm state flag driver will set dpm_enabled to true only when module parameter amdgpu_dpm not equal to 0 and smu hw initialize successfully. Reviewed-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
3ac952b1 |
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16-Mar-2018 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: add VCN to firmware query interface Need to be able to query the VCN firmware version from userspace to determine supported features, etc. Reviewed-by: Huang Rui <ray.huang@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6b034e25 |
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29-Jan-2018 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: limit the VM address space with older VCE FW versions Older VCE FW versions are buggy and can't work with 48bit address spaces. RFC: Should we limit the address space or just reject loading the older VCE firmware? Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
a3e9a15a |
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22-Jan-2018 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: apply top reserved VA space to pre Vega10 as well Reserve VA space at the top for older generations as well. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Monk Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
734dd01d |
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19-Jan-2018 |
Samuel Li <Samuel.Li@amd.com> |
drm/amdgpu: rename amdgpu_crtc_idx_to_irq_type Add display to the name for consistency. Signed-off-by: Samuel Li <Samuel.Li@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
aa8e286a |
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19-Jan-2018 |
Samuel Li <Samuel.Li@amd.com> |
drm/amdgpu: rename amdgpu_get_crtc_scanoutpos Add display to the name for consistency. Signed-off-by: Samuel Li <Samuel.Li@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
60bbade2 |
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16-Jan-2018 |
Rex Zhu <Rex.Zhu@amd.com> |
drm/amdgpu: Expose more GPU sensor queries Add sub-queries for stable pstate shader/memory clock. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5c2ff9a6 |
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05-Jan-2018 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: always allocate a PASIDs for each VM v2 Start to always allocate a pasid for each VM. v2: use dev_warn when we run out of PASIDs Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
770d13b1 |
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12-Jan-2018 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: move struct amdgpu_mc into amdgpu_gmc.h And rename it to amdgpu_gmc as well. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Samuel Li <Samuel.Li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
ab77e02c |
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05-Dec-2017 |
Noralf Trønnes <noralf@tronnes.org> |
drm/amdgpu: Use drm_fb_helper_lastclose() and _poll_changed() This driver can use drm_fb_helper_lastclose() in its .lastclose function. It can also use drm_fb_helper_output_poll_changed() as its .output_poll_changed callback. Remove the unused driver implementations. Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Signed-off-by: Noralf Trønnes <noralf@tronnes.org> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5b565e0e |
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06-Nov-2017 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: expose the VA above the hole to userspace Let userspace know how much area we have above the 48bit VA hole on Vega10. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
bb7939b2 |
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06-Nov-2017 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: fix VA hole handling on Vega10 v3 Similar to the CPU address space the VA on Vega10 has a hole in it. v2: use dev_dbg instead of dev_err v3: add some more comments to explain how the hw works Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> CC: stable@vger.kernel.org Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
1daee8b4 |
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07-Nov-2017 |
Pixel Ding <Pixel.Ding@amd.com> |
drm/amdgpu: revise retry init to fully cleanup driver Retry at drm_dev_register instead of amdgpu_device_init. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Pixel Ding <Pixel.Ding@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c6332b97 |
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05-Nov-2017 |
pding <Pixel.Ding@amd.com> |
drm/amdgpu: release exclusive mode after hw_init Signed-off-by: pding <Pixel.Ding@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
1884734a |
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05-Nov-2017 |
pding <Pixel.Ding@amd.com> |
drm/amdkfd: initialise kfd inside amdgpu_device_init Also finalize kfd inside amdgpu_device_fini. kfd device_init needs SRIOV exclusive accessing. Try to gather exclusive accessing to reduce time consuming. Signed-off-by: pding <Pixel.Ding@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
8840a387 |
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23-Oct-2017 |
pding <Pixel.Ding@amd.com> |
drm/amdgpu: retry init if it fails due to exclusive mode timeout (v3) The exclusive mode has real-time limitation in reality, such like being done in 300ms. It's easy observed if running many VF/VMs in single host with heavy CPU workload. If we find the init fails due to exclusive mode timeout, try it again. v2: - rewrite the condition for readable value. v3: - fix typo, add comments for sleep Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: pding <Pixel.Ding@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
1f7251b7 |
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09-Oct-2017 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: add VRAM lost query Allows userspace to figure out if VRAM was lost. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
e55f2b64 |
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09-Oct-2017 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: move the VRAM lost counter per context Instead of per device track the VRAM lost per context and return ECANCELED instead of ENODEV. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
396bcb41 |
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09-Oct-2017 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: partial revert VRAM lost handling v2 Keep blocking the CS, but revert everything else. Mapping BOs and info IOCTL are harmless and can still happen even when VRAM content ist lost. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
52c6a62c |
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26-Jun-2017 |
Andres Rodriguez <andresx7@gmail.com> |
drm/amdgpu: add interface for editing a foreign process's priority v3 The AMDGPU_SCHED_OP_PROCESS_PRIORITY_OVERRIDE ioctls are used to set the priority of a different process in the current system. When a request is dropped, the process's contexts will be restored to the priority specified at context creation time. A request can be dropped by setting the override priority to AMDGPU_CTX_PRIORITY_UNSET. An fd is used to identify the remote process. This is simpler than passing a pid number, which is vulnerable to re-use, etc. This functionality is limited to DRM_MASTER since abuse of this interface can have a negative impact on the system's performance. v2: removed unused output structure v3: change refcounted interface for a regular set operation Signed-off-by: Andres Rodriguez <andresx7@gmail.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
7ca24cf2 |
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12-Sep-2017 |
Marek Olšák <marek.olsak@amd.com> |
drm/amdgpu: add FENCE_TO_HANDLE ioctl that returns syncobj or sync_file for being able to convert an amdgpu fence into one of the handles. Mesa will use this. Reviewed-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
4562236b |
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12-Sep-2017 |
Harry Wentland <harry.wentland@amd.com> |
drm/amd/dc: Add dc display driver (v2) Supported DCE versions: 8.0, 10.0, 11.0, 11.2 v2: rebase against 4.11 Signed-off-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
ab5d6227 |
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12-Sep-2017 |
Monk Liu <Monk.Liu@amd.com> |
drm/amdgpu/sriov:fix missing error handling Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
02208441 |
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25-Aug-2017 |
Felix Kuehling <Felix.Kuehling@amd.com> |
drm/amdgpu: Add PASID management Allows assigning a PASID to a VM for identifying VMs involved in page faults. The global PASID manager is also exported in the KFD interface so that AMDGPU and KFD can share the PASID space. PASIDs of different sizes can be requested. On APUs, the PASID size is deterined by the capabilities of the IOMMU. So KFD must be able to allocate PASIDs in a smaller range. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
e618d306 |
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11-Aug-2017 |
Roger He <Hongbo.He@amd.com> |
drm/amd/amdgpu: store fragment_size in vm_manager adds fragment_size in the vm_manager structure and implements hardware setup for it. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Roger He <Hongbo.He@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
0f4b3c68 |
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31-Jul-2017 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: cleanup static CSA handling Move the CSA bo_va from the VM to the fpriv structure. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
3c848bb3 |
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07-Aug-2017 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: move vram usage tracking into the vram manager v2 Looks like a better place for this. v2: use atomic64_t members instead Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
9255d77d |
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07-Aug-2017 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: move gtt usage tracking into the gtt manager v2 It doesn't make much sense to count those numbers twice. v2: use and atomic64_t instead Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5c33f214 |
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28-Jul-2017 |
Felix Kuehling <Felix.Kuehling@amd.com> |
drm/amdgpu: Fix KFD initialization for multi-GPU systems kfd2kgd is device-specific, so it should not be a global variable. Merge amdgpu_amdkfd_load_interface and amdgpu_amdkfd_device_probe so that it's only needed as a local variable in one function. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6be7adb3 |
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23-May-2017 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: increase fragmentation size for Vega10 v2 The fragment bits work differently for Vega10 compared to previous generations. Increase the fragment size to 2MB for now to better handle that. v2: handle the hardware setup as well Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-and-tested-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
2014bc3f |
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26-May-2017 |
Xiangliang Yu <Xiangliang.Yu@amd.com> |
drm/amdgpu: correct clock info for SRIOV Currently, get clock info from default clk of pm if dpm is disable. Buf SRIOV doesn't support dpm and pm, can't get anything from pm. Only get clock info only from default clk of amdgpu for SRIOV. And driver get pm default clk also from amdgpu default clk and never be changed by others. So use amdgpu default clk value for SRIOV and non-dpm cases. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
09628c3f |
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30-Jun-2017 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: use TTM values instead of MC values for the info queries Use the TTM values instead of the hardware config here. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
dbfe85ea |
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19-Jun-2017 |
Flora Cui <Flora.Cui@amd.com> |
drm/amdgpu: Fix the exported always on CU bitmap Newer asics with 4 SEs are not able to fit the entire bitmask in the original field, use an array instead. v2: keep cu_ao_mask for backward compatibility. Signed-off-by: Flora Cui <Flora.Cui@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
9a4b7d4c |
|
09-Jun-2017 |
Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> |
drm/amdgpu: Add vm context module param Add VM update mode module param (amdgpu.vm_update_mode) that can used to control how VM pde/pte are updated for Graphics and Compute. BIT0 controls Graphics and BIT1 Compute. BIT0 [= 0] Graphics updated by SDMA [= 1] by CPU BIT1 [= 0] Compute updated by SDMA [= 1] by CPU By default, only for large BAR system vm_update_mode = 2, indicating that Graphics VMs will be updated via SDMA and Compute VMs will be updated via CPU. And for all all other systems (by default) vm_update_mode = 0 Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
2b059658 |
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29-May-2017 |
Michel Dänzer <michel.daenzer@amd.com> |
drm/amdgpu/radeon: Use radeon by default for CIK GPUs Even if CONFIG_DRM_AMDGPU_CIK is enabled. There is no feature parity yet for CIK, in particular amdgpu doesn't support HDMI/DisplayPort audio without DC. v2: * Clarify the lack of feature parity being related to HDMI/DP audio. * Fix "SI" typo in DRM_AMDGPU_CIK help entry. Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
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#
6dd13096 |
|
05-Jun-2017 |
Felix Kuehling <Felix.Kuehling@amd.com> |
drm/amdgpu: Add module param to control SI support If AMDGPU supports SI, add a module parameter to control SI support. It's off by default in AMDGPU as long as SI suppost is experimental, while it is on by default in radeon. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Acked-by: Michel Dänzer <michel.daenzer@amd.com> [ Michel Dänzer: Squash in amdgpu_si_support initialization fix ] Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
|
#
7df28986 |
|
05-Jun-2017 |
Felix Kuehling <Felix.Kuehling@amd.com> |
drm/amdgpu: Add module param to control CIK support If AMDGPU supports CIK, add a module parameter to control CIK support. It's on by default in AMDGPU, while it is off by default in radeon. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Acked-by: Michel Dänzer <michel.daenzer@amd.com>
|
#
68e2c5ff |
|
17-May-2017 |
Marek Olšák <marek.olsak@amd.com> |
drm/amdgpu: add an INFO query for monitoring VRAM CPU page faults v2: bump the DRM version Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
f1892138 |
|
15-May-2017 |
Chunming Zhou <David1.Zhou@amd.com> |
drm/amdgpu: return -ENODEV to user space when vram is lost v2 below ioctl will return -ENODEV: amdgpu_cs_ioctl amdgpu_cs_wait_ioctl amdgpu_cs_wait_fences_ioctl amdgpu_gem_va_ioctl amdgpu_info_ioctl v2: only for map and replace cases in amdgpu_gem_va_ioctl Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
cefbc598 |
|
21-Feb-2017 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: add AMDGPU_HW_IP_VCN_ENC to info query Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
ef80d30b |
|
05-Feb-2017 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: Disable uvd and vce free handles for raven Not required on raven. Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
bdc799e5 |
|
25-Jan-2017 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: add AMDGPU_HW_IP_VCN_DEC to info query Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
cfbcacf4 |
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23-Apr-2017 |
Chunming Zhou <David1.Zhou@amd.com> |
drm/amdgpu: add vm ioctl It will be used for reserving vmid for shader debugging that requires a fixed vmid. v2: fix warning (Alex) Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
1bf6ad62 |
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09-May-2017 |
Daniel Vetter <daniel.vetter@ffwll.ch> |
drm/vblank: drop the mode argument from drm_calc_vbltimestamp_from_scanoutpos If we restrict this helper to only kms drivers (which is the case) we can look up the correct mode easily ourselves. But it's a bit tricky: - All legacy drivers look at crtc->hwmode. But that is updated already at the beginning of the modeset helper, which means when we disable a pipe. Hence the final timestamps might be a bit off. But since this is an existing bug I'm not going to change it, but just try to be bug-for-bug compatible with the current code. This only applies to radeon&amdgpu. - i915 tries to get it perfect by updating crtc->hwmode when the pipe is off (i.e. vblank->enabled = false). - All other atomic drivers look at crtc->state->adjusted_mode. Those that look at state->requested_mode simply don't adjust their mode, so it's the same. That has two problems: Accessing crtc->state from interrupt handling code is unsafe, and it's updated before we shut down the pipe. For nonblocking modesets it's even worse. For atomic drivers try to implement what i915 does. To do that we add a new hwmode field to the vblank structure, and update it from drm_calc_timestamping_constants(). For atomic drivers that's called from the right spot by the helper library already, so all fine. But for safety let's enforce that. For legacy driver this function is only called at the end (oh the fun), which is broken, so again let's not bother and just stay bug-for-bug compatible. The benefit is that we can use drm_calc_vbltimestamp_from_scanoutpos directly to implement ->get_vblank_timestamp in every driver, deleting a lot of code. v2: Completely new approach, trying to mimick the i915 solution. v3: Fixup kerneldoc. v4: Drop the WARN_ON to check that the vblank is off, atomic helpers currently unconditionally call this. Recomputing the same stuff should be harmless. v5: Fix typos and move misplaced hunks to the right patches (Neil). v6: Undo hunk movement (kbuild). Cc: Mario Kleiner <mario.kleiner@tuebingen.mpg.de> Cc: Eric Anholt <eric@anholt.net> Cc: Rob Clark <robdclark@gmail.com> Cc: linux-arm-msm@vger.kernel.org Cc: freedreno@lists.freedesktop.org Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170509140329.24114-4-daniel.vetter@ffwll.ch
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#
3fcdcb27 |
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09-May-2017 |
Daniel Vetter <daniel.vetter@ffwll.ch> |
drm/vblank: Switch to bool in_vblank_irq in get_vblank_timestamp It's overkill to have a flag parameter which is essentially used just as a boolean. This takes care of core + adjusting drivers. Adjusting the scanout position callback is a bit harder, since radeon also supplies it's own driver-private flags in there. v2: Fixup misplaced hunks (Neil). v3: kbuild says v1 was better ... Cc: Mario Kleiner <mario.kleiner@tuebingen.mpg.de> Cc: Eric Anholt <eric@anholt.net> Cc: Rob Clark <robdclark@gmail.com> Cc: linux-arm-msm@vger.kernel.org Cc: freedreno@lists.freedesktop.org Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170509140329.24114-2-daniel.vetter@ffwll.ch
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#
d673c02c |
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09-May-2017 |
Daniel Vetter <daniel.vetter@ffwll.ch> |
drm/vblank: Switch drm_driver->get_vblank_timestamp to return a bool There's really no reason for anything more: - Calling this while the crtc vblank stuff isn't set up is a driver bug. Those places alrready DRM_ERROR. - Calling this when the crtc is off is either a driver bug (calling drm_crtc_handle_vblank at the wrong time) or a core bug (for anything else). Again, we DRM_ERROR. - EINVAL is checked at higher levels already, and if we'd use struct drm_crtc * instead of (dev, pipe) it would be real obvious that those are again core bugs. The only valid failure mode is crap hardware that couldn't sample a useful timestamp, to ask the core to just grab a not-so-accurate timestamp. Bool is perfectly fine for that. v2: Also fix up the one caller, I lost that in the shuffling (Jani). v3: Fixup commit message (Neil). Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Mario Kleiner <mario.kleiner@tuebingen.mpg.de> Cc: Eric Anholt <eric@anholt.net> Cc: Rob Clark <robdclark@gmail.com> Cc: linux-arm-msm@vger.kernel.org Cc: freedreno@lists.freedesktop.org Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170509140329.24114-1-daniel.vetter@ffwll.ch
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#
af8baf15 |
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04-May-2017 |
Guenter Roeck <linux@roeck-us.net> |
drm/amdgpu: Use less generic enum definitions alpha:allmodconfig fails to build as follows. drivers/gpu/drm/amd/amdgpu/amdgpu.h:1006:2: error: expected identifier before '(' token drivers/gpu/drm/amd/amdgpu/amdgpu.h:1011:28: error: 'NGG_BUF_MAX' undeclared here The problem is not really the enum definition of NGG_BUF_MAX but PARAM, which happens to be defined differently for alpha and a couple of other architectures. Use less generic defines for NGG enums to solve the problem. Fixes: bce23e00f3369 ("drm/amdgpu: add NGG parameters") Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f47b77b4 |
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02-May-2017 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/gfx: drop max_gs_waves_per_vgt We already have this info: max_gs_threads. Drop the duplicate. Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c81a1a74 |
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28-Apr-2017 |
Michel Dänzer <michel.daenzer@amd.com> |
drm/amdgpu: Make amdgpu_bo_reserve use uninterruptible waits for cleanup Some of these paths probably cannot be interrupted by a signal anyway. Those that can would fail to clean up things if they actually got interrupted. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
408bfe7c |
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26-Apr-2017 |
Junwei Zhang <Jerry.Zhang@amd.com> |
drm/amdgpu: export more gpu info for gfx9 v2: 64-bit aligned for gpu info v3: squash in wave_front_fix Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Qiang Yu <Qiang.Yu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
ec2c467e |
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05-Apr-2017 |
Alex Xie <AlexBin.Xie@amd.com> |
drm/amdgpu: Avoid using signed integer to store pointer value Signed-off-by: Alex Xie <AlexBin.Xie@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
714f88e0 |
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05-Apr-2017 |
Alex Xie <AlexBin.Xie@amd.com> |
drm/amdgpu: Move function amdgpu_has_atpx near other similar functions Signed-off-by: Alex Xie <AlexBin.Xie@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
84c8b22e |
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10-Mar-2017 |
Lukas Wunner <lukas@wunner.de> |
drm/amdgpu: Don't register Thunderbolt eGPU with vga_switcheroo An external Thunderbolt GPU can neither drive the laptop's panel nor be powered off by the platform, so there's no point in registering it with vga_switcheroo. In fact, when the external GPU is runtime suspended, vga_switcheroo will cut power to the internal discrete GPU, resulting in a lockup. Moreover AMD's Windows driver special-cases Thunderbolt as well. Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Lukas Wunner <lukas@wunner.de> Link: http://patchwork.freedesktop.org/patch/msgid/701a8e89ce8ac39734736ab779558b6a4042a19e.1489145162.git.lukas@wunner.de
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#
6a7ed07e |
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03-Mar-2017 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: add psp firmware info into info query and debugfs Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
bce23e00 |
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27-Mar-2017 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: add NGG parameters NGG (Next Generation Graphics) is a new feature in GFX9.0. This adds the relevant parameters. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
63defd3f |
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10-Jan-2017 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: add AMDGPU_HW_IP_UVD_ENC to info query Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
04e30c9c |
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08-Mar-2017 |
Daniel Vetter <daniel.vetter@ffwll.ch> |
drm/amdgpu: Merge pre/postclose hooks Again no apparent explanation for the split except hysterical raisins. Merging them also makes it a bit more obviuos what's going on wrt the runtime pm refdancing. Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: amd-gfx@lists.freedesktop.org Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
df6e2c4a |
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16-Feb-2017 |
Junwei Zhang <Jerry.Zhang@amd.com> |
drm/amdgpu: export gfx config double offchip LDS buffers (v3) v2: move the config struct to drm_amdgpu_info_device v3: move the config feature to amdgpu_gca_config Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5ebbac4b |
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08-Mar-2017 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: expose GPU sensor related information This includes shader/memory clocks, temperature, GPU load, etc. v2: - add sub-queries for AMDPGU_INFO_GPU_SENSOR_* - do not break the ABI v3: - return -ENOENT when amdgpu_dpm == 0 - expose more sensor queries v4: - s/GPU_POWER/GPU_AVG_POWER/ - improve VDDNB/VDDGFX query description - fix amdgpu_dpm check v5: - agd: fix warning v6: - agd: bump version Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
b85891bd |
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15-Jan-2017 |
Junwei Zhang <Jerry.Zhang@amd.com> |
drm/amdgpu: IOCTL interface for PRT support v4 Till GFX8 we can only enable PRT support globally, but with the next hardware generation we can do this on a per page basis. Keep the interface consistent by adding PRT mappings and enable support globally on current hardware when the first mapping is made. v2: disable PRT support delayed and on all error paths v3: PRT and other permissions are mutal exclusive, PRT mappings don't need a BO. v4: update PRT mappings durign CS as well, make va_flags 64bit Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
3149d9da |
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12-Jan-2017 |
Xiangliang Yu <Xiangliang.Yu@amd.com> |
drm/amdgpu: request/release full gpu access if device is vf For gpu vf device, first need to request full gpu access before accessing gpu registers, and release full gpu access after the access is done. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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2493664f |
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09-Jan-2017 |
Monk Liu <Monk.Liu@amd.com> |
drm/amdgpu:invoke CSA functions (v2) Make sure the CSA is mapped. v2: agd: rebase. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
44879b62 |
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12-Dec-2016 |
Arindam Nath <arindam.nath@amd.com> |
drm/amd/amdgpu: get maximum and used UVD handles (v4) Change History -------------- v4: Changes suggested by Emil, Christian - return -ENODATA for asics with unlimited sessions v3: changes suggested by Christian - Add a check for UVD IP block using AMDGPU_HW_IP_UVD query type. - Add a check for asic_type to be less than CHIP_POLARIS10 since starting Polaris, we support unlimited UVD instances. - Add kerneldoc style comment for amdgpu_uvd_used_handles(). v2: as suggested by Christian - Add a new query AMDGPU_INFO_NUM_HANDLES - Create a helper function to return the number of currently used UVD handles. - Modify the logic to count the number of used UVD handles since handles can be freed in non-linear fashion. v1: - User might want to query the maximum number of UVD instances supported by firmware. In addition to that, if there are multiple applications using UVD handles at the same time, he might also want to query the currently used number of handles. For this we add two variables max_handles and used_handles inside drm_amdgpu_info_hw_ip. So now an application (or libdrm) can use AMDGPU_INFO IOCTL with AMDGPU_INFO_HW_IP_INFO query type to get these values. Signed-off-by: Arindam Nath <arindam.nath@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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11b3c20b |
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06-Jan-2017 |
Gabriel Krisman Bertazi <krisman@collabora.co.uk> |
drm: Change the return type of the unload hook to void The integer returned by the unload hook is ignored by the drm core, so let's make it void. This patch was created using the following Coccinelle semantic script (except for the declaration and comment in drm_drv.h): Compile-tested only. // <smpl> @ get_name @ struct drm_driver drv; identifier fn; @@ drv.unload = fn; @ replace_type @ identifier get_name.fn; @@ - int + void fn (...) { ... } @ remove_return_param @ identifier get_name.fn; @@ void fn (...) { <... if (...) return - ... ; ...> } @ drop_final_return @ identifier get_name.fn; @@ void fn (...) { ... - return 0; } // </smpl> Suggested-by: Daniel Vetter <daniel.vetter@intel.com> Signed-off-by: Gabriel Krisman Bertazi <krisman@collabora.co.uk> Acked-by: Christian König <christian.koenig@amd.com>. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20170106175731.29196-1-krisman@collabora.co.uk
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#
40ee5888 |
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06-Dec-2016 |
Evan Quan <evan.quan@amd.com> |
drm/amd/amdgpu: export vbios information (v2) Allows userspace components to fetch information from the vbios image. v2: agd: fix warning Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian Koenig <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
eef18a82 |
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04-Nov-2016 |
Junwei Zhang <Jerry.Zhang@amd.com> |
drm/amdgpu: add the interface of waiting multiple fences (v4) v2: agd: rebase and squash in all the previous optimizations and changes so everything compiles. v3: squash in Slava's 32bit build fix v4: rebase on drm-next (fence -> dma_fence), squash in Monk's ioctl update patch Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Sumit Semwal <sumit.semwal@linaro.org> [sumits: fix checkpatch warnings] Link: http://patchwork.freedesktop.org/patch/msgid/1478290570-30982-2-git-send-email-alexander.deucher@amd.com
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#
84b1528e |
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31-Oct-2016 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: disable runtime pm in certain cases If the platform does not support hybrid graphics or ATPX dGPU power control. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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#
aafcafa0 |
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23-Oct-2016 |
Monk Liu <Monk.Liu@amd.com> |
drm/amdgpu:new ids flag for preempt Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
a1255107 |
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13-Oct-2016 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: rework IP block registration (v2) This makes it easier to replace specific IP blocks on asics for handling virtual_dce, DAL, etc. and for building IP lists for hw or tables. This also stored the status information in the same structure. v2: split out spelling fix into a separate patch add a function to add IPs to the list Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
07fecde5 |
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06-Oct-2016 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: fill in vce clock info ioctl query (v2) Returns the vce clock table for the user mode driver. The user mode driver can fill this data into vce clock data packet for optimal VCE DPM. v2: update to the new API Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
e0adf6c8 |
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28-Sep-2016 |
Junwei Zhang <Jerry.Zhang@amd.com> |
drm/amd/amdgpu: unify memory query info interface Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
cfa32556 |
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20-Sep-2016 |
Junwei Zhang <Jerry.Zhang@amd.com> |
drm/amd/amdgpu: add info about vram and gtt max allocation size Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
9f6163e7 |
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20-Sep-2016 |
Junwei Zhang <Jerry.Zhang@amd.com> |
drm/amd/amdgpu: add info about vram and gtt total size Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
1304f0c7 |
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16-Oct-2016 |
Evan Quan <evan.quan@amd.com> |
drm/amd/amdgpu: expose max engine and memory clock for powerplay enabled case Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d6bda7b4 |
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26-Aug-2016 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: handle runtime pm in drm pre/post close Close was not handled correctly. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
dc08267a |
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26-Aug-2016 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: handle runtime pm correctly in amdgpu_driver_open_kms Need to fix the error paths. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
75c65480 |
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24-Aug-2016 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: track the number of vce rings Rather than using a hardcoded value. This allows different versions to expose more or less rings. No functional change. Reviewed-by: JimQu <Jim.Qu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
a22f803c |
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23-Aug-2016 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: fix VCE ib alignment value The VCE rings only require single dword alignment. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c4795ca6 |
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22-Aug-2016 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: fix IB alignment for UVD According to the hw team, it should be 16, not 8. Cc: Peter Fang <peter.fang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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#
83a59b63 |
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17-Aug-2016 |
Marek Olšák <marek.olsak@amd.com> |
drm/amdgpu: add AMDGPU_INFO_NUM_EVICTIONS For profiling. v2: really bump the minor version Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
cd437e37 |
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22-Jul-2016 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: free handles after fini the context This will make sure all the submissions from different contexts gets finished, and then we close the session and free up the handles. This will fix the issue that session clean-up is not get done properly, when with the command `kill -9' Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
b95e31fd |
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07-Jul-2016 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: move get_gpu_clock_counter into the gfx struct It's gfx IP specific, not asic specific, so move to a gfx callback. Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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50ab2533 |
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12-Jun-2016 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: introduce a firmware debugfs to dump all current firmware versions This patch implements the debugfs to dump all currect firmware version: root@jenkins-All-Series:/home/jenkins# cat /sys/kernel/debug/dri/0/amdgpu_firmware_info VCE feature version: 0, firmware version: 0x34040300 UVD feature version: 0, firmware version: 0x01451000 MC feature version: 0, firmware version: 0x00000000 ME feature version: 37, firmware version: 0x00000093 PFP feature version: 37, firmware version: 0x000000da CE feature version: 37, firmware version: 0x00000080 RLC feature version: 1, firmware version: 0x0000010e MEC feature version: 37, firmware version: 0x0000029e MEC2 feature version: 37, firmware version: 0x0000029e SMC feature version: 0, firmware version: 0x013353e6 SDMA0 feature version: 31, firmware version: 0x00000036 SDMA1 feature version: 0, firmware version: 0x00000036 Suggested-by: Alex Deucher <Alexander.Deucher@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
000cab9a |
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12-Jun-2016 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: factor out the AMDGPU_INFO_FW_VERSION case branch into amdgpu_firmware_info The new amdgpu_firmware_info function will be used on amdgpu firmware version debugfs. Suggested-by: Christian König <christian.koenig@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6ce62d8b |
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08-Jun-2016 |
Lukas Wunner <lukas@wunner.de> |
drm/amdgpu: Forbid runtime pm on driver unload The PCI core calls pm_runtime_forbid() on device probe in pci_pm_init(), making this the default state when amdgpu is loaded. amdgpu_driver_load_kms() therefore calls pm_runtime_allow(), but there's no pm_runtime_forbid() in amdgpu_driver_unload_kms() to balance it. Add it so that we leave the device in the same state that we found it. This isn't a bug, it's just good housekeeping. When amdgpu is first loaded with runpm=1, then unloaded and loaded again with runpm=0, pm_runtime_forbid() will be called from amdgpu_pmops_runtime_idle() or amdgpu_pmops_runtime_suspend(), so the behaviour is correct. If there ever is a third party driver for AMD cards, this commit avoids that it has to clean up behind amdgpu. Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Lukas Wunner <lukas@wunner.de> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/ccd4f7208acbd7761364418fc34f7849acbb4597.1465392124.git.lukas@wunner.de
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#
c9c9bbd7 |
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08-Jun-2016 |
Lukas Wunner <lukas@wunner.de> |
drm/amdgpu: Don't leak runtime pm ref on driver load If an error occurs in amdgpu_device_init() after adev->rmmio has been set, its caller amdgpu_driver_load_kms() will skip runtime pm initialization and call amdgpu_driver_unload_kms(), which acquires a runtime pm ref that is leaked. Balance by releasing a runtime pm ref in the error path of amdgpu_driver_load_kms(). Fixes: d38ceaf99ed0 ("drm/amdgpu: add core driver (v4)") Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Lukas Wunner <lukas@wunner.de> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/9a53449865759d7499a439ca2776093ee117b1eb.1465392124.git.lukas@wunner.de
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#
4a788547 |
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08-Jun-2016 |
Lukas Wunner <lukas@wunner.de> |
drm/amdgpu: Don't leak runtime pm ref on driver unload amdgpu_driver_load_kms() calls pm_runtime_put_autosuspend() if amdgpu_device_is_px(dev), but amdgpu_driver_unload_kms() calls pm_runtime_get_sync() unconditionally. We therefore leak a runtime pm ref whenever amdgpu is unloaded on a non-PX machine or if runpm=0. The GPU will subsequently never runtime suspend after loading amdgpu again. Fix by taking the runtime pm ref under the same condition that it was released on driver load. Fixes: d38ceaf99ed0 ("drm/amdgpu: add core driver (v4)") Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Lukas Wunner <lukas@wunner.de> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/86364eeb5711323608930c4f0f69046792ff6d3c.1465392124.git.lukas@wunner.de
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#
0b10029d |
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17-Jun-2016 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: fix num_rbs exposed to userspace (v2) This was accidently broken for harvest cards when the code was refactored for Polaris support. v2: multiply by shader engines. Noticed by Nicolai. Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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#
7dae69a2 |
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03-May-2016 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: fetch cu_info once at init Fetch this info once at init and just store the results for future requests. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f498d9ed |
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10-Apr-2016 |
Nils Wallménius <nils.wallmenius@gmail.com> |
drm/amd: Mark some tables as const This patch marks some compile-time constant tables 'const'. The tables marked in this patch are the low hanging fruit where little other changes were necesary to avoid casting away constness etc. Also mark some tables that are private to a file as static. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
562e2689 |
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18-Apr-2016 |
Sonny Jiang <sonny.jiang@amd.com> |
amdgpu/uvd: add uvd fw version for amdgpu Was previously always hardcoded to 0. Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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#
e131b914 |
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04-Apr-2016 |
Chunming Zhou <David1.Zhou@amd.com> |
drm/amdgpu: add invisible pin size statistic Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
7c0ecda1 |
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01-Apr-2016 |
Chunming Zhou <David1.Zhou@amd.com> |
drm/amdgpu: total vram size also reduces pin size Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
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#
8f8e00c1 |
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11-Feb-2016 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/gfx: clean up harvest configuration (v2) Read back harvest configuration from registers and simplify calculations. No need to program the raster config registers. These are programmed as golden registers and the user mode drivers program them as well. v2: rebase on Tom's patches Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
9ddf940f |
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25-Nov-2015 |
Harry Wentland <harry.wentland@amd.com> |
drm/amdgpu: Don't crash system if we can't get crtc Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
8e36f9d3 |
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02-Dec-2015 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: Fixup hw vblank counter/ts for new drm_update_vblank_count() (v3) commit 4dfd6486 "drm: Use vblank timestamps to guesstimate how many vblanks were missed" introduced in Linux 4.4-rc1 makes the drm core more fragile to drivers which don't update hw vblank counters and vblank timestamps in sync with firing of the vblank irq and essentially at leading edge of vblank. This exposed a problem with radeon-kms/amdgpu-kms which do not satisfy above requirements: The vblank irq fires a few scanlines before start of vblank, but programmed pageflips complete at start of vblank and vblank timestamps update at start of vblank, whereas the hw vblank counter increments only later, at start of vsync. This leads to problems like off by one errors for vblank counter updates, vblank counters apparently going backwards or vblank timestamps apparently having time going backwards. The net result is stuttering of graphics in games, or little hangs, as well as total failure of timing sensitive applications. See bug #93147 for an example of the regression on Linux 4.4-rc: https://bugs.freedesktop.org/show_bug.cgi?id=93147 This patch tries to align all above events better from the viewpoint of the drm core / of external callers to fix the problem: 1. The apparent start of vblank is shifted a few scanlines earlier, so the vblank irq now always happens after start of this extended vblank interval and thereby drm_update_vblank_count() always samples the updated vblank count and timestamp of the new vblank interval. To achieve this, the reporting of scanout positions by radeon_get_crtc_scanoutpos() now operates as if the vblank starts radeon_crtc->lb_vblank_lead_lines before the real start of the hw vblank interval. This means that the vblank timestamps which are based on these scanout positions will now update at this earlier start of vblank. 2. The driver->get_vblank_counter() function will bump the returned vblank count as read from the hw by +1 if the query happens after the shifted earlier start of the vblank, but before the real hw increment at start of vsync, so the counter appears to increment at start of vblank in sync with the timestamp update. 3. Calls from vblank irq-context and regular non-irq calls are now treated identical, always simulating the shifted vblank start, to avoid inconsistent results for queries happening from vblank irq vs. happening from drm_vblank_enable() or vblank_disable_fn(). 4. The radeon_flip_work_func will delay mmio programming a pageflip until the start of the real vblank iff it happens to execute inside the shifted earlier start of the vblank, so pageflips now also appear to execute at start of the shifted vblank, in sync with vblank counter and timestamp updates. This to avoid some races between updates of vblank count and timestamps that are used for swap scheduling and pageflip execution which could cause pageflips to execute before the scheduled target vblank. The lb_vblank_lead_lines "fudge" value is calculated as the size of the display controllers line buffer in scanlines for the given video mode: Vblank irq's are triggered by the line buffer logic when the line buffer refill for a video frame ends, ie. when the line buffer source read position enters the hw vblank. This means that a vblank irq could fire at most as many scanlines before the current reported scanout position of the crtc timing generator as the number of scanlines the line buffer can maximally hold for a given video mode. This patch has been successfully tested on a RV730 card with DCE-3 display engine and on a evergreen card with DCE-4 display engine, in single-display and dual-display configuration, with different video modes. A similar patch is needed for amdgpu-kms to fix the same problem. Limitations: - Maybe replace the udelay() in the flip_work_func() by a suitable usleep_range() for a bit better efficiency? Will try that. - Line buffer sizes in pixels are hard-coded on < DCE-4 to a value i just guessed to be high enough to work ok, lacking info on the true sizes atm. Probably fixes: fdo#93147 Port of Mario's radeon fix to amdgpu. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (v1) Reviewed-by: Mario Kleiner <mario.kleiner.de@gmail.com> (v2) Refine amdgpu_flip_work_func() for better efficiency. In amdgpu_flip_work_func, replace the busy waiting udelay(5) with event lock held by a more performance and energy efficient usleep_range() until at least predicted true start of hw vblank, with some slack for scheduler happiness. Release the event lock during waits to not delay other outputs in doing their stuff, as the waiting can last up to 200 usecs in some cases. Also small fix to code comment and formatting in that function. (v2) Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> (v3) Fix crash in crtc disabled case
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#
f8c47144 |
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08-Sep-2015 |
Daniel Vetter <daniel.vetter@ffwll.ch> |
drm/<drivers>: Drop DRM_UNLOCKED from modeset drivers Just one special case (since i915 lost its ums code, yay): - radeon: Has slots for the old ums ioctls which don't have DRM_UNLOCKED, but all filled with drm_invalid_op. So ok to drop it everywhere. Every other kms driver just has DRM_UNLOCKED for all their ioctls, as they should. v2: admgpu happened, include that one too. And i915 lost its UMS support which means we can change all the i915 ioctls too. v3: Rebased on top of new vmwgfx DX interface extensions. v4: Rebase on top of render-node support in exynos. Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Reviewed-by: David Herrmann <dh.herrmann@gmail.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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#
c113ea1c |
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08-Oct-2015 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: rework sdma structures Rework the sdma structures in the driver to consolidate all of the sdma info into a single structure and allow for asics that may have different numbers of sdma instances. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
88e72717 |
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24-Sep-2015 |
Thierry Reding <treding@nvidia.com> |
drm/irq: Use unsigned int pipe in public API This continues the pattern started in commit cc1ef118fc09 ("drm/irq: Make pipe unsigned and name consistent"). This is applied to the public APIs and driver callbacks, so pretty much all drivers need to be updated to match the new prototypes. Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Inki Dae <inki.dae@samsung.com> Cc: Jianwei Wang <jianwei.wang.chn@gmail.com> Cc: Alison Wang <alison.wang@freescale.com> Cc: Patrik Jakobsson <patrik.r.jakobsson@gmail.com> Cc: Daniel Vetter <daniel.vetter@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: David Airlie <airlied@linux.ie> Cc: Rob Clark <robdclark@gmail.com> Cc: Ben Skeggs <bskeggs@redhat.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Mark Yao <mark.yao@rock-chips.com> Cc: Benjamin Gaignard <benjamin.gaignard@linaro.org> Cc: Vincent Abriou <vincent.abriou@st.com> Cc: Thomas Hellstrom <thellstrom@vmware.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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8b7530b1 |
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02-Oct-2015 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: restore the fbdev mode in lastclose restore the fbdev state if a drm app like X is killed. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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1694467b |
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05-Sep-2015 |
Lukas Wunner <lukas@wunner.de> |
drm/amdgpu: Spell vga_switcheroo consistently Currently everyone and their dog has their own favourite spelling for vga_switcheroo. This makes it hard to grep dmesg for log entries relating to vga_switcheroo. It also makes it hard to find related source files in the tree. vga_switcheroo.c uses pr_fmt "vga_switcheroo". Use that everywhere. Signed-off-by: Lukas Wunner <lukas@wunner.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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eba1f35d |
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14-Sep-2015 |
Ville Syrjälä <ville.syrjala@linux.intel.com> |
drm: Move timestamping constants into drm_vblank_crtc Collect the timestamping constants alongside the rest of the relevant stuff under drm_vblank_crtc. We can now get rid of the 'refcrtc' parameter to drm_calc_vbltimestamp_from_scanoutpos(). Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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#
0d2edd37 |
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23-Sep-2015 |
Dan Carpenter <dan.carpenter@oracle.com> |
drm/amdgpu: integer overflow in amdgpu_info_ioctl() The "alloc_size" calculation can overflow leading to memory corruption. Reviewed-by: Christian König <christian.koenig@amd.com> Reported-by: Ilja Van Sprundel <ivansprundel@ioactive.com> Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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02537d63 |
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25-Aug-2015 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: fix postclose order The context needs to finish before everything else. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
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c548b345 |
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07-Aug-2015 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: remove VI hw bug workaround v3 The workaround simply doesn't work because VM mappings are controlled by userspace not the kernel. Additional to that this is just a performance problem which happens if you have holes in your VM mapping. v2: adjust virtual addr alignment as well. v3: fix trivial warning Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> (v1) Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> (v2)
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efd4ccb5 |
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04-Aug-2015 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: cleanup ctx_mgr init/fini Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
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2f7d10b3 |
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21-Jul-2015 |
Jammy Zhou <Jammy.Zhou@amd.com> |
drm/amdgpu: merge amdgpu_family.h into amd_shared.h (v2) Make the definitions common for all driver components v2: fix kfd Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
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cfa2104f |
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03-Aug-2015 |
Jammy Zhou <Jammy.Zhou@amd.com> |
drm/amdgpu: add feature version for SDMA ucode Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
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351643d7 |
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03-Aug-2015 |
Jammy Zhou <Jammy.Zhou@amd.com> |
drm/amdgpu: add feature version for RLC and MEC v2 Expose feature version to user space for RLC/MEC/MEC2 ucode as well v2: fix coding style Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
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c193fa91 |
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28-Jul-2015 |
Dan Carpenter <dan.carpenter@oracle.com> |
drm/amdgpu: information leak in amdgpu_info_ioctl() We recently changed the drm_amdgpu_info_device struct so now there is a 4 byte hole at the end. We need to initialize it so we don't disclose secret information from the stack. Fixes: fa92754e9c47 ('drm/amdgpu: add VCE harvesting instance query') Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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8faf0e08 |
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28-Jul-2015 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: clean up init sequence for failures If we fail during device init, record what state each block is in so that we can tear down clearly. Fixes various problems on device init failure. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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fa92754e |
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12-Jul-2015 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: add VCE harvesting instance query Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
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130e0371 |
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12-Jun-2015 |
Oded Gabbay <oded.gabbay@gmail.com> |
drm/amdgpu: Add H/W agnostic amdgpu <--> amdkfd interface This patch adds an interface file between amdgpu and amdkfd. This interface file is H/W agnostic, thus containing functions that operate the same for any AMD APU/GPU H/W generation. The functions in this interface mirror (some) of the functions in radeon_kfd.c (the radeon<-->amdkfd interface file). The main functions are: - amdgpu_amdkfd_init - initialize the amdkfd module - amdgpu_amdkfd_load_interface - load the H/W interface according to the currently probed device - amdgpu_amdkfd_device_probe - probe the device in amdkfd - amdgpu_amdkfd_device_init - initialize the device in amdkfd - amdgpu_amdkfd_interrupt - call the ISR of amdkfd - amdgpu_amdkfd_suspend - suspend callback from amdgpu - amdgpu_amdkfd_resume - resume callback from amdgpu This patch also modifies the relevant amdgpu files, to use this new interface. Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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81c59f54 |
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03-Jun-2015 |
Ken Wang <Qingqing.Wang@amd.com> |
drm/amdgpu: add vram_type and vram_bit_width for interface query (v2) Track the type of vram on the board and provide a query for it. User mode drivers and tools want this information for determining bandwidth information and form informational purposes. v2: fix build when CI support is not enabled Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
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71062f43 |
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04-Jun-2015 |
Ken Wang <Qingqing.Wang@amd.com> |
drm/amdgpu: add ib_size/start_alignment interface query Query the IB alignment requirements from the kernel rather than hardcoding them in the user mode drivers. Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
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#
02558a00 |
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03-Jun-2015 |
Ken Wang <Qingqing.Wang@amd.com> |
drm/amdgpu: add me/ce/pfp_feature_version interface query Provide this information to usermode drivers. We were previously missing this info. Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
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#
a101a899 |
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03-Jun-2015 |
Ken Wang <Qingqing.Wang@amd.com> |
drm/amdgpu add ce_ram_size for interface query Add a query for the CE ram size. User mode drivers will want to use this to determine how much size of the cache on the CE. Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewd-by: Jammy Zhou <Jammy.Zhou@amd.com>
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#
32bf7106 |
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03-Jun-2015 |
Ken Wang <Qingqing.Wang@amd.com> |
drm/amdgpu add max_memory_clock for interface query (v2) Add a query for the max memory clock. v2: handle the dpm enabled case properly Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewd-by: Jammy Zhou <Jammy.Zhou@amd.com>
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#
5fc3aeeb |
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22-May-2015 |
yanyang1 <young.yang@amd.com> |
drm/amdgpu: rename amdgpu_ip_funcs to amd_ip_funcs (v2) The structure is renamed and moved to amd_shared.h to make the component independent. This makes it easier to add new components in the future. v2: fix include path Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: yanyang1 <young.yang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
02b70c8c |
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12-May-2015 |
Jammy Zhou <Jammy.Zhou@amd.com> |
drm/amdgpu: expose the max virtual address Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
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0147ee0f |
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05-May-2015 |
Marek Olšák <marek.olsak@amd.com> |
drm/amdgpu: make the CTX ioctl thread-safe The existing locks were protecting the list, but not the elements. v2: rename hlock to lock Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
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#
c92b90cc |
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30-Apr-2015 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: memset gds_info struct in info ioctl Avoids possibility that info may leak via the uninitialized _pad element. Noticed-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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d38ceaf9 |
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20-Apr-2015 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: add core driver (v4) This adds the non-asic specific core driver code. v2: remove extra kconfig option v3: implement minor fixes from Fengguang Wu v4: fix cast in amdgpu_ucode.c Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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