Searched refs:pipe (Results 326 - 350 of 965) sorted by relevance

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/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
H A Ddcn316_clk_mgr.c109 struct pipe_ctx *pipe = safe_to_lower local
113 if (pipe->top_pipe || pipe->prev_odm_pipe)
115 if (pipe->stream && (pipe->stream->dpms_off || dc_is_virtual_signal(pipe->stream->signal) ||
116 !pipe->stream->link_enc)) {
118 if (pipe->stream_res.tg && pipe->stream_res.tg->funcs->immediate_disable_crtc)
119 pipe
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/linux-master/drivers/usb/core/
H A Durb.c196 * usb_pipe_type_check - sanity check of a specific pipe for a usb device
198 * @pipe: pipe to check
201 * given usb device. It returns 0 if the pipe is valid for the specific usb
204 int usb_pipe_type_check(struct usb_device *dev, unsigned int pipe) argument
208 ep = usb_pipe_endpoint(dev, pipe);
211 if (usb_pipetype(pipe) != pipetypes[usb_endpoint_type(&ep->desc)])
227 return usb_pipe_type_check(urb->dev, urb->pipe);
387 /* For now, get the endpoint from the pipe. Eventually drivers
389 * urb->pipe
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/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_gfx.h289 void (*select_me_pipe_q)(struct amdgpu_device *adev, u32 me, u32 pipe,
417 /* pipe reservation */
457 #define amdgpu_gfx_select_me_pipe_q(adev, me, pipe, q, vmid, xcc_id) ((adev)->gfx.funcs->select_me_pipe_q((adev), (me), (pipe), (q), (vmid), (xcc_id)))
497 int pipe, int queue);
499 int *mec, int *pipe, int *queue);
501 int mec, int pipe, int queue);
507 int pipe, int queue);
509 int *me, int *pipe, int *queue);
511 int pipe, in
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H A Damdgpu_jpeg.c161 WREG32(adev->jpeg.inst[ring->me].external.jpeg_pitch[ring->pipe], 0xCAFEDEAD);
163 RREG32(adev->jpeg.inst[ring->me].external.jpeg_pitch[ring->pipe]);
165 amdgpu_ring_write(ring, PACKET0(adev->jpeg.internal.jpeg_pitch[ring->pipe], 0));
170 tmp = RREG32(adev->jpeg.inst[ring->me].external.jpeg_pitch[ring->pipe]);
199 ib->ptr[0] = PACKETJ(adev->jpeg.internal.jpeg_pitch[ring->pipe], 0, 0, PACKETJ_TYPE0);
246 tmp = RREG32(adev->jpeg.inst[ring->me].external.jpeg_pitch[ring->pipe]);
/linux-master/drivers/gpu/drm/i915/display/
H A Dintel_connector.c157 enum pipe pipe = 0; local
160 return encoder->get_hw_state(encoder, &pipe);
163 enum pipe intel_connector_get_pipe(struct intel_connector *connector)
173 return to_intel_crtc(connector->base.state->crtc)->pipe;
H A Dintel_lpe_audio.c123 pdata->port[0].pipe = -1;
124 pdata->port[1].pipe = -1;
125 pdata->port[2].pipe = -1;
347 ppdata->pipe = cpu_transcoder;
356 ppdata->pipe = -1;
H A Dg4x_dp.c138 intel_dp->DP |= DP_PIPE_SEL_IVB(crtc->pipe);
142 intel_de_rmw(dev_priv, TRANS_DP_CTL(crtc->pipe),
160 intel_dp->DP |= DP_PIPE_SEL_CHV(crtc->pipe);
162 intel_dp->DP |= DP_PIPE_SEL(crtc->pipe);
216 * while a pipe is enabled going to FDI:
217 * 1. Wait for the start of vertical blank on the enabled pipe going to FDI
221 intel_wait_for_vblank_if_active(dev_priv, !crtc->pipe);
250 enum port port, enum pipe *pipe)
252 enum pipe
249 cpt_dp_port_selected(struct drm_i915_private *dev_priv, enum port port, enum pipe *pipe) argument
272 g4x_dp_port_enabled(struct drm_i915_private *dev_priv, i915_reg_t dp_reg, enum port port, enum pipe *pipe) argument
296 intel_dp_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe) argument
1254 enum pipe pipe; local
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H A Dintel_display_device.c31 * There's actually no pipe EDP. Some pipe registers have
32 * simply shifted from the pipe to the transcoder, while
961 enum pipe pipe; local
976 for_each_pipe(i915, pipe)
977 display_runtime->num_scalers[pipe] = 0;
979 for_each_pipe(i915, pipe)
980 display_runtime->num_scalers[pipe] = 2;
988 for_each_pipe(i915, pipe)
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H A Dg4x_hdmi.c55 hdmi_val |= SDVO_PIPE_SEL_CPT(crtc->pipe);
57 hdmi_val |= SDVO_PIPE_SEL_CHV(crtc->pipe);
59 hdmi_val |= SDVO_PIPE_SEL(crtc->pipe);
66 enum pipe *pipe)
78 ret = intel_sdvo_port_enabled(dev_priv, intel_hdmi->hdmi_reg, pipe);
334 enum pipe pipe = crtc->pipe; local
352 intel_de_rmw(dev_priv, TRANS_CHICKEN1(pipe),
65 intel_hdmi_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe) argument
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H A Dintel_dp_aux_backlight.c166 intel_dp_aux_hdr_get_backlight(struct intel_connector *connector, enum pipe pipe) argument
182 u32 pwm_level = panel->backlight.pwm_funcs->get(connector, pipe);
291 intel_dp_aux_hdr_setup_backlight(struct intel_connector *connector, enum pipe pipe) argument
304 ret = panel->backlight.pwm_funcs->setup(connector, pipe);
326 panel->backlight.level = intel_dp_aux_hdr_get_backlight(connector, pipe);
333 static u32 intel_dp_aux_vesa_get_backlight(struct intel_connector *connector, enum pipe unused)
391 static int intel_dp_aux_vesa_setup_backlight(struct intel_connector *connector, enum pipe pipe) argument
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H A Dintel_dp_tunnel.c142 crtc->pipe,
340 pipe_mask |= BIT(crtc->pipe);
364 return state->inherited_dp_tunnels->ref[crtc->pipe].tunnel;
388 drm_dp_tunnel_ref_get(tunnel, &state->inherited_dp_tunnels->ref[crtc->pipe]);
444 enum pipe pipe; local
449 for_each_pipe(to_i915(state->base.dev), pipe)
450 if (state->inherited_dp_tunnels->ref[pipe].tunnel)
451 drm_dp_tunnel_ref_put(&state->inherited_dp_tunnels->ref[pipe]);
601 crtc->pipe,
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/linux-master/drivers/gpu/drm/
H A Ddrm_mipi_dbi.c295 * @pipe: Simple display pipe
302 enum drm_mode_status mipi_dbi_pipe_mode_valid(struct drm_simple_display_pipe *pipe, argument
305 struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);
307 return drm_crtc_helper_mode_valid_fixed(&pipe->crtc, mode, &dbidev->mode);
312 * mipi_dbi_pipe_update - Display pipe update helper
313 * @pipe: Simple display pipe
319 void mipi_dbi_pipe_update(struct drm_simple_display_pipe *pipe, argument
322 struct drm_plane_state *state = pipe
412 mipi_dbi_pipe_disable(struct drm_simple_display_pipe *pipe) argument
443 mipi_dbi_pipe_begin_fb_access(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state) argument
459 mipi_dbi_pipe_end_fb_access(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state) argument
473 mipi_dbi_pipe_reset_plane(struct drm_simple_display_pipe *pipe) argument
491 mipi_dbi_pipe_duplicate_plane_state(struct drm_simple_display_pipe *pipe) argument
507 mipi_dbi_pipe_destroy_plane_state(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state) argument
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/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn21/
H A Ddcn21_resource.c822 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; local
823 struct pipe_ctx *mpo_pipe = pipe->bottom_pipe;
826 if (!pipe->stream)
831 && pipe->plane_state && mpo_pipe
833 &pipe->stream->src,
835 ASSERT(mpo_pipe->plane_state != pipe->plane_state);
846 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; local
847 struct pipe_ctx *hsplit_pipe = pipe->bottom_pipe;
849 if (!pipe->stream || pipe_split_from[i] >= 0)
854 if (!pipe
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/linux-master/drivers/gpu/drm/amd/display/dc/
H A Ddc_dmub_srv.c396 struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i]; local
398 if (pipe->stream == stream && pipe->stream_res.tg)
444 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; local
446 if (!pipe->stream)
453 if (!pipe->stream->fpo_in_use) {
462 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; local
464 if (resource_is_pipe_type(pipe, OTG_MASTER) && pipe->stream->fpo_in_use) {
465 struct pipe_ctx *pipe local
632 struct pipe_ctx *pipe = NULL; local
850 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; local
863 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; local
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/linux-master/drivers/gpu/drm/gma500/
H A Dgma_display.c28 * Returns whether any output on the specified pipe is of the specified type
66 int pipe = gma_crtc->pipe; local
67 const struct psb_offset *map = &dev_priv->regmap[pipe];
149 const struct psb_offset *map = &dev_priv->regmap[gma_crtc->pipe];
172 /* FIXME: Why pipe[0] and not pipe[..._crtc->pipe]? */
173 dev_priv->regs.pipe[0].palette[i] =
192 * Sets the power management mode of the pipe an
202 int pipe = gma_crtc->pipe; local
336 int pipe = gma_crtc->pipe; local
448 int pipe = gma_crtc->pipe; local
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H A Dpsb_intel_reg.h156 * - pipe enabled
431 * This register controls the LVDS output enable, pipe selection, and data
439 * the DPLL semantics change when the LVDS is assigned to that pipe.
442 /* Selects pipe B for LVDS data. Must be set on pre-965. */
1241 #define _PIPE(pipe, a, b) ((a) + (pipe)*((b)-(a)))
1282 #define SB_M(pipe) _PIPE(pipe, _SB_M_A, _SB_M_B)
1288 #define SB_N_VCO(pipe) _PIPE(pipe, _SB_N_VCO_
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/linux-master/drivers/staging/media/omap4iss/
H A Diss.h122 int omap4iss_get_external_info(struct iss_pipeline *pipe,
131 int omap4iss_pipeline_set_stream(struct iss_pipeline *pipe,
133 void omap4iss_pipeline_cancel_stream(struct iss_pipeline *pipe);
/linux-master/include/media/
H A Dv4l2-dev.h228 * @pipe: &struct media_pipeline
267 struct media_pipeline pipe; member in struct:video_device
547 * @pipe: Media pipeline to be assigned to all entities in the pipeline.
551 * assigned to every pad in the pipeline and stored in the media_pad pipe
564 struct media_pipeline *pipe);
569 * @pipe: Media pipeline to be assigned to all entities in the pipeline.
578 struct media_pipeline *pipe);
585 * either directly or indirectly, as not streaming. The media_pad pipe field
/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn201/
H A Ddcn201_hwseq.c525 struct pipe_ctx *pipe,
530 * therefore only top pipe need to lock
532 if (pipe->top_pipe)
538 if (pipe->plane_state != NULL && pipe->plane_state->triplebuffer_flips) {
540 pipe->stream_res.tg->funcs->triplebuffer_lock(pipe->stream_res.tg);
542 pipe->stream_res.tg->funcs->triplebuffer_unlock(pipe->stream_res.tg);
545 pipe
523 dcn201_pipe_control_lock( struct dc *dc, struct pipe_ctx *pipe, bool lock) argument
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/linux-master/drivers/media/usb/gspca/
H A Dstv0680.c40 unsigned int pipe = 0; local
45 pipe = usb_rcvctrlpipe(gspca_dev->dev, 0);
49 pipe = usb_sndctrlpipe(gspca_dev->dev, 0);
53 pipe = usb_rcvctrlpipe(gspca_dev->dev, 0);
57 pipe = usb_sndctrlpipe(gspca_dev->dev, 0);
61 ret = usb_control_msg(gspca_dev->dev, pipe,
/linux-master/drivers/media/platform/ti/omap3isp/
H A Dispcsiphy.c165 struct isp_pipeline *pipe = to_isp_pipeline(phy->entity); local
173 buscfg = v4l2_subdev_to_bus_cfg(pipe->external);
216 csi2_ddrclk_khz = pipe->external_rate / 1000
217 / (2 * hweight32(used_lanes)) * pipe->external_width;
312 struct isp_pipeline *pipe = to_isp_pipeline(phy->entity); local
315 buscfg = v4l2_subdev_to_bus_cfg(pipe->external);
/linux-master/drivers/net/wireless/ath/ath6kl/
H A Dhtc-ops.h107 struct sk_buff *skb, u8 pipe)
109 ar->htc_ops->rx_complete(ar, skb, pipe);
106 ath6kl_htc_rx_complete(struct ath6kl *ar, struct sk_buff *skb, u8 pipe) argument
/linux-master/sound/pci/mixart/
H A Dmixart.h121 struct mixart_pipe *pipe; member in struct:mixart_stream
142 struct mixart_uid group_uid; /* id of the pipe, as returned by embedded */
148 int monitoring; /* pipe used for monitoring issue */
161 /* allocate stereo pipe for instance */
205 int snd_mixart_kill_ref_pipe(struct mixart_mgr *mgr, struct mixart_pipe *pipe, int monitoring);
/linux-master/drivers/staging/media/atomisp/pci/
H A Dsh_css_params.h72 * will be overwritten by the per pipe configuration */
74 /* ------ pipe specific DPC configuration ------ */
76 * should be replaced by CSS per pipe configuration when the support
127 /* ------ pipe specific DPC configuration ------ */
129 * should be replaced by CSS per pipe configuration when the support
167 sh_css_pipe_isp_config_get(struct ia_css_pipe *pipe);
179 sh_css_pipe_get_pp_gdc_lut(const struct ia_css_pipe *pipe);
/linux-master/sound/soc/intel/skylake/
H A Dskl-topology.h424 struct skl_pipe *pipe; member in struct:skl_module_cfg
438 struct skl_pipe *pipe; member in struct:skl_pipeline
486 int skl_create_pipeline(struct skl_dev *skl, struct skl_pipe *pipe);
488 int skl_run_pipe(struct skl_dev *skl, struct skl_pipe *pipe);
490 int skl_pause_pipe(struct skl_dev *skl, struct skl_pipe *pipe);
492 int skl_delete_pipe(struct skl_dev *skl, struct skl_pipe *pipe);
494 int skl_stop_pipe(struct skl_dev *skl, struct skl_pipe *pipe);
496 int skl_reset_pipe(struct skl_dev *skl, struct skl_pipe *pipe);

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