#
1fd61d01 |
|
13-Feb-2023 |
Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com> |
ASoC: Intel: Skylake: Fix struct definition The kernel is globally removing the ambiguous 0-length and 1-element arrays in favor of flexible arrays, so that we can gain both compile-time and run-time array bounds checking[1]. In this instance, struct skl_cpr_cfg contains struct skl_cpr_gtw_cfg, which defined "config_data" as a 1-element array. However, case present in sound/soc/intel/skylake/skl-topology.h is not a simple one as the structure takes part in IPC communication. Apparently original definition missed one field, which while not used by AudioDSP firmware when there is no additional data, is still expected to be part of an IPC message. Currently this works because of how 'config_data' is declared: 'config_data[1]'. Now when one replaces it with a flexible array there would be one field missing. Update struct declaration to fix this. Reported-by: Sasa Ostrouska <casaxa@gmail.com> Link: https://lore.kernel.org/all/CALFERdwvq5day_sbDfiUsMSZCQu9HG8-SBpOZDNPeMdZGog6XA@mail.gmail.com/ Cc: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Cc: Liam Girdwood <liam.r.girdwood@linux.intel.com> Cc: Peter Ujfalusi <peter.ujfalusi@linux.intel.com> Cc: Bard Liao <yung-chuan.liao@linux.intel.com> Cc: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Cc: Kai Vehmanen <kai.vehmanen@linux.intel.com> Cc: Mark Brown <broonie@kernel.org> Cc: Jaroslav Kysela <perex@perex.cz> Cc: Takashi Iwai <tiwai@suse.com> Cc: "Gustavo A. R. Silva" <gustavoars@kernel.org> Cc: alsa-devel@alsa-project.org CC: Kees Cook <keescook@chromium.org> Reviewed-by: Cezary Rojewski <cezary.rojewski@intel.com> Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com> Link: https://lore.kernel.org/r/20230213205223.2679357-1-amadeuszx.slawinski@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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#
75ab3c00 |
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05-Dec-2022 |
Cezary Rojewski <cezary.rojewski@intel.com> |
ASoC: Intel: Skylake: Drop pipe_config_idx Field ->pipe_config_idx duplicates the job of ->cur_config_idx so remove it. Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Tested-by: Lukasz Majczak <lma@semihlaf.com> Link: https://lore.kernel.org/r/20221205085330.857665-4-cezary.rojewski@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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#
6fed3265 |
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26-Sep-2022 |
Gustavo A. R. Silva <gustavoars@kernel.org> |
ASoC: Intel: Skylake: Replace zero-length arrays with DECLARE_FLEX_ARRAY() helper Zero-length arrays are deprecated and we are moving towards adopting C99 flexible-array members, instead. So, replace zero-length arrays declarations in anonymous union with the new DECLARE_FLEX_ARRAY() helper macro. This helper allows for flexible-array members in unions. Link: https://github.com/KSPP/linux/issues/193 Link: https://github.com/KSPP/linux/issues/226 Link: https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Reviewed-by: Kees Cook <keescook@chromium.org> Reviewed-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com> Link: https://lore.kernel.org/r/YzIuiUul2CwPlkKh@work Signed-off-by: Mark Brown <broonie@kernel.org>
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#
5224f790 |
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14-Feb-2022 |
Gustavo A. R. Silva <gustavoars@kernel.org> |
treewide: Replace zero-length arrays with flexible-array members There is a regular need in the kernel to provide a way to declare having a dynamically sized set of trailing elements in a structure. Kernel code should always use “flexible array members”[1] for these cases. The older style of one-element or zero-length arrays should no longer be used[2]. This code was transformed with the help of Coccinelle: (next-20220214$ spatch --jobs $(getconf _NPROCESSORS_ONLN) --sp-file script.cocci --include-headers --dir . > output.patch) @@ identifier S, member, array; type T1, T2; @@ struct S { ... T1 member; T2 array[ - 0 ]; }; UAPI and wireless changes were intentionally excluded from this patch and will be sent out separately. [1] https://en.wikipedia.org/wiki/Flexible_array_member [2] https://www.kernel.org/doc/html/v5.16/process/deprecated.html#zero-length-and-one-element-arrays Link: https://github.com/KSPP/linux/issues/78 Reviewed-by: Kees Cook <keescook@chromium.org> Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
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#
322fa431 |
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26-Nov-2021 |
Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com> |
ASoC: Intel: Skylake: Use NHLT API to search for blob With NHLT enriched with new search functions, remove local code in favour of them. This also fixes broken behaviour: search should be based on significant bits count rather than container size. Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com> Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Acked-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20211126140355.1042684-4-cezary.rojewski@intel.com Signed-off-by: Takashi Iwai <tiwai@suse.de>
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#
db5a3f83 |
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18-Aug-2021 |
Szymon Mielczarek <szymonx.mielczarek@intel.com> |
ASoC: Intel: Skylake: Support modules with generic extension Some DSP modules require, besides the module base configuration, a generic extension containing audio format for all module's pins that are in use. Signed-off-by: Gustaw Lewandowski <gustaw.lewandowski@linux.intel.com> Signed-off-by: Szymon Mielczarek <szymonx.mielczarek@intel.com> Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Tested-by: Lukasz Majczak <lma@semihalf.com> Link: https://lore.kernel.org/r/20210818075742.1515155-10-cezary.rojewski@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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#
a4ad42d2 |
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18-Aug-2021 |
Kareem Shaik <kareem.m.shaik@intel.com> |
ASoC: Intel: Skylake: Support multiple format configs A module can have two kinds of set params, as per topology requirements. For example, one pre-init and one post-init. But currently, there is support for just one type, as the format_config. This patch extends the format_configs to 4, so as to be able to support pre-init, post-init and post-bind type of set params, for the same module, simultaneously. Signed-off-by: Kareem Shaik <kareem.m.shaik@intel.com> Signed-off-by: Gustaw Lewandowski <gustaw.lewandowski@linux.intel.com> Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Tested-by: Lukasz Majczak <lma@semihalf.com> Link: https://lore.kernel.org/r/20210818075742.1515155-9-cezary.rojewski@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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#
e4e95d82 |
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18-Aug-2021 |
Gustaw Lewandowski <gustaw.lewandowski@linux.intel.com> |
ASoC: Intel: Skylake: Simplify m_state for loadable modules States SKL_MODULE_LOADED and SKL_MODULE_UNLOADED are redundant with 'loadable' flag in struct skl_module. Additionally skl_tplg_mixer_dapm_post_pmd_event() sets m_state always to SKL_MODULE_UNINIT so next unload function isn't called for such modules. Signed-off-by: Gustaw Lewandowski <gustaw.lewandowski@linux.intel.com> Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Tested-by: Lukasz Majczak <lma@semihalf.com> Link: https://lore.kernel.org/r/20210818075742.1515155-8-cezary.rojewski@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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#
8f0ccd59 |
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13-Aug-2020 |
Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> |
ASoC: Intel: Skylake: (cosmetic) align function parameters Fix cppcheck warnings and align headers with code. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20200813200147.61990-22-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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#
23f8d964 |
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17-Jul-2020 |
Gustavo A. R. Silva <gustavoars@kernel.org> |
ASoC: Intel: Skylake: Avoid the use of one-element array One-element arrays are being deprecated[1]. Replace the one-element array with a simple value type 'u8 reserved'[2], once it seems this is just a placeholder for alignment. [1] https://github.com/KSPP/linux/issues/79 [2] https://github.com/KSPP/linux/issues/86 Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Tested-by: kernel test robot <lkp@intel.com> Reviewed-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com> Link: https://github.com/GustavoARSilva/linux-hardening/blob/master/cii/0-day/skylake-20200717.md Link: https://lore.kernel.org/r/20200717215500.GA13910@embeddedor Signed-off-by: Mark Brown <broonie@kernel.org>
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#
936b9df7 |
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10-May-2020 |
Gustavo A. R. Silva <gustavoars@kernel.org> |
ASoC: Intel: Skylake: Replace zero-length array with flexible-array The current codebase makes use of the zero-length array language extension to the C90 standard, but the preferred mechanism to declare variable-length types such as these ones is a flexible array member[1][2], introduced in C99: struct foo { int stuff; struct boo array[]; }; By making use of the mechanism above, we will get a compiler warning in case the flexible array does not occur last in the structure, which will help us prevent some kind of undefined behavior bugs from being inadvertently introduced[3] to the codebase from now on. Also, notice that, dynamic memory allocations won't be affected by this change: "Flexible array members have incomplete type, and so the sizeof operator may not be applied. As a quirk of the original implementation of zero-length arrays, sizeof evaluates to zero."[1] sizeof(flexible-array-member) triggers a warning because flexible array members have incomplete type[1]. There are some instances of code in which the sizeof operator is being incorrectly/erroneously applied to zero-length arrays and the result is zero. Such instances may be hiding some bugs. So, this work (flexible-array member conversions) will also help to get completely rid of those sorts of issues. This issue was found with the help of Coccinelle. [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html [2] https://github.com/KSPP/linux/issues/21 [3] commit 76497732932f ("cxgb3/l2t: Fix undefined behaviour") Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Acked-by: Cezary Rojewski <cezary.rojewski@intel.com> Link: https://lore.kernel.org/r/20200511174647.GA17318@embeddedor Signed-off-by: Mark Brown <broonie@kernel.org>
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#
1b450791 |
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27-Apr-2020 |
Mateusz Gorski <mateusz.gorski@linux.intel.com> |
ASoC: Intel: Multiple I/O PCM format support for pipe For pipes supporting multiple input/output formats, kcontrol is created and selection of pipe input and output configuration is done based on control set. If more than one configuration is supported, then this patch allows user to select configuration of choice using amixer settings. Signed-off-by: Mateusz Gorski <mateusz.gorski@linux.intel.com> Signed-off-by: Pavan K S <pavan.k.s@intel.com> Reviewed-by: Cezary Rojewski <cezary.rojewski@intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20200427132727.24942-3-mateusz.gorski@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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#
bdc873fe |
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23-Jul-2019 |
Cezary Rojewski <cezary.rojewski@intel.com> |
ASoC: Intel: Skylake: Cleanup skl_module_cfg declaration With removal of MCPS, CPS and CPC ambiguity, ibs and obs params for struct skl_module_cfg have been left unused. Update struct declaration by removing these two. Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Link: https://lore.kernel.org/r/20190723145854.8527-8-cezary.rojewski@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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#
84b71067 |
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23-Jul-2019 |
Cezary Rojewski <cezary.rojewski@intel.com> |
ASoC: Intel: Skylake: Make MCPS and CPS params obsolete As per FW Interface Modules Configuration, init instance IPC request requires base initial module configuration. This configuration structure is made of: - cpc (chunks per cycle) - ibs (input buffer size) - obs (output buffer size) - is_pages (memory pages required) - audio_fmt (self explanatory) Skylake topology accepts following tokens: MCPS, CPS and CPC. All of these are directly connected. Moreover, assigning one of these allows to calculate the remaining two. In simplest scenario and assuming 1ms scheduling, following is true: CPS = CPC times 1000 MCPS = CPS times 1000 000 Note: these calculations vary depending on scenario and scheduling requirements. Given the current implementation, userspace is allowed to provide different values for all three causing informational chaos. On top of that, struct skl_base_cfg which represents base module configuration, incorrectly takes CPS param instead of CPC. This ambiguity may lead to user unintentionally providing improper values to DSP firmware and thus impacting module scheduling in unexpected fashion. Fix by making MCPS and CPS topology params obsolete and relying solely on CPC value. Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Link: https://lore.kernel.org/r/20190723145854.8527-7-cezary.rojewski@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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#
d4e23b7c |
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23-Jul-2019 |
Amadeusz Sławiński <amadeuszx.slawinski@intel.com> |
ASoC: Intel: Skylake: Do not disable FW notifications As per FW team recommendation we should not disable notifications. By default, all notifications are enabled in DSP firmware. These notifications provide a vital information whenever an error occurs. Currently, driver disables them during boot sequences. By doing so, Skylake may silently ignore severe stream errors. Correct that by removing permissive code. Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@intel.com> Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Link: https://lore.kernel.org/r/20190723145854.8527-6-cezary.rojewski@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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#
bcc2a2dc |
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23-Jul-2019 |
Cezary Rojewski <cezary.rojewski@intel.com> |
ASoC: Intel: Skylake: Merge skl_sst and skl into skl_dev struct Skylake driver is divided into two modules: - snd_soc_skl - snd_soc_skl_ipc and nothing would be wrong if not for the fact that both cannot exist without one another. IPC module is not some kind of extension, as it is the case for snd_hda_ext_core which is separated from snd_hda_core - legacy hda interface. It's as much core Skylake module as snd_soc_skl is. Statement backed up by existence of circular dependency between this two. To eliminate said problem, struct skl_sst has been created. From that very momment, Skylake has been plagued by header errors (incomplete structs, unknown references etc.) whenever something new is to be added or code is cleaned up. As this design is being corrected, struct skl_sst is no longer needed, so combine it with struct skl. To avoid ambiguity when searching for skl stuff (struct skl *skl) it has also been renamed to skl_dev. No functional changes. Signed-off-by: Piotr Maziarz <piotrx.maziarz@intel.com> Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Link: https://lore.kernel.org/r/20190723145854.8527-2-cezary.rojewski@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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#
e79986ce |
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17-Jun-2019 |
Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com> |
ASoC: Intel: Skylake: Properly cleanup on component removal When we remove component we need to reverse things which were done on init, this consists of topology cleanup, lists cleanup and releasing firmware. Currently cleanup handlers are put in wrong places or otherwise missing. So add proper component cleanup function and perform cleanups in it. Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
9e0784d0 |
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19-Jun-2019 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
ASoC: Intel: Skylake: Switch to modern UUID API Switch the driver to use modern UUID API, i.e. guid_t type and accompanying functions, such as guid_equal(). Cc: Liam Girdwood <lgirdwood@gmail.com> Cc: Mark Brown <broonie@kernel.org> Cc: Vinod Koul <vkoul@kernel.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
8e8e69d6 |
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29-May-2019 |
Thomas Gleixner <tglx@linutronix.de> |
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 285 Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation version 2 of the license this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 100 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141900.918357685@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
76f56fae |
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01-Jun-2018 |
Rakesh Ughreja <rakesh.a.ughreja@intel.com> |
ALSA: hdac: Remove usage of struct hdac_ext_bus and use hdac_bus instead This patch removes the hdac_ext_bus structure. The legacy and enhanced HDaudio capabilities can be handled in a backward-compatible way without separate definitions. Follow-up patches in this series handle the driver definition. Signed-off-by: Rakesh Ughreja <rakesh.a.ughreja@intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
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#
c60b613a |
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14-Jun-2018 |
Liam Girdwood <liam.r.girdwood@linux.intel.com> |
ASoC: topology: Give more data to clients via callbacks Give topology clients more access to the topology data by passing index, pcm, link_config and dai_driver to clients. This allows clients to fully instantiate and track topology objects. The SOF driver is the first user of these new APIs and needs them to build component topology driver and FW objects. Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
0c24fdc0 |
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24-May-2018 |
Guenter Roeck <groeck@chromium.org> |
ASoC: topology: Move skl-tplg-interface.h to uapi skl-tplg-interface.h describes firmware format details for Skylake topology files. It is part of the ABI and should reside in the uapi directory. While moving the file, also replace the license boilerplate with the SPDX License Identifier. No functional change. Signed-off-by: Guenter Roeck <groeck@chromium.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
24ada035 |
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18-Apr-2018 |
Mark Brown <broonie@kernel.org> |
ASoC: topology: Fix build errors The two commits: 81e9b0a07889 ASoC: topology: Give more data to clients via callbacks 28aa6f7779f7 ASoC: topology: Add callback for DAPM route load/unload break the build so revert them. Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
81e9b0a0 |
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27-Mar-2018 |
Liam Girdwood <liam.r.girdwood@linux.intel.com> |
ASoC: topology: Give more data to clients via callbacks Give topology clients more access to the topology data by passing index, pcm, link_config and dai_driver to clients. This allows clients to fully instantiate and track topology objects. The SOF driver is the first user of these new APIs and needs them to build component topology driver and FW objects. Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
f7a9f772 |
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26-Jan-2018 |
Sriram Periyasamy <sriramx.periyasamy@intel.com> |
ASoC: Intel: Skylake: Find module id from UUID for bind params Module id is a property of firmware manifest and can vary across platforms. So use the uuid to find module id dynamically for bind params like kpb post bind params. Signed-off-by: Sriram Periyasamy <sriramx.periyasamy@intel.com> Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
56b03b4c |
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28-Jan-2018 |
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> |
ASoC: intel: skylake: replace platform to component Now platform can be replaced to component, let's do it. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: "Kp, Jeeja" <jeeja.kp@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
da3417fe |
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07-Nov-2017 |
Guneshwor Singh <guneshwor.o.singh@intel.com> |
ASoC: Intel: Skylake: Add channel map in updown mixer module IPC DSP expects channel map to be sent in the IPC for updown mixer module. So add ch_map info in updown mixer module config. Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com> Acked-By: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
3e1b96c8 |
|
07-Nov-2017 |
Guneshwor Singh <guneshwor.o.singh@intel.com> |
ASoC: Intel: Skylake: Fix updown mixer module format DSP expects length of the coefficient for updown mixer module to be 8. So fix the max coefficient length and since we are using default values for coefficient select which is zero, we need not explicitly initialize it. Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com> Acked-By: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
606e21fd |
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08-Oct-2017 |
Guneshwor Singh <guneshwor.o.singh@intel.com> |
ASoC: Intel: Skylake: Add dai load ops for dais from topology Since FE dais can come from topology, add dai_load ops for the dais from topology. Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com> Acked-By: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
5514830d |
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17-Sep-2017 |
Jaikrishna Nemallapudi <jaikrishnax.nemallapudi@intel.com> |
ASoC: Intel: Skylake: Modify skl_dsp_set_dma_control API arguments Set dma control ipc can be used to set the M/N divider, enable the clks. It takes different payload for different configuration. So modify the skl_dsp_set_dma_control API to take the size and node_id as argument. Signed-off-by: Jaikrishna Nemallapudi <jaikrishnax.nemallapudi@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Acked-By: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
38a77085 |
|
01-Sep-2017 |
Pradeep Tewani <pradeep.d.tewani@intel.com> |
ASoC: Intel: Skylake: Add IPC to configure the copier secondary pins Copier can support upto 4 output pins. However, only pin 0 is configured as a part of copier initialization. Configuring rest of pins require the separate IPC to be sent to fw. Signed-off-by: Pradeep Tewani <pradeep.d.tewani@intel.com> Acked-By: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
91fe0e70 |
|
23-Aug-2017 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Update module id in pin connections Each module's id comes from the topology and gets updated in the driver. This patch updates the input and output pin connections of each module by matching the uuid for each module. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com> Acked-By: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
f6fa56e2 |
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23-Aug-2017 |
Ramesh Babu <ramesh.babu@intel.com> |
ASoC: Intel: Skylake: Parse and update module config structure A dsp path and the modules in the path can support various pcm configurations. The list of supported pcm configurations from topology manifest would be stored and later selected runtime based on the hw pcm params. For legacy, module data is filled in the 0th index of resource and interface table. To accommodate both models, change the relevant structures and populate them by parsing newly defined tokens. This change is backward compatible with the existing model where driver computes the resources required by each dsp module. Signed-off-by: Ramesh Babu <ramesh.babu@intel.com> Signed-off-by: Shreyas NC <shreyas.nc@intel.com> Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com> Acked-By: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
822c3b04 |
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23-Aug-2017 |
Shreyas NC <shreyas.nc@intel.com> |
ASoC: Intel: Skylake: Add driver structures to be filled from topology manifest The topology manifest would include module common data including resource and interface table. The resource table consists of resources required by the dsp module such as buffer size, cycles per second, number of input/output pins. And, the interface table consists of pcm parameters per module which can be referenced later. So define the structures accordingly to represent topology manifest data in the driver. Signed-off-by: Shreyas NC <shreyas.nc@intel.com> Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com> Acked-By: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
939df3ad |
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19-Jun-2017 |
Ramesh Babu <ramesh.babu@intel.com> |
ASoC: Intel: Skylake: Add deep buffer support With this patch, the dma buffer size is fetched from topology binary. This buffer size is applicable for gateway copier modules. Now that we can configure DSP dma buffer size, the device can support deep buffer playback. DSP fetches large buffer and can result fewer wakes, which helps in power reduction. Signed-off-by: Ramesh Babu <ramesh.babu@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Acked-By: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
7a1b749b |
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30-May-2017 |
Dharageswari R <dharageswari.r@intel.com> |
ASoC: Intel: Skylake: Add enum control for mic selection User may prefer to select data from particular mics. A mic-select module in DSP allows this selection. Create possible enum controls to allow user to select a combination of mics to capture data from. Based on the user selection, parameters are generated and passed to mic-select module during init. Signed-off-by: Dharageswari R <dharageswari.r@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
b8c722dd |
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24-Mar-2017 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Add support for deferred DSP module bind Module at the end of DSP pipeline that needs to be connected to a module in another pipeline are represented as a PGA(leaf node) and in PGA event handler these modules are bound/unbounded. Modules other than PGA leaf can be connected directly or via switch to a module in another pipeline. Example: reference path. To support the deferred DSP module bind, following changes are done: o When the path is enabled, the destination module that needs to be bound may not be initialized. If the module is not initialized, add these modules in a deferred bind list. o When the destination module is initialized, check for these modules in deferred bind list. If found, bind them. o When the destination module is deleted, Unbind the modules. o When the source module is deleted, remove the entry from the deferred bind list. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
b26199ea |
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24-Mar-2017 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Rearrangement of code to cleanup SKL SST library Skylake driver topology header/driver structure is referenced and used in SST library which creates circular dependency. Hence the rearrangement. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
7f975a38 |
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24-Mar-2017 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Use the sig_bits to define dai bps capability For calculating the HDA DMA format, use the max_bps supported by the DAI caps instead of fixing it to 32/24. For host DMA the Max bps support is 32, but in case of link DMA, this depends on the codec capability. So use the sig_bits to define the bps supported by dai. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
eee0e16f |
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01-Jan-2017 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Clean up manifest info Instead of passing the topology manifest info directly to IPC library, define the manifest info in topology and use this in IPC Library. This will remove the dependency on topology interface definition with IPC library. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
ad036bde |
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08-Dec-2016 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Add helper function to setup host/link dma This patch adds helper function to configure the host/link DMA when the DMA is in decoupled mode. Next patch adds the usage of this helper routines for configuring DMA in Mixer event handler. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
12c3be0e |
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08-Dec-2016 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Update link_index and format in pipe params To configure Host/Link DMA, additionally link index and format are required based on the hw params. So added these parameters in the pipe params and in hw_params the pipe params are updated. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
48458cc8 |
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23-Nov-2016 |
GuruprasadX Pawse <guruprasadx.pawse@intel.com> |
ASoC: Intel: Skylake: Removed the unused I2S blob structure Now that I2S conflig blob structure is no longer in use, remove it. Signed-off-by: GuruprasadX Pawse <guruprasadx.pawse@intel.com> Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
a83e3b4c |
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03-Nov-2016 |
Vinod Koul <vkoul@kernel.org> |
ASoC: Intel: Skylake: Add D0i3 mode ref counting For device opened/closed, we check the D0i3 capability for the device and invoke skl_tplg_d0i3_get/put, which counts the use case based on the mode supported. These counters are then used to decide if the device can enter D0i3 mode of streaming or non-streaming or no D0i3. Signed-off-by: Jayachandran B <jayachandran.b@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
6bd9dcf3 |
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03-Nov-2016 |
Vinod Koul <vkoul@kernel.org> |
ASoC: Intel: Skylake: Add support for specifying D0i3 configuration Not all use cases can support Doi3. Only certain use cases like hot word detection, deep buffering can support D0i3 based on resource requirement. So, pass the D0i3 capability for the FE/BE copier using topology. This will be used to take a decision for D0i3 mode entry/exit. Signed-off-by: Jayachandran B <jayachandran.b@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
8a0cb236 |
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03-Nov-2016 |
Vinod Koul <vkoul@kernel.org> |
ASoC: Intel: Skylake: Add support for LPMode For D0i3, we need to tell DSP to run the pipelines in LP mode. This information is kept in topology and passed to driver as an attribute for pipe. So add a new tuple for lpmode and program the pipe based on value set. Signed-off-by: Jayachandran B <jayachandran.b@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
5e8f0ee4 |
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22-Sep-2016 |
Dharageswari R <dharageswari.r@intel.com> |
ASoC: Intel: Skylake: Update to use instance ids generated Post bind parameters of KPB module contains the instance id's of neighbouring modules in the sink path Now that module instance ids are generated dynamically we need to update these parameters as well, so use the table created and update the ids Signed-off-by: Dharageswari R <dharageswari.r@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
700a9a63 |
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22-Sep-2016 |
Dharageswari R <dharageswari.r@intel.com> |
ASoC: Intel: Skylake: Add module instance id generation APIs Driver needs to send unique module instance id to firmware while creating the module and uses this id to communicate with DSP for setting parameters while audio use case is ongoing. But, we have upper bound of instance ID. The current IDs are coming from topology but it doesn't know the upper bound and can't assign unique id's subject to upper bounds as we can create a big graph but not all parts running at same time. This patch adds a 128bit unique id management routines which are built on top of ffz() for faster implementation. Unfortunately ffz() works on 32bits values, so additional code is added on top of ffz() to create a 128bit unique id. Signed-off-by: Dharageswari R <dharageswari.r@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
0b6d76bb |
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24-Aug-2016 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Fix DMA control config size DMA control IPC structure wrong config array length, So corrected the size Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
b7c50555 |
|
26-Jul-2016 |
Vinod Koul <vkoul@kernel.org> |
ASoC: Intel: Skylake: Move modules query to runtime Since we are moving DSP init to later, at the topology load the module info is not available. So set the module id to -1 at init and query at first module initialization. Signed-off-by: Senthilnathan Veppur <senthilnathanx.veppur@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
0d682104 |
|
08-Jul-2016 |
Dharageswari R <dharageswari.r@intel.com> |
ASoC: Intel: Skylake: Fix to use the actual size for TLV control DSP expects the actual length of parameters that is set through TLV to be passed in large config set, so pass the actual size received in tlv_control_set() instead of max size. Signed-off-by: Dharageswari R <dharageswari.r@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
f0aa94fa |
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03-Jun-2016 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Set the DSP pipe type DSP pipe type can be a pass through or it can be processing pipe. In case of pass through pipe, it is a single pipeline with both host and link copier in the same pipeline. Identify the DSP pipe type if it pass through or not. Pass through pipe is identified by checking if it has both host and link copier in the same pipeline. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
2004432f |
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03-Jun-2016 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Reset DSP pipe when host/link DMA is reset In case of XRUN recovery PCM prepare will be called. In this case Host/Link DMAs are reset and reconfigured, hence the corresponding FE/BE pipe needs to be reset in order to get to a clean state. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
09305da9 |
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21-Apr-2016 |
Shreyas NC <shreyas.nc@intel.com> |
ASoC: Intel: Skylake: Use UUID in binary format To avoid complex string manipulations with UUID in canonical form, use UUID in binary format. Signed-off-by: Shreyas NC <shreyas.nc@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
d643678b |
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28-Mar-2016 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Fix for unloading module only when it is loaded Module needs to be unloaded only when it is loaded successfully. To fix this, first correct the module state sequence and set module state to LOADED if module is loaded successfully. When unloading the module check if module state is not in UNINIT, then unload it. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
c115fa5e |
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04-Feb-2016 |
Dharageswari.R <dharageswari.r@intel.com> |
ASoC: Intel: Skylake: Add MCLK configuration The SoC has MCLK output which is typically required by codecs. The MCLK is controlled by DSP FW, so driver can configure that by sending DMA_CONTROL IPC. The configuration for MCLK is present in the endpoint blob. So if block has this configuration, send IPC to DSP for MCLK configuration. This is done by new function skl_dsp_set_dma_control() which is invoked by BE prepare. Signed-off-by: Dharageswari R <dharageswari.r@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
718a42b5 |
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04-Feb-2016 |
Dharageswari.R <dharageswari.r@intel.com> |
ASoC: Intel: Skylake: Add skl_tplg_be_get_cpr_module() helper An I2S port can be connected to multiple BE pipes, get module config only for the active BE pipe. This helpers helps to do that and is used in subsequent patches Signed-off-by: Dharageswari R <dharageswari.r@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
7d9f2911 |
|
03-Dec-2015 |
Omair M Abdullah <omair.m.abdullah@intel.com> |
ASoC: Intel: Skylake: read params from DSP if module is on If a module is ON then we should read the module parameters from DSP rather than driver cached values Signed-off-by: Omair M Abdullah <omair.m.abdullah@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
4ced1827 |
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03-Dec-2015 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Fix module init data correctly Module initialization parameter data can be set by - INIT_INSTANCE IPC by using the default value - SET_PARAMS immediately after INIT_INSTANCE - SET_PARAMS data from kcontrol values set this patch add param type to identify the parameters has to be sent to DSP. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
fd18110f |
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03-Dec-2015 |
Dharageswari R <dharageswari.r@intel.com> |
ASoC: Intel: Skylake: Add support for Mic Select module Mic select is a DSP module which is used to select one or many inputs to form an output. This is useful to select data selectively from PDM input and hence the name. This module is of generic module type. This patch adds support to add and configure Mic select module in firmware topology. Signed-off-by: Dharageswari R <dharageswari.r@intel.com> Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
b18c458d |
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03-Dec-2015 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Add memory pages to widget data. A module can require extra memory for processing, like audio algorithms. The memory for these modules needs to be represented in base module configuration and passed to DSP on init, so add the memory pages as a field in widget data Signed-off-by: Dharageswari.R <dharageswari.r@intel.com> Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
abb74003 |
|
28-Nov-2015 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Add support to configure module params This adds support to configure module parameter during module initialization or after module init using set module param required by the DSP firmware sequence. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
399b210b |
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28-Nov-2015 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Add helper routine to handle Algo parameter Some DSP modules has user configurable parameters, which are required by some modules at module initialization. To configure the module algorithm parameter during initialization we add helpers here Signed-off-by: Divya Prakash <divya1.prakash@intel.com> Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
9939a9c3 |
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28-Nov-2015 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Add helper routines to handle module params Some DSP modules have user configurable parameters. These parameters are required by modules in the following scenario - during initialization - after initialization using set parameter This patch adds helper routine to set module parameters using large config set IPC message and removes params to be passed as init module routine. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
65aecfa8 |
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26-Oct-2015 |
Hardik T Shah <hardik.t.shah@intel.com> |
ASoC: Intel: Skylake: Add support for module GUIDs The DSP FW specifies loadable modules using GUIDs so add support to specify the GUIDs from topology Signed-off-by: Hardik T Shah <hardik.t.shah@intel.com> Signed-off-by: Omair M Abdullah <omair.m.abdullah@intel.com> Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
04afbbbb |
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26-Oct-2015 |
Hardik T Shah <hardik.t.shah@intel.com> |
ASoC: Intel: Skylake: Update the topology interface structure This patch updates the topology interface structure alignment and also updates the Sample interleaving defines Signed-off-by: Hardik T Shah <hardik.t.shah@intel.com> Signed-off-by: Omair M Abdullah <omair.m.abdullah@intel.com> Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
4cd9899f |
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26-Oct-2015 |
Hardik T Shah <hardik.t.shah@intel.com> |
ASoC: Intel: Skylake: Add multiple pin formats The module pin formats are considered homogeneous, but some modules can have different pcm formats on different pins, like reference signal for a module. This patch add support for configuration of each pin of module and allows us to specify if pins and homogeneous or heterogeneous Signed-off-by: Hardik T Shah <hardik.t.shah@intel.com> Signed-off-by: Omair M Abdullah <omair.m.abdullah@intel.com> Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
ce1b5551 |
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26-Oct-2015 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: use module_pin info for unbind in_pin and out_pin list for a module has the information about the module that are bound together. So we can directly look at pin information of module for binding and unbind. As a result the preinitialized dapm_path_last we had is removed and code and memory optimzed. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
|
#
4f745708 |
|
26-Oct-2015 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Fix support for multiple pins in a module For supporting multiple dynamic pins, module state check is incorrect. In case of unbind, module state need to be changed to uninit if all pins in the module is is unbind state. To handle module state correctly add pin state and use pin state check to set module state correctly. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
4e10996b |
|
22-Oct-2015 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Add support to disable module notifications Each FW modules can report underrun/overrun notification from all modules. This patch disables underrun/overrun notification after firmware is loaded. This will be supportted for debug mode only thru debugfs Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
|
#
d7b18813 |
|
22-Oct-2015 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Update for ssp node index in copier cfg DSP firmware has interface change for SSP node index structure. New FW interface removes the dual_mono field and adds 4 bits for TDM slot group index. This patch updates the ssp dma to align with the DSP firmware structure. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
|
#
3af36706 |
|
07-Oct-2015 |
Vinod Koul <vkoul@kernel.org> |
ASoC: Intel: Skylake: Add topology core init and handlers The SKL driver does not code DSP topology in driver. It uses the newly added ASoC topology core to parse the topology information (controls, widgets and map) from topology binary. Each topology element passed private data which contains information that driver used to identify the module instance within firmware and send IPCs for that module to DSP firmware along with parameters. This patch adds init routine to invoke topology load and callback for topology creation. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
cfb0a873 |
|
07-Oct-2015 |
Vinod Koul <vkoul@kernel.org> |
ASoC: Intel: Skylake: Add FE and BE hw_params handling For FE and BE, the PCM parameters come from FE and BE hw_params values passed. For a FE we convert the FE params to DSP expected module format and pass to DSP. For a BE we need to find the gateway settings (i2s/PDM) to be applied. These are queried from NHLT table and applied. Further for BE based on direction the settings are applied as either source or destination parameters. These helpers here allow the format to be calculated and queried as per firmware format. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
d93f8e55 |
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07-Oct-2015 |
Vinod Koul <vkoul@kernel.org> |
ASoC: Intel: Skylake: add DSP platform widget event handlers The Skylake driver topology model tries to model the firmware rule for pipeline and module creation. The creation rule is: - Create Pipe - Add modules to Pipe - Connect the modules (bind) - Start the pipes Similarly destroy rule is: - Stop the pipe - Disconnect it (unbind) - Delete the pipe In driver we use Mixer, as there will always be ONE mixer in a pipeline to model a pipe. The modules in pipe are modelled as PGA widgets. The DAPM sequencing rules (mixer and then PGA) are used to create the sequence DSP expects as depicted above, and then widget handlers for PMU and PMD events help in that. This patch adds widget event handlers for PRE/POST PMU and PRE/POST PMD event for mixer and pga modules. These event handlers invoke pipeline creation, destroy, module creation, module bind, unbind and pipeline bind unbind Event handler sequencing is implement to target the DSP FW sequence expectations to enable path from source to sink pipe for Playback/Capture. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Hardik T Shah <hardik.t.shah@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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e4e2d2f4 |
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07-Oct-2015 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Add pipe and modules handlers SKL driver needs to instantiate pipelines and modules in the DSP. The topology in the DSP is modelled as DAPM graph with a PGA representing a module instance and mixer representing a pipeline for a group of modules along with the mixer itself. Here we start adding building block for handling these. We add resource checks (memory/compute) for pipelines, find the modules in a pipeline, init modules in a pipe and lastly bind/unbind modules in a pipe These will be used by pipe event handlers in subsequent patches Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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c9b1e834 |
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01-Aug-2015 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Add pipe management helpers To manage DSP we need to create processing pipeline and on cleanup destroy them. So we add create and destroy routines for pipelines The pipelines need to to be executed so we add pipeline run and stop routines All these send required IPCs to DSP using IPC routines added earlier Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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beb73b26 |
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01-Aug-2015 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Add DSP module init and binding routines A module needs to be instantiated and then connected with other modules. On cleanup we need to disconnect the module. This is achieved by helpers module init, bind and unbind which are added here Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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a0ffe48b |
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01-Aug-2015 |
Hardik T Shah <hardik.t.shah@intel.com> |
ASoC: Intel: Skylake: Add helpers for SRC and converter modules SRC and converter modules are required to do frequency and channel conversion in DSP. Both take base module configuration and additional SRC and converter parameters. The helpers here are added to calculate the values for these modules Signed-off-by: Hardik T Shah <hardik.t.shah@intel.com> Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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23db472b |
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01-Aug-2015 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Add helpers for DSP module configuration This adds helper functions to calculate parameters required for base module format and copier module. A generic module is modelled by base module. Copier module is responsible for getting/sending data to FE (host DMAs) and BE (link HDA DMA, SSP, PDM) This also ads module pin management helpers which help in finding pins to use or freeing them up Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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