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.gdbinitH A D22-Apr-201632

aclocal.m4H A D22-Apr-20160

altivec.igenH A D22-Apr-201666.8 KiB

altivec_expression.hH A D22-Apr-20161.5 KiB

altivec_registers.hH A D22-Apr-20162 KiB

basics.hH A D22-Apr-20163 KiB

bits.cH A D22-Apr-20162.6 KiB

bits.hH A D22-Apr-20167.6 KiB

BUGSH A D22-Apr-20162.4 KiB

cap.cH A D22-Apr-20163.2 KiB

cap.hH A D22-Apr-20161.4 KiB

ChangeLogH A D22-Apr-2016138.2 KiB

ChangeLog.00H A D22-Apr-201679.8 KiB

config.inH A D22-Apr-20168.6 KiB

configureH A D22-Apr-2016221.5 KiB

configure.acH A D22-Apr-201626.8 KiB

COPYINGH A D22-Apr-201617.6 KiB

COPYING.LIBH A D22-Apr-201624.7 KiB

corefile-n.hH A D22-Apr-20162.7 KiB

corefile.cH A D22-Apr-20169.5 KiB

corefile.hH A D22-Apr-20166.1 KiB

cpu.cH A D22-Apr-20168 KiB

cpu.hH A D22-Apr-20165.4 KiB

dc-complexH A D22-Apr-20162.2 KiB

dc-simpleH A D22-Apr-20161,005

dc-stupidH A D22-Apr-20162.2 KiB

dc-test.01H A D22-Apr-20161.1 KiB

dc-test.02H A D22-Apr-20161.1 KiB

debug.cH A D22-Apr-20164.9 KiB

debug.hH A D22-Apr-20164 KiB

device.cH A D22-Apr-201648.7 KiB

device.hH A D22-Apr-201617.2 KiB

device_table.cH A D22-Apr-20167.4 KiB

device_table.hH A D22-Apr-20168.3 KiB

dgen.cH A D22-Apr-20168.5 KiB

double.cH A D22-Apr-20161.1 KiB

dp-bit.cH A D22-Apr-201627.1 KiB

e500.igenH A D22-Apr-2016109.2 KiB

e500_expression.hH A D22-Apr-20165.4 KiB

e500_registers.hH A D22-Apr-20163.1 KiB

emul_bugapi.cH A D22-Apr-201618.8 KiB

emul_bugapi.hH A D22-Apr-2016937

emul_chirp.cH A D22-Apr-201656.5 KiB

emul_chirp.hH A D22-Apr-20162.8 KiB

emul_generic.cH A D22-Apr-20168.7 KiB

emul_generic.hH A D22-Apr-20164.1 KiB

emul_netbsd.cH A D22-Apr-201635.5 KiB

emul_netbsd.hH A D22-Apr-2016937

emul_unix.cH A D22-Apr-201670.9 KiB

emul_unix.hH A D22-Apr-2016962

events.cH A D22-Apr-201611.1 KiB

events.hH A D22-Apr-20161.9 KiB

filter.cH A D22-Apr-20163 KiB

filter.hH A D22-Apr-20161.2 KiB

filter_filename.cH A D22-Apr-20161.2 KiB

filter_filename.hH A D22-Apr-20161,008

gdb-sim.cH A D22-Apr-201666.7 KiB

gen-icache.cH A D22-Apr-201618.9 KiB

gen-icache.hH A D22-Apr-20161.9 KiB

gen-idecode.cH A D22-Apr-201645.8 KiB

gen-idecode.hH A D22-Apr-20161.3 KiB

gen-itable.cH A D22-Apr-20163.5 KiB

gen-itable.hH A D22-Apr-2016961

gen-model.cH A D22-Apr-201612.2 KiB

gen-model.hH A D22-Apr-2016961

gen-semantics.cH A D22-Apr-20166.8 KiB

gen-semantics.hH A D22-Apr-20162.6 KiB

gen-support.cH A D22-Apr-20163.8 KiB

gen-support.hH A D22-Apr-2016964

hw_com.cH A D22-Apr-201614.3 KiB

hw_core.cH A D22-Apr-20163.4 KiB

hw_cpu.cH A D22-Apr-20164.3 KiB

hw_cpu.hH A D22-Apr-20161.1 KiB

hw_disk.cH A D22-Apr-201615.7 KiB

hw_eeprom.cH A D22-Apr-201621.8 KiB

hw_glue.cH A D22-Apr-201610.7 KiB

hw_htab.cH A D22-Apr-201620.7 KiB

hw_ide.cH A D22-Apr-201624.3 KiB

hw_init.cH A D22-Apr-201620 KiB

hw_iobus.cH A D22-Apr-20162.6 KiB

hw_memory.cH A D22-Apr-201615.5 KiB

hw_nvram.cH A D22-Apr-20166.8 KiB

hw_opic.cH A D22-Apr-201653.1 KiB

hw_pal.cH A D22-Apr-20169.3 KiB

hw_phb.cH A D22-Apr-201629 KiB

hw_phb.hH A D22-Apr-20161.2 KiB

hw_register.cH A D22-Apr-20163.6 KiB

hw_trace.cH A D22-Apr-20162.7 KiB

hw_vm.cH A D22-Apr-20167.3 KiB

idecode_branch.hH A D22-Apr-20161.9 KiB

idecode_expression.hH A D22-Apr-201610.3 KiB

idecode_fields.hH A D22-Apr-20162.9 KiB

igen.cH A D22-Apr-201615.2 KiB

igen.hH A D22-Apr-20165.2 KiB

inline.cH A D22-Apr-20162 KiB

inline.hH A D22-Apr-201613.7 KiB

INSTALLH A D22-Apr-201621.4 KiB

interrupts.cH A D22-Apr-201615.2 KiB

interrupts.hH A D22-Apr-20165.1 KiB

ld-cache.cH A D22-Apr-20163.2 KiB

ld-cache.hH A D22-Apr-20162.5 KiB

ld-decode.cH A D22-Apr-20164.5 KiB

ld-decode.hH A D22-Apr-20164.2 KiB

ld-insn.cH A D22-Apr-201626.6 KiB

ld-insn.hH A D22-Apr-20165.5 KiB

lf.cH A D22-Apr-20169 KiB

lf.hH A D22-Apr-20162.5 KiB

main.cH A D22-Apr-20166.7 KiB

Makefile.inH A D22-Apr-201623.1 KiB

misc.cH A D22-Apr-20163.7 KiB

misc.hH A D22-Apr-20162.1 KiB

mon.cH A D22-Apr-201611.7 KiB

mon.hH A D22-Apr-20162.3 KiB

options.cH A D22-Apr-20167.8 KiB

options.hH A D22-Apr-20161,007

os_emul.cH A D22-Apr-20163.8 KiB

os_emul.hH A D22-Apr-20161.8 KiB

pk_disklabel.cH A D22-Apr-201611 KiB

ppc-instructionsH A D22-Apr-2016171.4 KiB

ppc-spr-tableH A D22-Apr-20161.8 KiB

ppc.mtH A D22-Apr-201651

psim.cH A D22-Apr-201631.7 KiB

psim.hH A D22-Apr-20163.8 KiB

psim.texinfoH A D22-Apr-201641.2 KiB

READMEH A D22-Apr-20169.4 KiB

registers.cH A D22-Apr-20165 KiB

registers.hH A D22-Apr-20168.1 KiB

RUNH A D22-Apr-201627.7 KiB

sim-endian-n.hH A D22-Apr-20162.7 KiB

sim-endian.cH A D22-Apr-20161.9 KiB

sim-endian.hH A D22-Apr-201610.9 KiB

sim-main.hH A D22-Apr-2016146

sim_callbacks.hH A D22-Apr-20162.8 KiB

sim_calls.cH A D22-Apr-20168.6 KiB

std-config.hH A D22-Apr-201618.5 KiB

table.cH A D22-Apr-20167.6 KiB

table.hH A D22-Apr-20162 KiB

tree.cH A D22-Apr-201631.6 KiB

tree.hH A D22-Apr-20163.3 KiB

vm.cH A D22-Apr-201631.4 KiB

vm.hH A D22-Apr-20163.3 KiB

vm_n.hH A D22-Apr-20164.3 KiB

words.hH A D22-Apr-20163.1 KiB

README

1
2
3		PSIM 1.0.1 - Model of the PowerPC Environments
4
5
6    Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>.
7
8    This program is free software; you can redistribute it and/or modify
9    it under the terms of the GNU General Public License as published by
10    the Free Software Foundation; either version 2 of the License, or
11    (at your option) any later version.
12
13    This program is distributed in the hope that it will be useful,
14    but WITHOUT ANY WARRANTY; without even the implied warranty of
15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16    GNU General Public License for more details.
17 
18    You should have received a copy of the GNU General Public License
19    along with this program; if not, write to the Free Software
20    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
21 
22
23    ----------------------------------------------------------------------
24
25
26PSIM is a program written in extended ANSI-C that implements an
27instruction level simulation of the PowerPC environment.  It is freely
28available in source code form under the terms of the GNU General
29Public License (version 2 or later).
30
31The PowerPC Architecture is described as having three levels of
32compliance:
33
34	UEA - User Environment Architecture
35	VEA - Virtual Environment Architecture
36	OEA - Operating Environment Architecture
37
38PSIM both implements all three levels of the PowerPC and includes (for
39each level) a corresponding simulated run-time environment.
40
41In addition, PSIM, to the execution unit level, models the performance
42of most of the current PowerPC implementations (contributed by Michael
43Meissner).  This detailed performance monitoring (unlike many other
44simulators) resulting in only a relatively marginal reduction in the
45simulators performance.
46
47
48A description of how to build PSIM is contained in the file:
49
50		ftp://ftp.ci.com.au/pub/psim/INSTALL
51	or	ftp://cambridge.cygnus.com/pub/psim/INSTALL
52
53while an overview of how to use PSIM is in:
54
55	ftp://ftp.ci.com.au/pub/psim/RUN
56or	ftp://cambridge.cygnus.com/pub/psim/RUN
57
58This file is found in:
59
60	ftp://ftp.ci.com.au/pub/psim/README
61or	ftp://cambridge.cygnus.com/pub/psim/README
62
63
64Thanks goes firstly to:
65
66	Corinthian Engineering Pty Ltd
67	Cygnus Support
68	Highland Logic Pty Ltd
69
70who provided the resources needed for making this software available
71on the Internet.
72
73More importantly I'd like to thank the following individuals who each
74contributed in their own unique way:
75
76	Allen Briggs, Bett Koch, David Edelsohn, Gordon Irlam,
77	Michael Meissner, Bob Mercier, Richard Perini, Dale Rahn,
78	Richard Stallman, Mitchele Walker
79
80
81				Andrew Cagney
82				Feb, 1995
83
84
85    ----------------------------------------------------------------------
86
87
88    What features does PSIM include?
89
90	Monitoring and modeling
91
92		PSIM includes (thanks to Michael Meissner)
93		a detailed model of most of the PowerPC
94		implementations to the functional unit level.
95
96
97	SMP
98		
99		The PowerPC ISA defines SMP synchronizing instructions.
100		This simulator implements a limited, but functional,
101		subset of the PowerPC synchronization instructions
102		behaviour.  Programs that restrict their synchronization
103		primitives to those that work with this functional
104		sub-set (eg P() and V()) are able to run on the SMP
105		version of PSIM.
106
107		People intending to use this system should study
108		the code implementing the lwarx instruction.
109		
110	ENDIAN SUPPORT
111
112		PSIM implements the PowerPC's big and little (xor
113		endian) modes and correctly simulates code that
114		switches between these two modes.
115
116		In addition, psim can model a true little-endian
117		machine.
118
119	ISA (Instruction Set Architecture) models
120
121		PSIM includes a model of the UEA, VEA and OEA.  This
122		includes the time base registers (VEA) and HTAB
123		and BATS (OEA).
124
125		In addition, a preliminary model of the 64 bit
126		PowerPC architecture is implemented.
127
128	IO Hardware
129
130		PSIM's internals are based around the concept
131		of a Device Tree.  This tree intentionally
132		resembles that of the Device Tree found in
133		OpenBoot firmware.  PSIM is flexible enough
134		to allow the user to fully configure this device
135		tree (and consequently the hardware model) at
136		run time.
137
138	Run-time environments:
139
140		PSIM's UEA model includes emulation for BSD
141		based UNIX system calls.
142
143		PSIM's OEA model includes emulation of either:
144
145			o	OpenBoot client interface
146
147			o	MOTO's BUG interface.
148
149
150	Floating point
151
152		Preliminary support for floating point is included.
153
154
155    Who would be interested in PSIM?
156
157	o	the curious
158
159		Using psim, gdb, gcc and binutils the curious
160		user can construct an environment that allows
161		them to play with PowerPC Environment without
162		the need for real hardware.
163
164
165	o	the analyst
166
167		PSIM includes many (contributed) monitoring
168		features which (unlike many other simulators)
169		do not come with a great penalty in performance.
170
171		Thus the performance analyst is able to use
172		this simulator to analyse the performance of
173		the system under test.
174
175		If PSIM doesn't monitor a components of interest,
176		the source code is freely available, and hence
177		there is no hinderance to changing things
178		to meet a specific analysts needs.
179
180
181	o	the serious SW developer
182
183		PSIM models all three levels of the PowerPC
184		Architecture: UEA, VEA and OEA.  Further,
185		the internal design is such that PSIM can
186		be extended to support additional requirements.
187
188
189    What performance analysis measurements can PSIM perform?
190
191	Below is the output from a recent analysis run
192	(contributed by Michael Meissner):
193
194	For the following program:
195
196	long
197	simple_rand ()
198	{
199	  static unsigned long seed = 47114711;
200	  unsigned long this = seed * 1103515245 + 12345;
201	  seed = this;
202	/* cut-cut-cut - see the file RUN.psim */
203	}
204
205	Here is the current output generated with the -I switch on a P90
206	(the compiler used is the development version of GCC with a new
207	scheduler replacing the old one):
208	
209	CPU #1 executed     41,994 AND instructions.
210	CPU #1 executed    519,785 AND Immediate instructions.
211	.
212	.
213	.
214	CPU #1 executed          1 System Call instruction.
215	CPU #1 executed    207,746 XOR instructions.
216	
217	CPU #1 executed 23,740,856 cycles.
218	CPU #1 executed 10,242,780 stalls waiting for data.
219	CPU #1 executed          1 stall waiting for a function unit.
220	.
221	.
222	.
223	CPU #1 executed  3,136,229 branch functional unit instructions.
224	CPU #1 executed 16,949,396 instructions that were accounted for in timing info.
225	CPU #1 executed    871,920 data reads.
226	CPU #1 executed    971,926 data writes.
227	CPU #1 executed        221 icache misses.
228	CPU #1 executed 16,949,396 instructions in total.
229	
230	Simulator speed was 250,731 instructions/second
231
232
233    What motivated PSIM?
234
235	As an idea, psim was first discussed seriously during mid
236	1994.  At that time its main objectives were:
237
238
239		o	good performance
240
241			Many simulators loose out by only providing
242			a binary interface to the internals.  This
243			interface eventually becomes a bottle neck
244			in the simulators performance.
245
246			It was intended that PSIM would avoid this
247			problem by giving the user access to the
248			full source code.
249
250			Further, by exploiting the power of modern
251			compilers it was hoped that PSIM would achieve
252			good performance with out having to compromise
253			its internal design.
254
255
256		o	practical portability
257
258			Rather than try to be portable to every
259			C compiler on every platform, it was decided
260			that PSIM would restrict its self to supporting
261			ANSI compilers that included the extension
262			of a long long type.
263
264			GCC is one such compiler, consequently PSIM
265			should be portable to any machine running GCC.
266
267
268		o	flexibility in its design
269
270			PSIM should allow the user to select the
271			features required and customise the build
272			accordingly.  By having the source code,
273			the compiler is able to eliminate any un
274			used features of the simulator.
275
276			After all, let the compiler do the work.
277
278
279		o	SMP
280
281			A model that allowed the simulation of
282			SMP platforms with out the large overhead
283			often encountered with such models.
284
285
286	PSIM achieves each of these objectives.
287
288
289    Is PSIM PowerPC Platform (PPCP) (nee CHRP) Compliant?
290
291	No.
292
293	Among other things it does not have an Apple ROM socket.
294
295
296    Could PSIM be extended so that it models a CHRP machine?
297
298	Yes.
299
300	PSIM has been designed with the CHRP spec in mind. To model
301	a CHRP desktop the following would need to be added:
302
303		o	An apple ROM socket :-)
304
305		o	Model of each of the desktop IO devices
306
307		o	An OpenPIC device.
308
309		o	RTAS (Run Time Abstraction Services).
310
311		o	A fully populated device tree.
312
313
314    Is the source code available?
315
316	Yes.
317
318	The source code to PSIM is available under the terms of
319	the GNU Public Licence.  This allows you to distribute
320	the source code for free but with certain conditions.
321
322	See the file:
323
324		ftp://archie.au/gnu/COPYING
325
326	For details of the terms and conditions.
327
328
329    Where do I send bugs or report problems?
330
331	There is a mailing list (subscribe through majordomo@ci.com.au) at:
332
333	powerpc-psim@ci.com.au
334
335	If I get the ftp archive updated I post a note to that mailing list.
336	In addition your welcome to send bugs or problems either to me or to
337	that e-mail list.
338
339	This list currently averages zero articles a day.
340
341
342     Does PSIM have any limitations or problems?
343
344	PSIM can't run rs6000/AIX binaries - At present PSIM can only
345	simulate static executables.  Since an AIX executable is
346	never static, PSIM is unable to simulate its execution.
347
348	PSIM is still under development - consequently there are going
349	to be bugs.
350
351	See the file BUGS (included in the distribution) for any
352	other outstanding issues.
353
354