1/* This file is part of the program psim. 2 3 Copyright (C) 1994,1995,1996, Andrew Cagney <cagney@highland.com.au> 4 5 This program is free software; you can redistribute it and/or modify 6 it under the terms of the GNU General Public License as published by 7 the Free Software Foundation; either version 2 of the License, or 8 (at your option) any later version. 9 10 This program is distributed in the hope that it will be useful, 11 but WITHOUT ANY WARRANTY; without even the implied warranty of 12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 GNU General Public License for more details. 14 15 You should have received a copy of the GNU General Public License 16 along with this program; if not, write to the Free Software 17 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 18 19 */ 20 21 22/* What does the instruction look like - bit ordering and size */ 23extern int hi_bit_nr; 24extern int insn_bit_size; 25 26 27/* generation options: */ 28 29 30enum { 31 generate_with_direct_access = 0x1, 32 generate_with_icache = 0x2, 33 generate_with_semantic_icache = 0x4, 34 generate_with_insn_in_icache = 0x8, 35}; 36 37 38typedef enum { 39 40 /* Transfer control to an instructions semantic code using the the 41 standard call/return mechanism */ 42 43 generate_calls = 0x100, 44 45 /* In addition, when refering to fields access them directly instead 46 of via variables */ 47 48 generate_calls_with_direct_access 49 = generate_calls | generate_with_direct_access, 50 51 /* In addition, pre-decode an instructions opcode fields (entering 52 them into an icache) so that semantic code can avoid the need to 53 re-decode fields each time it is executed */ 54 55 generate_calls_with_icache 56 = generate_calls | generate_with_icache, 57 58 /* In addition, the instruction decode code includes a duplicated 59 copy of the instructions semantic code. This avoids the need to 60 perform two calls (one to decode an instructions opcode fields 61 and one to execute the instruction) when there is a miss of the 62 icache */ 63 64 generate_calls_with_semantic_icache 65 = generate_calls_with_icache | generate_with_semantic_icache, 66 67 /* In addition, the semantic function refers to icache entries 68 directly instead of first moving them into local variables */ 69 70 generate_calls_with_direct_access_icache 71 = generate_calls_with_icache | generate_with_direct_access, 72 73 generate_calls_with_direct_access_semantic_icache 74 = generate_calls_with_direct_access_icache | generate_with_semantic_icache, 75 76 77 /* Transfer control to an instructions semantic code using 78 (computed) goto's instead of the more conventional call/return 79 mechanism */ 80 81 generate_jumps = 0x200, 82 83 /* As for generate jumps but with instruction fields accessed 84 directly */ 85 86 generate_jumps_with_direct_access 87 = generate_jumps | generate_with_direct_access, 88 89 /* As for generate_calls_with_icache but applies to jumping code */ 90 91 generate_jumps_with_icache 92 = generate_jumps | generate_with_icache, 93 94 /* As for generate_calls_with_semantic_icache but applies to jumping 95 code */ 96 97 generate_jumps_with_semantic_icache 98 = generate_jumps_with_icache | generate_with_semantic_icache, 99 100 /* As for generate_calls_with_direct_access */ 101 102 generate_jumps_with_direct_access_icache 103 = generate_jumps_with_icache | generate_with_direct_access, 104 105 generate_jumps_with_direct_access_semantic_icache 106 = generate_jumps_with_direct_access_icache | generate_with_semantic_icache, 107 108} igen_code; 109 110extern igen_code code; 111 112 113 114 115extern int icache_size; 116 117 118/* Instruction expansion? 119 120 Should the semantic code for each instruction, when the oportunity 121 arrises, be expanded according to the variable opcode files that 122 the instruction decode process renders constant */ 123 124extern int generate_expanded_instructions; 125 126 127/* SMP? 128 129 Should the generated code include SMP support (>0) and if so, for 130 how many processors? */ 131 132extern int generate_smp; 133 134 135 136 137/* Misc junk */ 138 139 140 141/* Function header definitions */ 142 143 144/* Cache functions: */ 145 146#define ICACHE_FUNCTION_FORMAL \ 147"cpu *processor,\n\ 148 instruction_word instruction,\n\ 149 unsigned_word cia,\n\ 150 idecode_cache *cache_entry" 151 152#define ICACHE_FUNCTION_ACTUAL "processor, instruction, cia, cache_entry" 153 154#define ICACHE_FUNCTION_TYPE \ 155((code & generate_with_semantic_icache) \ 156 ? SEMANTIC_FUNCTION_TYPE \ 157 : "idecode_semantic *") 158 159 160/* Semantic functions: */ 161 162#define SEMANTIC_FUNCTION_FORMAL \ 163((code & generate_with_icache) \ 164 ? "cpu *processor,\n idecode_cache *cache_entry,\n unsigned_word cia" \ 165 : "cpu *processor,\n instruction_word instruction,\n unsigned_word cia") 166 167#define SEMANTIC_FUNCTION_ACTUAL \ 168((code & generate_with_icache) \ 169 ? "processor, instruction, cia, cache_entry" \ 170 : "processor, instruction, cia") 171 172#define SEMANTIC_FUNCTION_TYPE "unsigned_word" 173 174 175 176extern void print_my_defines 177(lf *file, 178 insn_bits *expanded_bits, 179 table_entry *file_entry); 180 181extern void print_itrace 182(lf *file, 183 table_entry *file_entry, 184 int idecode); 185 186 187typedef enum { 188 function_name_prefix_semantics, 189 function_name_prefix_idecode, 190 function_name_prefix_itable, 191 function_name_prefix_icache, 192 function_name_prefix_none 193} lf_function_name_prefixes; 194 195extern int print_function_name 196(lf *file, 197 const char *basename, 198 insn_bits *expanded_bits, 199 lf_function_name_prefixes prefix); 200