/freebsd-11-stable/sys/contrib/ena-com/ena_defs/ |
H A D | ena_admin_defs.h | 1132 uint32_t reg_val; member in struct:ena_admin_ena_mmio_req_read_less_resp
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/freebsd-11-stable/sys/contrib/ena-com/ |
H A D | ena_com.c | 910 ret = read_resp->reg_val;
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/freebsd-11-stable/sys/dev/usb/net/ |
H A D | if_smsc.c | 1358 uint32_t reg_val; local 1390 if ((err = smsc_read_reg(sc, SMSC_HW_CFG, ®_val)) != 0) { 1394 reg_val |= SMSC_HW_CFG_BIR; 1395 smsc_write_reg(sc, SMSC_HW_CFG, reg_val); 1423 if ((err = smsc_read_reg(sc, SMSC_HW_CFG, ®_val)) < 0) { 1431 reg_val &= ~SMSC_HW_CFG_RXDOFF; 1432 reg_val |= (ETHER_ALIGN << 9) & SMSC_HW_CFG_RXDOFF; 1437 reg_val |= (SMSC_HW_CFG_MEF | SMSC_HW_CFG_BCE); 1439 smsc_write_reg(sc, SMSC_HW_CFG, reg_val); 1455 reg_val [all...] |
/freebsd-11-stable/contrib/llvm-project/lldb/source/Plugins/Process/Utility/ |
H A D | RegisterContextLLDB.cpp | 304 addr_t reg_val; local 305 if (ReadGPRValue(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_FP, reg_val)) 306 UnwindLogMsg("fp = 0x%" PRIx64, reg_val); 307 if (ReadGPRValue(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, reg_val)) 308 UnwindLogMsg("sp = 0x%" PRIx64, reg_val);
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/freebsd-11-stable/contrib/llvm-project/lldb/source/Plugins/LanguageRuntime/RenderScript/RenderScriptRuntime/ |
H A D | RenderScriptRuntime.cpp | 195 RegisterValue reg_val; local 196 if (ctx.reg_ctx->ReadRegister(reg, reg_val)) 197 arg.value = reg_val.GetAsUInt64(0, &success); 239 RegisterValue reg_val; local 240 if (ctx.reg_ctx->ReadRegister(reg, reg_val)) 241 arg.value = reg_val.GetAsUInt32(0, &success); 278 RegisterValue reg_val; local 279 if (ctx.reg_ctx->ReadRegister(reg, reg_val)) 280 arg.value = reg_val.GetAsUInt64(0, &success); 318 RegisterValue reg_val; local 362 RegisterValue reg_val; local [all...] |
/freebsd-11-stable/contrib/llvm-project/lldb/source/Plugins/Instruction/ARM/ |
H A D | EmulateInstructionARM.cpp | 2906 uint32_t reg_val = ReadCoreReg(Bits32(opcode, 2, 0), &success); local 2929 if (m_ignore_conditions || (nonzero ^ (reg_val == 0))) 3330 uint32_t reg_val = ReadCoreReg(Rn, &success); local 3334 AddWithCarryResult res = AddWithCarry(reg_val, imm32, 0); 3447 uint32_t reg_val = ReadCoreReg(Rn, &success); local 3451 AddWithCarryResult res = AddWithCarry(reg_val, ~imm32, 1); 9222 uint32_t reg_val = ReadCoreReg(Rn, &success); local 9226 AddWithCarryResult res = AddWithCarry(~reg_val, imm32, 1); 9359 uint32_t reg_val = ReadCoreReg(Rn, &success); local 9363 AddWithCarryResult res = AddWithCarry(~reg_val, imm3 9496 uint32_t reg_val = ReadCoreReg(Rn, &success); local 9672 uint32_t reg_val = ReadCoreReg(Rn, &success); local 9739 uint32_t reg_val = ReadCoreReg(Rn, &success); local [all...] |
/freebsd-11-stable/contrib/llvm-project/lldb/source/Plugins/ABI/SysV-ppc64/ |
H A D | ABISysV_ppc64.cpp | 455 RegisterValue reg_val; local 456 if (!m_reg_ctx->ReadRegister(reg_info, reg_val)) { 462 uint32_t rc = reg_val.GetAsMemoryData(
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/freebsd-11-stable/contrib/llvm-project/lldb/source/Core/ |
H A D | DumpRegisterValue.cpp | 18 bool lldb_private::DumpRegisterValue(const RegisterValue ®_val, Stream *s, argument 24 if (reg_val.GetData(data)) {
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/freebsd-11-stable/contrib/llvm-project/lldb/include/lldb/Core/ |
H A D | DumpRegisterValue.h | 23 bool DumpRegisterValue(const RegisterValue ®_val, Stream *s,
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/freebsd-11-stable/sys/dev/ixl/ |
H A D | i40e_common.c | 1161 u32 reg_val; local 1168 reg_val = rd32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block)); 1169 reg_val &= ~I40E_GLLAN_TXPRE_QDIS_QINDX_MASK; 1170 reg_val |= (abs_queue_idx << I40E_GLLAN_TXPRE_QDIS_QINDX_SHIFT); 1173 reg_val |= I40E_GLLAN_TXPRE_QDIS_CLEAR_QDIS_MASK; 1175 reg_val |= I40E_GLLAN_TXPRE_QDIS_SET_QDIS_MASK; 1177 wr32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block), reg_val); 3338 * @reg_val: register value 3344 u32 reg_addr, u64 *reg_val, 3352 if (reg_val 3343 i40e_aq_debug_read_register(struct i40e_hw *hw, u32 reg_addr, u64 *reg_val, struct i40e_asq_cmd_details *cmd_details) argument 3378 i40e_aq_debug_write_register(struct i40e_hw *hw, u32 reg_addr, u64 reg_val, struct i40e_asq_cmd_details *cmd_details) argument 6496 u32 reg_val = rd32(hw, I40E_GLGEN_MDIO_I2C_SEL(port_num)); local 6581 i40e_led_get_reg(struct i40e_hw *hw, u16 led_addr, u32 *reg_val) argument 6610 i40e_led_set_reg(struct i40e_hw *hw, u16 led_addr, u32 reg_val) argument 6648 u16 reg_val; local 6850 i40e_aq_rx_ctl_read_register(struct i40e_hw *hw, u32 reg_addr, u32 *reg_val, struct i40e_asq_cmd_details *cmd_details) argument 6916 i40e_aq_rx_ctl_write_register(struct i40e_hw *hw, u32 reg_addr, u32 reg_val, struct i40e_asq_cmd_details *cmd_details) argument 6941 i40e_write_rx_ctl(struct i40e_hw *hw, u32 reg_addr, u32 reg_val) argument 6978 i40e_aq_set_phy_register(struct i40e_hw *hw, u8 phy_select, u8 dev_addr, bool page_change, u32 reg_addr, u32 reg_val, struct i40e_asq_cmd_details *cmd_details) argument 7016 i40e_aq_get_phy_register(struct i40e_hw *hw, u8 phy_select, u8 dev_addr, bool page_change, u32 reg_addr, u32 *reg_val, struct i40e_asq_cmd_details *cmd_details) argument [all...] |
H A D | i40e_prototype.h | 120 u32 reg_addr, u64 reg_val, 123 u32 reg_addr, u64 *reg_val, 552 u32 reg_addr, u32 *reg_val, 556 u32 reg_addr, u32 reg_val, 558 void i40e_write_rx_ctl(struct i40e_hw *hw, u32 reg_addr, u32 reg_val); 561 u32 reg_addr, u32 reg_val, 565 u32 reg_addr, u32 *reg_val,
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/freebsd-11-stable/sys/dev/ntb/ntb_hw/ |
H A D | ntb_hw_intel.c | 1690 uint64_t reg_val; local 1703 reg_val = intel_ntb_reg_read(4, base_reg); 1704 (void)reg_val; 1707 reg_val = intel_ntb_reg_read(4, lmt_reg); 1708 (void)reg_val; 1711 reg_val = intel_ntb_reg_read(8, base_reg); 1712 (void)reg_val; 1715 reg_val = intel_ntb_reg_read(8, lmt_reg); 1716 (void)reg_val; 2104 uint16_t reg_val; local 2844 uint64_t base, limit, reg_val; local [all...] |
/freebsd-11-stable/sys/dev/vnic/ |
H A D | thunder_bgx.c | 255 uint64_t reg_val; local 258 reg_val = bgx_reg_read(bgx, lmac, reg); 259 if (zero && !(reg_val & mask)) 261 if (!zero && (reg_val & mask))
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H A D | nicvf_queues.c | 130 uint64_t reg_val; local 137 reg_val = nicvf_queue_reg_read(nic, reg, qidx); 138 if (((reg_val & bit_mask) >> bit_pos) == val) 2046 uint64_t reg_val; local 2048 reg_val = nicvf_reg_read(nic, NIC_VF_ENA_W1S); 2052 reg_val |= ((1UL << q_idx) << NICVF_INTR_CQ_SHIFT); 2055 reg_val |= ((1UL << q_idx) << NICVF_INTR_SQ_SHIFT); 2058 reg_val |= ((1UL << q_idx) << NICVF_INTR_RBDR_SHIFT); 2061 reg_val |= (1UL << NICVF_INTR_PKT_DROP_SHIFT); 2064 reg_val | 2085 uint64_t reg_val = 0; local 2122 uint64_t reg_val = 0; local 2159 uint64_t reg_val; local [all...] |
/freebsd-11-stable/sys/dev/iwm/ |
H A D | if_iwm.c | 1362 uint32_t reg_val = 0; local 1373 reg_val |= IWM_CSR_HW_REV_STEP(sc->sc_hw_rev) << 1375 reg_val |= IWM_CSR_HW_REV_DASH(sc->sc_hw_rev) << 1379 reg_val |= radio_cfg_type << IWM_CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE; 1380 reg_val |= radio_cfg_step << IWM_CSR_HW_IF_CONFIG_REG_POS_PHY_STEP; 1381 reg_val |= radio_cfg_dash << IWM_CSR_HW_IF_CONFIG_REG_POS_PHY_DASH; 1383 IWM_WRITE(sc, IWM_CSR_HW_IF_CONFIG_REG, reg_val);
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/freebsd-11-stable/sys/dev/ixgbe/ |
H A D | ixgbe_common.c | 1113 u32 reg_val; local 1139 reg_val = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i)); 1140 reg_val &= ~IXGBE_RXDCTL_ENABLE; 1141 reg_val |= IXGBE_RXDCTL_SWFLSH; 1142 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(i), reg_val); 3387 * @reg_val: Value we read from AUTOC 3391 s32 prot_autoc_read_generic(struct ixgbe_hw *hw, bool *locked, u32 *reg_val) argument 3394 *reg_val = IXGBE_READ_REG(hw, IXGBE_AUTOC); 3401 * @reg_val: value to write to AUTOC 3407 s32 prot_autoc_write_generic(struct ixgbe_hw *hw, u32 reg_val, boo argument [all...] |
H A D | ixgbe_82599.c | 244 * @reg_val: Value we read from AUTOC 250 s32 prot_autoc_read_82599(struct ixgbe_hw *hw, bool *locked, u32 *reg_val) argument 265 *reg_val = IXGBE_READ_REG(hw, IXGBE_AUTOC); 272 * @reg_val: value to write to AUTOC
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H A D | ixgbe_x550.c | 2237 u32 reg_val; local 2241 IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); 2245 reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_ENABLE; 2246 reg_val &= ~(IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_KR | 2251 reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_KR; 2255 reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_KX; 2259 IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); 2265 IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); 2270 reg_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_MASK; 2271 reg_val | 2711 u16 reg_slice, reg_val; local 2755 u32 reg_val; local 2905 u32 reg_val; local 2976 u32 reg_val; local 3134 u32 reg_val; local 3980 u32 pause, asm_dir, reg_val; local [all...] |
H A D | ixgbe_vf.c | 252 u32 reg_val; local 273 reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFRXDCTL(i)); 274 reg_val &= ~IXGBE_RXDCTL_ENABLE; 275 IXGBE_VFWRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val);
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/freebsd-11-stable/usr.sbin/cxgbetool/ |
H A D | cxgbetool.c | 273 uint32_t reg_val = 0; local 277 reg_val = regs[reg_array->addr / 4]; 279 reg_array->name, reg_val, reg_val); 281 uint32_t v = xtract(reg_val, reg_array->addr,
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/freebsd-11-stable/sys/dev/bxe/ |
H A D | bxe.c | 19018 uint32_t reg_val; local 19184 reg_val = REG_RD(sc, reg_addr); 19185 BLOGI(sc, "DMAE_REG_CMD_MEM i=%d reg_addr 0x%x reg_val 0x%08x\n",i, 19186 reg_addr, reg_val); 19488 reg_rdw_p->reg_val = REG_RD(sc, reg_rdw_p->reg_id); 19492 REG_WR(sc, reg_rdw_p->reg_id, reg_rdw_p->reg_val);
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/freebsd-11-stable/sys/dev/qlnx/qlnxe/ |
H A D | ecore_init_fw_funcs.c | 661 u32 reg_val, i; local 663 for (i = 0, reg_val = 0; i < QM_STOP_CMD_MAX_POLL_COUNT && !reg_val; i++) { 665 reg_val = ecore_rd(p_hwfn, p_ptt, QM_REG_SDMCMDREADY); 1301 u32 reg_val; local 1304 reg_val = ecore_rd(p_hwfn, p_ptt, PRS_REG_ENCAPSULATION_TYPE_EN); 1305 SET_TUNNEL_TYPE_ENABLE_BIT(reg_val, PRS_REG_ENCAPSULATION_TYPE_EN_VXLAN_ENABLE_SHIFT, vxlan_enable); 1306 ecore_wr(p_hwfn, p_ptt, PRS_REG_ENCAPSULATION_TYPE_EN, reg_val); 1307 if (reg_val) /* TODO: handle E5 init */ 1309 reg_val 1332 u32 reg_val; local 1381 u32 reg_val; local 1419 u32 reg_val, cfg_mask; local 1495 u32 reg_val, cam_line, ram_line_lo, ram_line_hi; local 1805 u32 * reg_val; local [all...] |
H A D | ecore_dbg_fw_funcs.c | 2237 u32 reg_val[MAX_DBG_RESET_REGS] = { 0 }; local 2243 reg_val[i] = ecore_rd(p_hwfn, p_ptt, s_reset_regs_defs[i].addr); 2249 dev_data->block_in_reset[i] = block->has_reset_bit && !(reg_val[block->reset_reg] & (1 << block->reset_bit_offset)); 2869 u32 reg_val[MAX_DBG_RESET_REGS] = { 0 }; local 2877 reg_val[block->reset_reg] |= (1 << block->reset_bit_offset); 2885 reg_val[i] |= s_reset_regs_defs[i].unreset_val[dev_data->chip_id]; 2887 if (reg_val[i]) 2888 ecore_wr(p_hwfn, p_ptt, s_reset_regs_defs[i].addr + RESET_REG_UNRESET_OFFSET, reg_val[i]); 3845 u32 block_size, ram_size, offset = 0, reg_val, i; local 3853 reg_val [all...] |
/freebsd-11-stable/sys/dev/e1000/ |
H A D | e1000_82575.c | 2277 u32 reg_val, reg_offset; local 2291 reg_val = E1000_READ_REG(hw, reg_offset); 2293 reg_val |= (E1000_DTXSWC_MAC_SPOOF_MASK | 2298 reg_val ^= (1 << pf | 1 << (pf + MAX_NUM_VFS)); 2300 reg_val &= ~(E1000_DTXSWC_MAC_SPOOF_MASK | 2303 E1000_WRITE_REG(hw, reg_offset, reg_val);
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/freebsd-11-stable/sys/dev/liquidio/base/ |
H A D | cn23xx_pf_device.c | 143 uint64_t reg_val; local 151 reg_val = 155 reg_val = pf_num * LIO_CN23XX_PF_MAX_RINGS; 158 reg_val = reg_val | 163 reg_val); 198 volatile uint64_t reg_val = local 201 while ((reg_val & LIO_CN23XX_PKT_INPUT_CTL_RST) && 202 !(reg_val & LIO_CN23XX_PKT_INPUT_CTL_QUIET) && 204 reg_val 238 uint64_t pf_num, reg_val; local 306 uint32_t ern, q_no, reg_val, srn; local 457 uint32_t reg_val; local 506 uint64_t reg_val; local 570 uint32_t reg_val; local [all...] |