Searched refs:port_base (Results 1 - 19 of 19) sorted by relevance

/linux-master/drivers/net/ethernet/silan/
H A Dsc92031.c266 void __iomem *port_base; member in struct:sc92031_priv
309 static inline void _sc92031_dummy_read(void __iomem *port_base) argument
311 ioread32(port_base + MAC0);
314 static u32 _sc92031_mii_wait(void __iomem *port_base) argument
320 mii_status = ioread32(port_base + Miistatus);
326 static u32 _sc92031_mii_cmd(void __iomem *port_base, u32 cmd0, u32 cmd1) argument
328 iowrite32(Mii_Divider, port_base + Miicmd0);
330 _sc92031_mii_wait(port_base);
332 iowrite32(cmd1, port_base + Miicmd1);
333 iowrite32(Mii_Divider | cmd0, port_base
338 _sc92031_mii_scan(void __iomem *port_base) argument
343 _sc92031_mii_read(void __iomem *port_base, unsigned reg) argument
348 _sc92031_mii_write(void __iomem *port_base, unsigned reg, u16 val) argument
356 void __iomem *port_base = priv->port_base; local
374 void __iomem *port_base = priv->port_base; local
387 void __iomem *port_base = priv->port_base; local
398 void __iomem *port_base = priv->port_base; local
420 void __iomem *port_base = priv->port_base; local
458 void __iomem *port_base = priv->port_base; local
488 void __iomem *port_base = priv->port_base; local
553 void __iomem *port_base = priv->port_base; local
597 void __iomem *port_base = priv->port_base; local
650 void __iomem *port_base = priv->port_base; local
723 void __iomem *port_base = priv->port_base; local
837 void __iomem *port_base = priv->port_base; local
877 void __iomem *port_base = priv->port_base; local
909 void __iomem *port_base = priv->port_base; local
936 void __iomem *port_base = priv->port_base; local
1122 void __iomem *port_base = priv->port_base; local
1185 void __iomem *port_base = priv->port_base; local
1258 void __iomem *port_base = priv->port_base; local
1285 void __iomem *port_base = priv->port_base; local
1315 void __iomem *port_base = priv->port_base; local
1400 void __iomem* port_base; local
1497 void __iomem* port_base = priv->port_base; local
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/linux-master/drivers/scsi/pcmcia/
H A Dsym53c500_cs.c356 int port_base = dev->io_port; local
367 REG1(port_base);
368 pio_status = inb(port_base + PIO_STATUS);
369 REG0(port_base);
370 status = inb(port_base + STAT_REG);
371 DEB(seq_reg = inb(port_base + SEQ_REG));
372 int_reg = inb(port_base + INT_REG);
373 DEB(fifo_size = inb(port_base + FIFO_FLAGS) & 0x1f);
424 outb(FLUSH_FIFO, port_base + CMD_REG);
425 LOAD_DMA_COUNT(port_base, scsi_buffle
551 int port_base = SCpnt->device->host->io_port; local
588 int port_base = SCpnt->device->host->io_port; local
703 int irq_level, port_base; local
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/linux-master/drivers/ata/
H A Dsata_inic162x.c271 static void inic_reset_port(void __iomem *port_base) argument
273 void __iomem *idma_ctl = port_base + PORT_IDMA_CTL;
288 writeb(0xff, port_base + PORT_IRQ_STAT);
319 void __iomem *port_base = inic_port_base(ap); local
321 readb(port_base + PORT_RPQ_FIFO);
322 readb(port_base + PORT_RPQ_CNT);
323 writew(0, port_base + PORT_IDMA_CTL);
384 void __iomem *port_base = inic_port_base(ap); local
390 irq_stat = readb(port_base + PORT_IRQ_STAT);
391 writeb(irq_stat, port_base
546 void __iomem *port_base = inic_port_base(ap); local
558 void __iomem *port_base = inic_port_base(ap); local
591 void __iomem *port_base = inic_port_base(ap); local
599 void __iomem *port_base = inic_port_base(ap); local
607 void __iomem *port_base = inic_port_base(link->ap); local
620 void __iomem *port_base = inic_port_base(ap); local
664 void __iomem *port_base = inic_port_base(ap); local
679 void __iomem *port_base = inic_port_base(ap); local
777 void __iomem *port_base = mmio_base + i * PORT_SIZE; local
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H A Dpdc_adma.c585 void __iomem *port_base = ADMA_ATA_REGS(mmio_base, port_no); local
586 unsigned int offset = port_base - mmio_base;
588 adma_ata_setup_port(&ap->ioaddr, port_base);
H A Dsata_mv.c1258 void __iomem *port_base; local
1282 port_base = mv_port_base(mmio_base, p);
1284 mv_dump_mem(&pdev->dev, port_base, 0x54);
1286 mv_dump_mem(&pdev->dev, port_base+0x300, 0x60);
/linux-master/include/linux/dsa/
H A Dloop.h36 unsigned int port_base; member in struct:dsa_loop_priv
/linux-master/drivers/phy/mediatek/
H A Dphy-mtk-xsphy.c86 void __iomem *port_base; member in struct:xsphy_instance
112 void __iomem *pbase = inst->port_base;
170 void __iomem *pbase = inst->port_base;
181 void __iomem *pbase = inst->port_base;
196 void __iomem *pbase = inst->port_base;
214 tmp = readl(inst->port_base + XSP_U2PHYDTM1);
229 writel(tmp, inst->port_base + XSP_U2PHYDTM1);
271 void __iomem *pbase = inst->port_base;
293 void __iomem *pbase = inst->port_base;
500 inst->port_base
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H A Dphy-mtk-tphy.c312 void __iomem *port_base; member in struct:mtk_phy_instance
1097 u2_banks->com = instance->port_base + SSUSB_SIFSLV_V1_U2PHY_COM;
1103 u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V1_U3PHYD;
1104 u3_banks->phya = instance->port_base + SSUSB_SIFSLV_V1_U3PHYA;
1107 u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V1_U3PHYD;
1123 u2_banks->misc = instance->port_base + SSUSB_SIFSLV_V2_MISC;
1124 u2_banks->fmreg = instance->port_base + SSUSB_SIFSLV_V2_U2FREQ;
1125 u2_banks->com = instance->port_base + SSUSB_SIFSLV_V2_U2PHY_COM;
1129 u3_banks->spllc = instance->port_base + SSUSB_SIFSLV_V2_SPLLC;
1130 u3_banks->chip = instance->port_base
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/linux-master/drivers/net/ethernet/ti/
H A Dam65-cpsw-qos.c46 writel(0, port->port_base + AM65_CPSW_PN_REG_PRI_CIR(prio));
47 writel(0, port->port_base + AM65_CPSW_PN_REG_PRI_EIR(prio));
86 port->port_base + AM65_CPSW_PN_REG_PRI_CIR(prio));
98 port->port_base + AM65_CPSW_PN_REG_PRI_EIR(prio));
197 writel(0, port->port_base + AM65_CPSW_PN_REG_TX_PRI_MAP);
259 writel(tx_prio_map, port->port_base + AM65_CPSW_PN_REG_TX_PRI_MAP);
287 writel(val, port->port_base + AM65_CPSW_PN_REG_IET_VERIFY);
302 ctrl = readl(port->port_base + AM65_CPSW_PN_REG_IET_CTRL);
304 writel(ctrl, port->port_base + AM65_CPSW_PN_REG_IET_CTRL);
307 ctrl = readl(port->port_base
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H A Dam65-cpsw-nuss.h49 void __iomem *port_base; member in struct:am65_cpsw_port
65 void __iomem *port_base; member in struct:am65_cpsw_host
H A Dam65-cpsw-ethtool.c751 val = readl(port->port_base + AM65_CPSW_PN_REG_CTL);
757 writel(val, port->port_base + AM65_CPSW_PN_REG_CTL);
765 val = readl(port->port_base + AM65_CPSW_PN_REG_IET_CTRL);
771 writel(val, port->port_base + AM65_CPSW_PN_REG_IET_CTRL);
786 iet_ctrl = readl(port->port_base + AM65_CPSW_PN_REG_IET_CTRL);
787 port_ctrl = readl(port->port_base + AM65_CPSW_PN_REG_CTL);
792 iet_status = readl(port->port_base + AM65_CPSW_PN_REG_IET_STATUS);
848 iet->original_max_blks = readl(port->port_base + AM65_CPSW_PN_REG_MAX_BLKS);
851 port->port_base + AM65_CPSW_PN_REG_MAX_BLKS);
855 port->port_base
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H A Dam65-cpsw-switchdev.c124 pvid = readl(port->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET);
126 pvid = readl(host_p->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET);
144 writel(pvid, port->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET);
146 writel(pvid, host_p->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET);
H A Dam65-cpsw-nuss.c148 writel(mac_hi, slave->port_base + AM65_CPSW_PORTN_REG_SA_H);
149 writel(mac_lo, slave->port_base + AM65_CPSW_PORTN_REG_SA_L);
157 port->port_base + AM65_CPSW_PORT_REG_RX_MAXLEN);
349 val = readl(host_p->port_base + AM65_CPSW_PORT_REG_PRI_CTL);
363 writel(pri_map, host_p->port_base + AM65_CPSW_PORT_REG_RX_PRI_MAP);
364 writel(val, host_p->port_base + AM65_CPSW_PORT_REG_PRI_CTL);
459 host_p->port_base + AM65_CPSW_PORT_REG_RX_MAXLEN);
462 host_p->port_base + AM65_CPSW_PORT0_REG_FLOW_ID_OFFSET);
464 host_p->port_base + AM65_CPSW_P0_REG_CTL);
1408 writel(seq_id, port->port_base
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/linux-master/drivers/phy/ralink/
H A Dphy-mt7621-pci.c71 * @port_base: base register
81 void __iomem *port_base; member in struct:mt7621_pci_phy
276 mt7621_phy->port_base, mt7621_phy->has_dual_port);
311 phy->port_base = devm_platform_ioremap_resource(pdev, 0);
312 if (IS_ERR(phy->port_base)) {
314 return PTR_ERR(phy->port_base);
317 phy->regmap = devm_regmap_init_mmio(phy->dev, phy->port_base,
/linux-master/drivers/net/ethernet/hisilicon/
H A Dhisi_femac.c109 void __iomem *port_base; member in struct:hisi_femac_priv
161 val = readl(priv->port_base + ADDRQ_STAT) & TX_CNT_INUSE_MASK;
176 val = readl(priv->port_base + ADDRQ_STAT) & TX_CNT_INUSE_MASK;
204 writel(status, priv->port_base + MAC_PORTSET);
219 while (readl(priv->port_base + ADDRQ_STAT) & BIT_RX_READY) {
239 writel(addr, priv->port_base + IQ_ADDR);
255 rx_pkt_info = readl(priv->port_base + IQFRM_DES);
507 val = readl(priv->port_base + ADDRQ_STAT);
538 writel(addr, priv->port_base + EQ_ADDR);
539 writel(skb->len + ETH_FCS_LEN, priv->port_base
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/linux-master/drivers/net/dsa/
H A Ddsa_loop.c144 ret = mdiobus_read_nested(bus, ps->port_base + port, regnum);
160 ret = mdiobus_write_nested(bus, ps->port_base + port, regnum, value);
218 mdiobus_read(bus, ps->port_base + port, MII_BMSR);
247 mdiobus_read(bus, ps->port_base + port, MII_BMSR);
/linux-master/drivers/net/wireless/realtek/rtw89/
H A Dmac.c4055 const struct rtw89_port_reg *p = mac->port_base;
4077 const struct rtw89_port_reg *p = mac->port_base;
4110 const struct rtw89_port_reg *p = mac->port_base;
4148 const struct rtw89_port_reg *p = mac->port_base;
4160 const struct rtw89_port_reg *p = mac->port_base;
4172 const struct rtw89_port_reg *p = mac->port_base;
4182 const struct rtw89_port_reg *p = mac->port_base;
4196 const struct rtw89_port_reg *p = mac->port_base;
4211 const struct rtw89_port_reg *p = mac->port_base;
4232 const struct rtw89_port_reg *p = mac->port_base;
[all...]
H A Dmac.h915 const struct rtw89_port_reg *port_base; member in struct:rtw89_mac_gen_def
H A Dmac_be.c2552 .port_base = &rtw89_port_base_be,

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