Lines Matching refs:port_base

148 	writel(mac_hi, slave->port_base + AM65_CPSW_PORTN_REG_SA_H);
149 writel(mac_lo, slave->port_base + AM65_CPSW_PORTN_REG_SA_L);
157 port->port_base + AM65_CPSW_PORT_REG_RX_MAXLEN);
349 val = readl(host_p->port_base + AM65_CPSW_PORT_REG_PRI_CTL);
363 writel(pri_map, host_p->port_base + AM65_CPSW_PORT_REG_RX_PRI_MAP);
364 writel(val, host_p->port_base + AM65_CPSW_PORT_REG_PRI_CTL);
459 host_p->port_base + AM65_CPSW_PORT_REG_RX_MAXLEN);
462 host_p->port_base + AM65_CPSW_PORT0_REG_FLOW_ID_OFFSET);
464 host_p->port_base + AM65_CPSW_P0_REG_CTL);
1408 writel(seq_id, port->port_base + AM65_CPSW_PORTN_REG_TS_SEQ_LTYPE_REG);
1409 writel(ts_vlan_ltype, port->port_base +
1411 writel(ts_ctrl_ltype2, port->port_base +
1413 writel(ts_ctrl, port->port_base + AM65_CPSW_PORTN_REG_TS_CTL);
2001 host_p->port_base = common->cpsw_base + AM65_CPSW_NU_PORTS_BASE;
2111 port->port_base = common->cpsw_base + AM65_CPSW_NU_PORTS_BASE +
2122 port->slave.mac_sl = cpsw_sl_get("am65", dev, port->port_base);
2175 writel(0, port->port_base + AM65_CPSW_PN_REG_TX_PRI_MAP);
2504 writel(common->default_vlan, host->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET);
2517 writel(0, host->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET);
2548 writel(slave->port_vlan, port->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET);
2584 writel(slave->port_vlan, port->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET);
3143 host_p->vid_context = readl(host_p->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET);
3151 port->vid_context = readl(port->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET);
3211 writel(port->vid_context, port->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET);
3214 writel(host_p->vid_context, host_p->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET);