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00ca8a15 |
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17-Feb-2024 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
phy: constify of_phandle_args in xlate The xlate callbacks are supposed to translate of_phandle_args to proper provider without modifying the of_phandle_args. Make the argument pointer to const for code safety and readability. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Florian Fainelli <florian.fainelli@broadcom.com> #Broadcom Link: https://lore.kernel.org/r/20240217093937.58234-1-krzysztof.kozlowski@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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c221baa3 |
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20-Sep-2022 |
Chunfeng Yun <chunfeng.yun@mediatek.com> |
phy: mediatek: xsphy: remove macros used to prepare bitfield value Prefer to make use of FIELD_PREP() macro to prepare bitfield value, then no need local ones anymore. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Link: https://lore.kernel.org/r/20220920090038.15133-4-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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9520bbf3 |
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18-Dec-2021 |
Chunfeng Yun <chunfeng.yun@mediatek.com> |
phy: phy-mtk-xsphy: use new io helpers to access register Use new helpers mtk_phy_clear/set/update_bits() to access registers Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Link: https://lore.kernel.org/r/20211218082802.5256-4-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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79a5a18a |
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19-Nov-2018 |
Grygorii Strashko <grygorii.strashko@ti.com> |
phy: core: rework phy_set_mode to accept phy mode and submode Currently the attempt to add support for Ethernet interface mode PHY (MII/GMII/RGMII) will lead to the necessity of extending enum phy_mode and duplicate there values from phy_interface_t enum (or introduce more PHY callbacks) [1]. Both approaches are ineffective and would lead to fast bloating of enum phy_mode or struct phy_ops in the process of adding more PHYs for different subsystems which will make them unmaintainable. As discussed in [1] the solution could be to introduce dual level PHYs mode configuration - PHY mode and PHY submode. The PHY mode will define generic PHY type (subsystem - PCIE/ETHERNET/USB_) while the PHY submode - subsystem specific interface mode. The last is usually already defined in corresponding subsystem headers (phy_interface_t for Ethernet, enum usb_device_speed for USB). This patch is cumulative change which refactors PHY framework code to support dual level PHYs mode configuration - PHY mode and PHY submode. It extends .set_mode() callback to support additional parameter "int submode" and converts all corresponding PHY drivers to support new .set_mode() callback declaration. The new extended PHY API int phy_set_mode_ext(struct phy *phy, enum phy_mode mode, int submode) is introduced to support dual level PHYs mode configuration and existing phy_set_mode() API is converted to macros, so PHY framework consumers do not need to be changed (~21 matches). [1] http://lkml.kernel.org/r/d63588f6-9ab0-848a-5ad4-8073143bd95d@ti.com Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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c1eb8f83 |
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10-May-2018 |
Chunfeng Yun <chunfeng.yun@mediatek.com> |
phy: mediatek: add XS-PHY driver Support XS-PHY for MediaTek SoCs with USB3.1 GEN2 controller Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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