Searched refs:UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK (Results 1 - 25 of 25) sorted by last modified time

/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v4_0_5.c864 tmp = (UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK |
1004 UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK |
H A Dvcn_v5_0_0.c647 tmp = (UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK |
759 UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK |
H A Dvcn_v4_0_3.c758 tmp = (UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK |
1088 tmp | UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK |
H A Dvcn_v3_0.c978 tmp = (0x8 | UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK |
1146 UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK |
H A Dvcn_v4_0.c950 tmp = (UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK |
1093 UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK |
H A Dvcn_v2_5.c855 tmp = (0x8 | UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK |
1013 UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK |
H A Dvcn_v2_0.c827 tmp = (UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK |
964 UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK |
H A Dvcn_v1_0.c814 UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK |
996 UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK |
1051 UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK |
H A Duvd_v6_0.c768 UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK |
H A Duvd_v7_0.c893 UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK |
1008 UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK |
/linux-master/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_5_0_0_sh_mask.h4246 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK 0x00000100L macro
H A Dvcn_4_0_5_sh_mask.h4674 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK 0x00000100L macro
H A Dvcn_4_0_0_sh_mask.h4832 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK 0x00000100L macro
H A Dvcn_4_0_3_sh_mask.h4875 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK 0x00000100L macro
[all...]
H A Dvcn_2_5_sh_mask.h3364 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK 0x00000100L macro
H A Dvcn_2_6_0_sh_mask.h956 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK 0x00000100L macro
H A Dvcn_3_0_0_sh_mask.h4679 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK 0x00000100L macro
H A Dvcn_2_0_0_sh_mask.h2413 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK 0x00000100L macro
H A Dvcn_1_0_sh_mask.h1042 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK 0x00000100L macro
/linux-master/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h520 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK 0x00000100L macro
H A Duvd_3_1_sh_mask.h347 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK 0x100 macro
H A Duvd_4_0_sh_mask.h348 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK 0x00000100L macro
H A Duvd_4_2_sh_mask.h351 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK 0x100 macro
H A Duvd_5_0_sh_mask.h383 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK 0x100 macro
H A Duvd_6_0_sh_mask.h385 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK 0x100 macro

Completed in 935 milliseconds