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6a7cbbc2 |
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06-Mar-2024 |
Saleemkhan Jamadar <saleemkhan.jamadar@amd.com> |
drm/amdgpu/vcn: enable vcn1 fw load for VCN 4_0_6 v1 - update the fw header for each vcn instance (Veera) VCN1 has different FW binary in VCN v4_0_6. Add changes to load the VCN1 fw binary Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com> Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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f2176d70 |
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28-Sep-2023 |
Hawking Zhang <Hawking.Zhang@amd.com> |
drm/amdgpu: Add UVD_VCPU_INT_EN2 to dpg sram Add RAS sepcifc programming to dpg sram. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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dd12b858 |
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17-Jul-2023 |
Samir Dhume <samir.dhume@amd.com> |
drm/amdgpu/vcn: Skip vcn power-gating change for sriov CG/PG is handled on the host side. Signed-off-by: Samir Dhume <samir.dhume@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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d117fd29 |
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17-Jul-2023 |
Samir Dhume <samir.dhume@amd.com> |
drm/amdgpu/vcn: sriov support for vcn_v4_0_3 initialization table handshake with mmsch Signed-off-by: Samir Dhume <samir.dhume@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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a31c114b |
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17-Jul-2023 |
Samir Dhume <samir.dhume@amd.com> |
drm/amdgpu/vcn: mmsch_v4_0_3 requires doorbell on 32 byte boundary Align on 32 byte boundary. Signed-off-by: Samir Dhume <samir.dhume@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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3b780089 |
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03-Aug-2023 |
Ruan Jinjie <ruanjinjie@huawei.com> |
drm/amdgpu: Remove a lot of unnecessary ternary operators There are many ternary operators, the true or false judgement of which is unnecessary in C language semantics. Signed-off-by: Ruan Jinjie <ruanjinjie@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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1ddcdb7c |
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07-Jul-2023 |
Lang Yu <Lang.Yu@amd.com> |
drm/amdgpu: use psp_execute_load_ip_fw instead Replace the old ones with psp_execute_load_ip_fw. Suggested-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Lang Yu <Lang.Yu@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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1fbc69b8 |
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22-May-2023 |
Jiapeng Chong <jiapeng.chong@linux.alibaba.com> |
drm/amdgpu/vcn: Modify mismatched function name No functional modification involved. drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c:374: warning: expecting prototype for vcn_v4_0_mc_resume_dpg_mode(). Prototype was for vcn_v4_0_3_mc_resume_dpg_mode() instead. drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c:631: warning: expecting prototype for vcn_v4_0_enable_clock_gating(). Prototype was for vcn_v4_0_3_enable_clock_gating() instead. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=5284 Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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0ce50b2e |
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16-May-2023 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/vcn4: fix endian conversion sq.is_enabled is a byte so there is no need to endian swap it. Acked-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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85f23b0a |
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02-Mar-2023 |
Hawking Zhang <Hawking.Zhang@amd.com> |
drm/amdgpu: Re-enable VCN RAS if DPG is enabled VCN RAS enablement sequence needs to be added in DPG HW init sequence. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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c3f05ab8 |
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05-Mar-2023 |
Hawking Zhang <Hawking.Zhang@amd.com> |
drm/amdgpu: Initialize vcn v4_0_3 ras function Initialize vcn v4_0_3 ras function Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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6d39fa3f |
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01-Mar-2023 |
Hawking Zhang <Hawking.Zhang@amd.com> |
drm/amdgpu: Add reset_ras_error_count for vcn v4_0_3 Add reset_ras_error_count callback for vcn v4_0_3. It will be used to reset vcn ras error count. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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5e1e227f |
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01-Mar-2023 |
Hawking Zhang <Hawking.Zhang@amd.com> |
drm/amdgpu: Add query_ras_error_count for vcn v4_0_3 Add query_ras_error_count callback for vcn v4_0_3. It will be used to query and log vcn error count. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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96e693ad |
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28-Mar-2023 |
Sonny Jiang <sonny.jiang@amd.com> |
drm/amdgpu: Add a read after write DB_CTRL for vcn_v4_0_3 To make sure VCN DB_CTRL is delivered before doorbell write. Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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358e6c38 |
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15-Mar-2023 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu: use physical AID index for ring name Use physical AID index for VCN/JPEG ring name instead of logical AID index. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Sonny Jiang <sonny.jiang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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d3e53452 |
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15-Mar-2023 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu/vcn: use dummy register selects AID for VCN_RAM ucode Use dummy register 0xDEADBEEF selects AID for PSP VCN_RAM ucode. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Sonny Jiang <sonny.jiang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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fd91d38b |
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17-Feb-2023 |
Lijo Lazar <lijo.lazar@amd.com> |
drm/amdgpu: Use logical ids for VCN/JPEG v4.0.3 Address VCN/JPEG instances using logical ids. Whenever register access is required, get the physical instance using GET_INST. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Tested-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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48d19834 |
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15-Feb-2023 |
Sonny Jiang <sonjiang@amd.com> |
drm/amdgpu: Load vcn_v4_0_3 ucode during early_init VCN loading ucode is moved to early_init with using 'amdgpu_ucode_*' helpers. Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Sonny Jiang <sonjiang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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f471de25 |
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19-Dec-2022 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu: vcn_v4_0_3 load vcn fw once for all AIDs Signed-off-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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da044aae |
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17-Dec-2022 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu: add unified queue support on vcn_v4_0_3 Add unified queue support on vcn_v4_0_3. Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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2d7f1d51 |
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11-Dec-2022 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu: add fwlog support on vcn_v4_0_3 Add fwlog support on vcn_v4_0_3. Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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762702eb |
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11-Jul-2022 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu/vcn: add vcn multiple AIDs support add vcn multiple AIDs support. v2: squash in FW setting fix (Alex) Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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7229bd6f |
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11-Jul-2022 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu/vcn: update clock gate setting for VCN 4.0.3 Update clock gate setting. Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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cf1f3737 |
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11-Jul-2022 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu/vcn: update amdgpu_fw_shared to amdgpu_vcn4_fw_shared Use amdgpu_vcn4_fw_shared for vcn 4.0.3. Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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7f0af02a |
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02-Jul-2022 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu/vcn: remove unused code Remove unused code. Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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429a1118 |
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02-Jul-2022 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu/vcn: update ucode setup Use common amdgpu_vcn_setup_ucode for ucode setup. Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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53054e9a |
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02-Jul-2022 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu/vcn: update new doorbell map New doorbell map is used for VCN 4.0.3. Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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d244a416 |
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02-Jul-2022 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu/vcn: use vcn4 irqsrc header for VCN 4.0.3 Use vcn4 irqsrc header for VCN 4.0.3. Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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ae972ed5 |
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07-Feb-2022 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu: fix vcn doorbell range setting Should use vcn_ring0_1 instead of doorbell index to set nbio doorbell range. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Sonny Jiang <sonny.jiang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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c21d446b |
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29-Jan-2022 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu/vcn: enable vcn doorbell for vcn4.0.3 Enable vcn doorbell for vcn4.0.3. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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b889ef4a |
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23-May-2022 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu/vcn: add vcn support for VCN4_0_3 Add vcn support for VCN4_0_3. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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