Searched refs:UVD_CGC_GATE__MPC_MASK (Results 1 - 25 of 25) sorted by path

/linux-master/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_4_0_sh_mask.h88 #define UVD_CGC_GATE__MPC_MASK 0x00000200L macro
H A Duvd_4_2_sh_mask.h141 #define UVD_CGC_GATE__MPC_MASK 0x200 macro
H A Duvd_5_0_sh_mask.h153 #define UVD_CGC_GATE__MPC_MASK 0x200 macro
H A Duvd_6_0_sh_mask.h155 #define UVD_CGC_GATE__MPC_MASK 0x200 macro
H A Duvd_3_1_sh_mask.h141 #define UVD_CGC_GATE__MPC_MASK 0x200 macro
H A Duvd_7_0_sh_mask.h406 #define UVD_CGC_GATE__MPC_MASK 0x00000200L macro
/linux-master/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h834 #define UVD_CGC_GATE__MPC_MASK 0x00000200L macro
H A Dvcn_2_0_0_sh_mask.h1853 #define UVD_CGC_GATE__MPC_MASK 0x00000200L macro
H A Dvcn_2_5_sh_mask.h1904 #define UVD_CGC_GATE__MPC_MASK 0x00000200L macro
H A Dvcn_2_6_0_sh_mask.h3575 #define UVD_CGC_GATE__MPC_MASK 0x00000200L macro
H A Dvcn_3_0_0_sh_mask.h2634 #define UVD_CGC_GATE__MPC_MASK 0x00000200L macro
H A Dvcn_4_0_0_sh_mask.h69 #define UVD_CGC_GATE__MPC_MASK 0x00000200L macro
H A Dvcn_4_0_3_sh_mask.h69 #define UVD_CGC_GATE__MPC_MASK 0x00000200L macro
[all...]
H A Dvcn_4_0_5_sh_mask.h65 #define UVD_CGC_GATE__MPC_MASK 0x00000200L macro
H A Dvcn_5_0_0_sh_mask.h69 #define UVD_CGC_GATE__MPC_MASK 0x00000200L macro
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Duvd_v5_0.c655 UVD_CGC_GATE__MPC_MASK |
742 UVD_CGC_GATE__MPC_MASK |
H A Duvd_v6_0.c655 UVD_CGC_GATE__MPC_MASK |
688 UVD_CGC_GATE__MPC_MASK |
1312 UVD_CGC_GATE__MPC_MASK |
1400 UVD_CGC_GATE__MPC_MASK |
H A Duvd_v7_0.c1684 UVD_CGC_GATE__MPC_MASK |
H A Dvcn_v1_0.c492 | UVD_CGC_GATE__MPC_MASK
H A Dvcn_v2_0.c517 | UVD_CGC_GATE__MPC_MASK
H A Dvcn_v2_5.c603 | UVD_CGC_GATE__MPC_MASK
H A Dvcn_v3_0.c725 | UVD_CGC_GATE__MPC_MASK
H A Dvcn_v4_0.c692 | UVD_CGC_GATE__MPC_MASK
H A Dvcn_v4_0_3.c542 | UVD_CGC_GATE__MPC_MASK
H A Dvcn_v4_0_5.c627 | UVD_CGC_GATE__MPC_MASK

Completed in 1143 milliseconds