| /u-boot/arch/arm/mach-at91/include/mach/ |
| H A D | at91_pdc.h | 13 u32 tcr; /* 0x10C Transmit Counter Register */ member in struct:at91_pdc
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| H A D | at91_emac.h | 16 u32 tcr; member in struct:at91_emac
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| H A D | at91_matrix.h | 52 u32 tcr; member in struct:at91_matrix
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| /u-boot/arch/arm/mach-lpc32xx/ |
| H A D | timer.c | 29 writel(TIMER_TCR_COUNTER_RESET, &timer->tcr);
30 writel(TIMER_TCR_COUNTER_DISABLE, &timer->tcr);
47 writel(TIMER_TCR_COUNTER_ENABLE, &timer->tcr);
49 writel(TIMER_TCR_COUNTER_DISABLE, &timer->tcr);
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| /u-boot/arch/arm/mach-davinci/ |
| H A D | reset.c | 25 writel(readl(&wdttimer->tcr) | 0x40, &wdttimer->tcr);
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| H A D | timer.c | 44 writel(0x0, &timer->tcr);
49 writel(2 << 22, &timer->tcr);
111 writel(0x0, &wdttimer->tcr);
117 writel(2 << 22, &wdttimer->tcr);
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| /u-boot/arch/arm/include/asm/armv8/ |
| H A D | mmu.h | 111 static inline void set_ttbr_tcr_mair(int el, u64 table, u64 tcr, u64 attr) argument
116 asm volatile("msr tcr_el1, %0" : : "r" (tcr) : "memory");
120 asm volatile("msr tcr_el2, %0" : : "r" (tcr) : "memory");
124 asm volatile("msr tcr_el3, %0" : : "r" (tcr) : "memory");
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| /u-boot/arch/arm/mach-davinci/include/mach/ |
| H A D | timer_defs.h | 18 u_int32_t tcr; member in struct:davinci_timer
|
| /u-boot/arch/m68k/include/asm/ |
| H A D | timer.h | 25 u16 tcr; /* 0x08 Capture register */ member in struct:dtimer_ctrl
37 u32 tcr; /* 0x08 Capture register */
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| H A D | fec.h | 131 u32 tcr; /* 0x144 */ member in struct:fec
160 u32 tcr;
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| /u-boot/arch/arm/include/asm/arch-lpc32xx/ |
| H A D | timer.h | 14 u32 tcr; /* Timer Control Register */ member in struct:timer_regs
|
| /u-boot/arch/arm/cpu/armv8/ |
| H A D | cache_v8.c | 66 u64 tcr; local
95 tcr = TCR_EL1_RSVD | (ips << 32) | TCR_EPD1_DISABLE;
97 tcr = TCR_EL2_RSVD | (ips << 16);
99 tcr = TCR_EL3_RSVD | (ips << 16);
103 tcr |= TCR_TG0_4K | TCR_SHARED_INNER | TCR_ORGN_WBWA | TCR_IRGN_WBWA;
104 tcr |= TCR_T0SZ(va_bits);
111 return tcr;
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| /u-boot/arch/m68k/include/asm/coldfire/ |
| H A D | ssi.h | 20 u32 tcr; member in struct:ssi
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| H A D | dspi.h | 16 u32 tcr; /* 0x08 */ member in struct:dspi
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| /u-boot/include/ |
| H A D | fsl_dspi.h | 18 u32 tcr; /* 0x08 */ member in struct:dspi
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| /u-boot/arch/arm/include/asm/arch-imx8ulp/ |
| H A D | imx-regs.h | 84 u32 tcr; member in struct:mu_type
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| /u-boot/drivers/net/ |
| H A D | mcffec.c | 99 fecp->tcr = FEC_TCR_FDEN;
104 fecp->tcr &= ~FEC_TCR_FDEN;
136 printf("x_cntrl %x - %x\n", (int)&fecp->tcr, fecp->tcr);
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| /u-boot/arch/arm/mach-imx/imx8ulp/upower/ |
| H A D | upower_api.c | 78 writel(1 << (size - 1), &mu->tcr);
343 writel(0, &mu->tcr);
|
| /u-boot/arch/arm/include/asm/arch-imx9/ |
| H A D | imx-regs.h | 71 u32 tcr; member in struct:mu_type
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| /u-boot/drivers/misc/imx_ele/ |
| H A D | ele_mu.c | 32 writel(0, &mu_base->tcr);
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| /u-boot/drivers/usb/eth/ |
| H A D | r8152.c | 22 unsigned short tcr; member in struct:r8152_version
1114 u16 tcr; local
1118 tcr = (u16)(ocp_data & VERSION_MASK);
1121 if (tcr == r8152_versions[i].tcr) {
1130 debug("r8152 Unknown tcr version 0x%04x\n", tcr);
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| /u-boot/drivers/mmc/ |
| H A D | fsl_esdhc_imx.c | 105 uint tcr; /* Tuning control register */ member in struct:fsl_esdhc
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| /u-boot/arch/powerpc/include/asm/ |
| H A D | immap_85xx.h | 692 u32 tcr; /* Timer Control */ member in struct:ccsr_pic
|