| /u-boot/include/dm/platform_data/ |
| H A D | fsl_espi.h | 11 uint speed_hz; member in struct:fsl_espi_plat
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| H A D | spi_coldfire.h | 16 * @speed_hz: default SCK frequency
22 uint speed_hz; member in struct:coldfire_spi_plat
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| /u-boot/drivers/spi/ |
| H A D | fsl_dspi.c | 70 * @speed_hz: Default SCK frequency
76 uint speed_hz; member in struct:fsl_dspi_plat
88 * @speed_hz: Default SCK frequency
99 uint speed_hz; member in struct:fsl_dspi_priv
352 * @speed_hz: expected SCK frequency
356 int speed_hz, uint clkrate)
366 temp = clkrate / speed_hz;
377 debug("Can not find valid baud rate,speed_hz is %d, ", speed_hz);
435 speed = priv->speed_hz;
355 fsl_dspi_hz_to_spi_baud(int *pbr, int *br, int speed_hz, uint clkrate) argument
[all...] |
| H A D | zynq_spi.c | 62 u32 speed_hz; member in struct:zynq_spi_plat
156 plat->speed_hz = plat->frequency / 2;
158 debug("%s: max-frequency=%d\n", __func__, plat->speed_hz);
314 } else if (plat->speed_hz != speed) {
319 plat->speed_hz = speed / (2 << baud_rate_val);
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| H A D | fsl_espi.c | 28 u32 speed_hz; member in struct:fsl_spi_slave
345 max_hz = fsl->speed_hz;
396 fsl->speed_hz = max_hz;
491 fsl->speed_hz = speed;
529 fsl->speed_hz = plat->speed_hz;
557 plat->speed_hz = fdtdec_get_int(blob, node, "spi-max-frequency",
561 &plat->regs_addr, plat->speed_hz);
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| H A D | rk_spi.c | 59 unsigned int speed_hz; member in struct:rockchip_spi_priv
297 if (priv->speed_hz != priv->last_speed_hz)
298 rkspi_set_clk(priv, priv->speed_hz);
530 priv->speed_hz = speed;
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| H A D | zynq_qspi.c | 87 u32 speed_hz; member in struct:zynq_qspi_plat
221 plat->speed_hz = plat->frequency / 2;
223 debug("%s: max-frequency=%d\n", __func__, plat->speed_hz);
630 if (plat->speed_hz != speed) {
639 plat->speed_hz = speed / (2 << baud_rate_val);
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| H A D | cf_spi.c | 354 cfspi->baudrate = plat->speed_hz;
405 plat->speed_hz = fdtdec_get_int(blob, node, "spi-max-frequency",
431 plat->speed_hz, plat->num_cs, plat->mode);
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| H A D | mtk_spim.c | 260 u32 speed_hz)
264 if (speed_hz <= priv->pll_clk_rate / 4)
265 div = DIV_ROUND_UP(priv->pll_clk_rate, speed_hz);
259 mtk_spim_prepare_transfer(struct mtk_spim_priv *priv, u32 speed_hz) argument
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| H A D | pic32_spi.c | 70 u32 speed_hz; /* spi-clk rate */ member in struct:pic32_spi_priv
305 priv->speed_hz = speed;
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| H A D | uniphier_spi.c | 76 u32 speed_hz; member in struct:uniphier_spi_plat
381 plat->speed_hz = plat->frequency / 2;
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| H A D | zynqmp_gqspi.c | 172 u32 speed_hz; member in struct:zynqmp_qspi_plat
372 if (plat->speed_hz != speed) {
383 plat->speed_hz = plat->frequency / (2 << baud_rate_val);
426 plat->speed_hz = plat->frequency / 2;
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| /u-boot/drivers/i2c/ |
| H A D | sandbox_i2c.c | 74 if (i2c->speed_hz > (is_read ? I2C_SPEED_FAST_RATE :
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| H A D | designware_i2c.h | 220 * Calculate the speed config from the given @speed_hz and return it so that
224 * @speed_hz: Requested speed in Hz
228 int dw_i2c_gen_speed_config(const struct udevice *dev, int speed_hz,
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| H A D | i2c-uclass.c | 503 i2c->speed_hz = speed;
514 return i2c->speed_hz;
753 i2c->speed_hz = dev_read_u32_default(dev, "clock-frequency",
756 return dm_i2c_set_bus_speed(dev, i2c->speed_hz);
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| H A D | i2c-gpio.c | 309 static int i2c_gpio_set_bus_speed(struct udevice *dev, unsigned int speed_hz) argument
313 bus->udelay = 1000000 / (speed_hz << 2);
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| H A D | designware_i2c.c | 342 int dw_i2c_gen_speed_config(const struct udevice *dev, int speed_hz, argument
357 ret = calc_bus_speed(priv, priv->regs, speed_hz, rate, config);
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| /u-boot/include/ |
| H A D | i2c.h | 121 * @speed_hz: Bus speed in hertz (typically 100000)
125 int speed_hz; member in struct:dm_i2c_bus
416 * dev_get_uclass_priv(bus)->speed_hz
430 * normally be expected to return dev_get_uclass_priv(bus)->speed_hz.
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