Searched refs:reg_shift (Results 1 - 25 of 26) sorted by relevance

12

/u-boot/drivers/i2c/
H A D	mxc_i2c.c	160 int reg_shift = quirk ? VF610_I2C_REGSHIFT : IMX_I2C_REGSHIFT; local 166 writeb(idx, base + (IFDR << reg_shift)); 169 writeb(I2CR_IDIS, base + (I2CR << reg_shift)); 170 writeb(0, base + (I2SR << reg_shift)); 183 int reg_shift = quirk ? VF610_I2C_REGSHIFT : IMX_I2C_REGSHIFT; local 187 sr = readb(base + (I2SR << reg_shift)); 191 (I2SR << reg_shift)); 194 (I2SR << reg_shift)); 196 __func__, sr, readb(base + (I2CR << reg_shift)), 208 sr, readb(base + (I2CR << reg_shift)), stat 215 int reg_shift = i2c_bus->driver_data & I2C_QUIRK_FLAG ? local 245 int reg_shift = i2c_bus->driver_data & I2C_QUIRK_FLAG ? local 268 int reg_shift = quirk ? VF610_I2C_REGSHIFT : IMX_I2C_REGSHIFT; local 472 int reg_shift = quirk ? VF610_I2C_REGSHIFT : IMX_I2C_REGSHIFT; local 488 int reg_shift = i2c_bus->driver_data & I2C_QUIRK_FLAG ? local 550 int reg_shift = i2c_bus->driver_data & I2C_QUIRK_FLAG ? local 651 int reg_shift = i2c_bus->driver_data & I2C_QUIRK_FLAG ? local [all...]
H A D	ocores_i2c.c	65 u32 reg_shift; member in struct:ocores_i2c_bus 89 writeb(value, i2c->base + (reg << i2c->reg_shift)); 94 writew(value, i2c->base + (reg << i2c->reg_shift)); 99 writel(value, i2c->base + (reg << i2c->reg_shift)); 104 out_be16(i2c->base + (reg << i2c->reg_shift), value); 109 out_be32(i2c->base + (reg << i2c->reg_shift), value); 114 return readb(i2c->base + (reg << i2c->reg_shift)); 119 return readw(i2c->base + (reg << i2c->reg_shift)); 124 return readl(i2c->base + (reg << i2c->reg_shift)); 129 return in_be16(i2c->base + (reg << i2c->reg_shift)); [all...]
/u-boot/arch/arm/mach-lpc32xx/
H A D	devices.c	45 { .base = UART3_BASE, .reg_shift = 2, 47 { .base = UART4_BASE, .reg_shift = 2, 49 { .base = UART5_BASE, .reg_shift = 2, 51 { .base = UART6_BASE, .reg_shift = 2,
/u-boot/drivers/net/
H A D	dwmac_socfpga.c	25 u32 reg_shift; member in struct:dwmac_socfpga_plat 62 pdata->reg_shift = args.args[1]; 70 u32 modemask = SYSMGR_EMACGRP_CTRL_PHYSEL_MASK << pdata->reg_shift; 80 modereg << pdata->reg_shift); 87 modereg << pdata->reg_shift);
/u-boot/drivers/power/regulator/
H A D	npcm8xx_regulator.c	23 u32 reg_shift; /* Register bit offset for setting voltage */ member in struct:volt_supply 81 val &= ~BIT(supp->reg_shift); 82 val |= level << supp->reg_shift; 102 val = readl(REG_VSRCR) & BIT(supp->reg_shift);
/u-boot/drivers/serial/
H A D	serial_rockchip.c	33 plat->plat.reg_shift = plat->dtplat.reg_shift;
H A D	serial_intel_mid.c	28 offset *= 1 << plat->reg_shift;
H A D	serial_coreboot.c	87 plat->reg_shift = addr->access_size - 1; 105 plat->reg_shift = cb_info->regwidth == 4 ? 2 : 0;
H A D	ns16550.c	123 writeb(value, addr + (1 << plat->reg_shift) - 1); 143 return readb(addr + (1 << plat->reg_shift) - 1); 166 offset *= 1 << plat->reg_shift; 172 serial_out_shift(addr, plat->reg_shift, value); 180 offset *= 1 << plat->reg_shift; 186 return serial_in_shift(addr, plat->reg_shift); 489 info->reg_shift = plat->reg_shift; 566 plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0);
H A D	serial_omap.c	117 plat->reg_shift = 2;
H A D	sandbox.c	216 .reg_shift = 0,
/u-boot/drivers/gpio/
H A D	hsdk-creg-gpio.c	34 u8 reg_shift = oft * hcg->bit_per_gpio + hcg->shift; local 37 reg &= ~(GENMASK(hcg->bit_per_gpio - 1, 0) << reg_shift); 38 reg |= ((val ? hcg->deactivate : hcg->activate) << reg_shift);
/u-boot/arch/arm/mach-omap2/am33xx/
H A D	board.c	91 { .base = CFG_SYS_NS16550_COM1, .reg_shift = 2, 94 { .base = CFG_SYS_NS16550_COM2, .reg_shift = 2, 97 { .base = CFG_SYS_NS16550_COM3, .reg_shift = 2, 99 { .base = CFG_SYS_NS16550_COM4, .reg_shift = 2, 101 { .base = CFG_SYS_NS16550_COM5, .reg_shift = 2, 103 { .base = CFG_SYS_NS16550_COM6, .reg_shift = 2,
/u-boot/arch/x86/cpu/apollolake/
H A D	uart.c	109 ns.reg_shift = dtplat->reg_shift;
/u-boot/arch/x86/cpu/slimbootloader/
H A D	serial.c	40 /* ns16550 uses reg_shift, then covert stride to shift */ 41 plat->reg_shift = data->stride >> 1;
/u-boot/board/timll/devkit8000/
H A D	devkit8000.c	53 .reg_shift = 2,
/u-boot/board/lg/sniper/
H A D	sniper.c	36 .reg_shift = 2,
/u-boot/include/
H A D	ns16550.h	63 * @reg_shift: Shift size of registers (0=byte, 1=16bit, 2=32bit...) 74 int reg_shift; member in struct:ns16550_plat
H A D	serial.h	143 * @reg_shift: quantity to shift the register offsets by 154 u8 reg_shift; member in struct:serial_device_info
/u-boot/arch/arm/mach-tegra/
H A D	board.c	260 .reg_shift = 2,
/u-boot/board/isee/igep00x0/
H A D	igep00x0.c	34 .reg_shift = 2,
/u-boot/board/davinci/da8xxevm/
H A D	omapl138_lcdk.c	319 .reg_shift = 2,
/u-boot/cmd/
H A D	bdinfo.c	132 bdinfo_print_num_l(" shift", info.reg_shift);
/u-boot/test/cmd/
H A D	bdinfo.c	218 ut_assertok(test_num_l(uts, " shift", info.reg_shift));
/u-boot/arch/x86/lib/
H A D	acpi_table.c	336 serial_offset = serial_info.reg_offset << serial_info.reg_shift; 340 switch (serial_info.reg_shift) {

Completed in 134 milliseconds

12

Indexes created Sat May 25 20:21:57 MDT 2024