/macosx-10.9.5/llvmCore-3425.0.33/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 1424 unsigned ShAmt = SA->getZExtValue(); local 1428 if (ShAmt >= BitWidth) 1431 // If this is ((X >>u C1) << ShAmt), see if we can simplify this into a 1436 if (ShAmt && (NewMask & APInt::getLowBitsSet(BitWidth, ShAmt)) == 0) { 1439 int Diff = ShAmt-C1; 1453 if (SimplifyDemandedBits(InOp, NewMask.lshr(ShAmt), 1463 if (ShAmt < InnerBits && NewMask.lshr(InnerBits) == 0 && 1466 if (!APInt(BitWidth, ShAmt).isIntN(ShTy.getSizeInBits())) 1470 TLO.DAG.getConstant(ShAmt, ShT 1487 unsigned ShAmt = SA->getZExtValue(); local 1540 unsigned ShAmt = SA->getZExtValue(); local 1581 unsigned ShAmt = ExVT.getScalarType().getSizeInBits(); local 1739 ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(In.getOperand(1)); local 1804 SDValue ShAmt = TLO.DAG.getConstant(ShVal, Op.getValueType()); local 1938 const APInt &ShAmt local 3304 unsigned ShAmt = d.countTrailingZeros(); local [all...] |
H A D | SelectionDAG.cpp | 1828 unsigned ShAmt = SA->getZExtValue(); local 1831 if (ShAmt >= BitWidth) 1836 KnownZero <<= ShAmt; local 1837 KnownOne <<= ShAmt; local 1839 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1845 unsigned ShAmt = SA->getZExtValue(); local 1848 if (ShAmt >= BitWidth) 1853 KnownZero = KnownZero.lshr(ShAmt); 1854 KnownOne = KnownOne.lshr(ShAmt); 1856 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt); 1862 unsigned ShAmt = SA->getZExtValue(); local [all...] |
H A D | DAGCombiner.cpp | 3004 SDValue ShAmt = DAG.getConstant(16, getShiftAmountTy(VT)); local 3006 return DAG.getNode(ISD::ROTL, N->getDebugLoc(), VT, BSwap, ShAmt); 3008 return DAG.getNode(ISD::ROTR, N->getDebugLoc(), VT, BSwap, ShAmt); 3010 DAG.getNode(ISD::SHL, N->getDebugLoc(), VT, BSwap, ShAmt), 3011 DAG.getNode(ISD::SRL, N->getDebugLoc(), VT, BSwap, ShAmt)); 3849 uint64_t ShAmt = N1C->getZExtValue()+64-N0.getValueSizeInBits(); local 3851 DAG.getConstant(~0ULL >> ShAmt, VT)); 3900 unsigned ShAmt = UnknownBits.countTrailingZeros(); local 3903 if (ShAmt) { 3905 DAG.getConstant(ShAmt, getShiftAmountT 4751 SDValue ShAmt = N0.getOperand(1); local 5015 unsigned ShAmt = 0; local 7314 unsigned ShAmt = Imm.countTrailingZeros(); local [all...] |
H A D | SelectionDAGBuilder.cpp | 4837 SDValue ShAmt = getValue(I.getArgOperand(1)); local 4838 if (isa<ConstantSDNode>(ShAmt)) { 4878 ShOps[0] = ShAmt; 4880 ShAmt = DAG.getNode(ISD::BUILD_VECTOR, dl, ShAmtVT, &ShOps[0], 2); 4882 ShAmt = DAG.getNode(ISD::BITCAST, dl, DestVT, ShAmt); 4885 getValue(I.getArgOperand(0)), ShAmt);
|
/macosx-10.9.5/llvmCore-3425.0.33/lib/Transforms/InstCombine/ |
H A D | InstCombineShifts.cpp | 370 Constant *ShAmt = ConstantExpr::getZExt(Op1, TrOp->getType()); local 372 Value *NSh = Builder->CreateBinOp(I.getOpcode(), TrOp, ShAmt,I.getName()); 690 unsigned ShAmt = Op1C->getZExtValue(); local 695 APInt::getHighBitsSet(Op1C->getBitWidth(), ShAmt))) { 702 ComputeNumSignBits(I.getOperand(0)) > ShAmt) { 729 unsigned ShAmt = Op1C->getZExtValue(); local 739 isPowerOf2_32(BitWidth) && Log2_32(BitWidth) == ShAmt) { 749 MaskedValueIsZero(Op0,APInt::getLowBitsSet(Op1C->getBitWidth(),ShAmt))){ 769 unsigned ShAmt = Op1C->getZExtValue(); local 795 MaskedValueIsZero(Op0,APInt::getLowBitsSet(Op1C->getBitWidth(),ShAmt))){ [all...] |
H A D | InstCombineCasts.cpp | 1078 Value *ShAmt = ConstantInt::get(DestTy, DestBitSize-SrcBitSize); 1079 return BinaryOperator::CreateAShr(Builder->CreateShl(Res, ShAmt, "sext"), 1080 ShAmt); 1091 Value *ShAmt = ConstantInt::get(DestTy, DestBitSize-SrcBitSize); local 1092 Value *Res = Builder->CreateShl(TI->getOperand(0), ShAmt, "sext"); 1093 return BinaryOperator::CreateAShr(Res, ShAmt); 1120 unsigned ShAmt = CA->getZExtValue()+SrcDstSize-MidSize; local 1121 Constant *ShAmtV = ConstantInt::get(CI.getType(), ShAmt); 1615 ConstantInt *ShAmt = 0; local 1617 m_ConstantInt(ShAmt)))) [all...] |
H A D | InstCombineCompares.cpp | 931 ConstantInt *ShAmt) { 938 uint32_t ShAmtVal = (uint32_t)ShAmt->getLimitedValue(TypeBits); 1150 ConstantInt *ShAmt; local 1151 ShAmt = Shift ? dyn_cast<ConstantInt>(Shift->getOperand(1)) : 0; 1158 if (ShAmt) { 1164 int ShAmtVal = TyBits - ShAmt->getLimitedValue(TyBits); 1175 NewCst = ConstantExpr::getLShr(RHS, ShAmt); 1177 NewCst = ConstantExpr::getShl(RHS, ShAmt); 1182 NewCst, ShAmt) != RHS) { 1196 NewAndCST = ConstantExpr::getLShr(AndCST, ShAmt); 930 FoldICmpShrCst(ICmpInst &ICI, BinaryOperator *Shr, ConstantInt *ShAmt) argument 1267 ConstantInt *ShAmt = dyn_cast<ConstantInt>(LHSI->getOperand(1)); local 2602 uint64_t ShAmt = 0; local 2615 MaskV <<= ShAmt; local 2618 CmpV <<= ShAmt; local [all...] |
H A D | InstCombineAddSub.cpp | 135 Constant *ShAmt = ConstantInt::get(I.getType(), ExtendAmt); local 136 Value *NewShl = Builder->CreateShl(XorLHS, ShAmt, "sext"); 137 return BinaryOperator::CreateAShr(NewShl, ShAmt);
|
H A D | InstCombineMulDivRem.cpp | 535 Value *ShAmt = llvm::ConstantInt::get(RHS->getType(), local 537 return BinaryOperator::CreateExactAShr(Op0, ShAmt, I.getName());
|
H A D | InstCombineAndOrXor.cpp | 1295 unsigned ShAmt = local 1298 if ((ShAmt & 7) || (ShAmt > 8*ByteValues.size())) 1301 unsigned ByteShift = ShAmt >> 3;
|
H A D | InstructionCombining.cpp | 1011 ConstantInt *ShAmt = cast<ConstantInt>(Inst->getOperand(1)); local 1012 uint32_t ShAmtVal = ShAmt->getLimitedValue(64);
|
/macosx-10.9.5/llvmCore-3425.0.33/lib/Transforms/Scalar/ |
H A D | ScalarReplAggregates.cpp | 836 int ShAmt = 0; local 841 ShAmt = TD.getTypeStoreSizeInBits(NTy) - 844 ShAmt = Offset; 850 if (ShAmt > 0 && (unsigned)ShAmt < NTy->getBitWidth()) 852 ConstantInt::get(FromVal->getType(), ShAmt)); 853 else if (ShAmt < 0 && (unsigned)-ShAmt < NTy->getBitWidth()) 855 ConstantInt::get(FromVal->getType(), -ShAmt)); 984 int ShAmt local 1000 Mask <<= ShAmt; local [all...] |
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/ |
H A D | ARMISelDAGToDAG.cpp | 92 ARM_AM::ShiftOpc ShOpcVal, unsigned ShAmt); 377 unsigned ShAmt) { 384 (ShAmt == 2 || (Subtarget->isSwift() && ShAmt == 1)); 503 unsigned ShAmt = Log2_32(RHSC); local 505 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt, 531 unsigned ShAmt = 0; local 541 ShAmt = Sh->getZExtValue(); 542 if (isShifterOpProfitable(Offset, ShOpcVal, ShAmt)) 545 ShAmt 375 isShifterOpProfitable(const SDValue &Shift, ARM_AM::ShiftOpc ShOpcVal, unsigned ShAmt) argument 602 unsigned ShAmt = Log2_32(RHSC); local 670 unsigned ShAmt = 0; local 735 unsigned ShAmt = 0; local 1286 unsigned ShAmt = 0; local [all...] |
H A D | ARMBaseInstrInfo.cpp | 3092 unsigned ShAmt = DefMI->getOperand(3).getImm(); local 3093 if (ShAmt == 0 || ShAmt == 2) 3123 unsigned ShAmt = DefMI->getOperand(3).getImm(); local 3124 if (ShAmt == 0 || ShAmt == 1 || ShAmt == 2 || ShAmt == 3) 3393 unsigned ShAmt = local 3395 if (ShAmt [all...] |
H A D | ARMISelLowering.cpp | 3431 SDValue ShAmt = Op.getOperand(2); local 3438 DAG.getConstant(VTBits, MVT::i32), ShAmt); 3439 SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, ShAmt); 3440 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt, 3449 SDValue Hi = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt); 3467 SDValue ShAmt = Op.getOperand(2); local 3472 DAG.getConstant(VTBits, MVT::i32), ShAmt); 3474 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt, 3476 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, ShAmt); 3483 SDValue Lo = DAG.getNode(ISD::SHL, dl, VT, ShOpLo, ShAmt); 7822 SDValue ShAmt = N00.getOperand(1); local [all...] |
/macosx-10.9.5/llvmCore-3425.0.33/lib/VMCore/ |
H A D | ConstantFold.cpp | 251 unsigned ShAmt = Amt->getZExtValue(); local 253 if ((ShAmt & 7) != 0) 255 ShAmt >>= 3; 258 if (ByteStart >= CSize-ShAmt) 262 if (ByteStart+ByteSize+ShAmt <= CSize) 263 return ExtractConstantBytes(CE->getOperand(0), ByteStart+ShAmt, ByteSize); 273 unsigned ShAmt = Amt->getZExtValue(); local 275 if ((ShAmt & 7) != 0) 277 ShAmt >>= 3; 280 if (ByteStart+ByteSize <= ShAmt) [all...] |
/macosx-10.9.5/llvmCore-3425.0.33/lib/Analysis/ |
H A D | ValueTracking.cpp | 1033 const APInt *ShAmt; local 1034 if (match(U->getOperand(1), m_APInt(ShAmt))) { 1035 Tmp += ShAmt->getZExtValue(); 1041 const APInt *ShAmt; local 1042 if (match(U->getOperand(1), m_APInt(ShAmt))) { 1045 Tmp2 = ShAmt->getZExtValue();
|
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/InstPrinter/ |
H A D | ARMInstPrinter.cpp | 1024 unsigned ShAmt = MO3.getImm(); 1025 if (ShAmt) { 1026 assert(ShAmt <= 3 && "Not a valid Thumb2 addressing mode!"); 1027 O << ", lsl #" << ShAmt;
|
/macosx-10.9.5/llvmCore-3425.0.33/lib/Support/ |
H A D | APInt.cpp | 2008 APInt APInt::sshl_ov(unsigned ShAmt, bool &Overflow) const { 2009 Overflow = ShAmt >= getBitWidth(); 2011 ShAmt = getBitWidth()-1; 2014 Overflow = ShAmt >= countLeadingZeros(); 2016 Overflow = ShAmt >= countLeadingOnes(); 2018 return *this << ShAmt;
|
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 3999 unsigned ShAmt = (i << Shift) % 8; local 4000 Mask |= Elt << ShAmt; 4699 bool &isLeft, SDValue &ShVal, unsigned &ShAmt) { 4724 ShAmt = NumZeros; 4732 bool &isLeft, SDValue &ShVal, unsigned &ShAmt) { 4757 ShAmt = NumZeros; 4765 bool &isLeft, SDValue &ShVal, unsigned &ShAmt) { 4771 if (isVectorShiftLeft(SVOp, DAG, isLeft, ShVal, ShAmt) || 4772 isVectorShiftRight(SVOp, DAG, isLeft, ShVal, ShAmt)) 6705 unsigned ShAmt local 4698 isVectorShiftRight(ShuffleVectorSDNode *SVOp, SelectionDAG &DAG, bool &isLeft, SDValue &ShVal, unsigned &ShAmt) argument 4731 isVectorShiftLeft(ShuffleVectorSDNode *SVOp, SelectionDAG &DAG, bool &isLeft, SDValue &ShVal, unsigned &ShAmt) argument 4764 isVectorShift(ShuffleVectorSDNode *SVOp, SelectionDAG &DAG, bool &isLeft, SDValue &ShVal, unsigned &ShAmt) argument 7758 SDValue ShAmt = Op.getOperand(2); local 9723 getTargetVShiftNode(unsigned Opc, DebugLoc dl, EVT VT, SDValue SrcOp, SDValue ShAmt, SelectionDAG &DAG) argument 10775 SDValue ShAmt = DAG.getConstant(32, MVT::i32); local 11110 SDValue ShAmt = DAG.getConstant(BitsDiff, MVT::i32); local 14208 unsigned ShAmt = TrueC->getAPIntValue().logBase2(); local 14487 unsigned ShAmt = TrueC->getAPIntValue().logBase2(); local 14681 APInt ShAmt = N1C->getAPIntValue(); local [all...] |
H A D | X86InstrInfo.cpp | 1781 unsigned ShAmt = MI->getOperand(2).getImm(); local 1782 MIB.addReg(0).addImm(1 << ShAmt) 1907 unsigned ShAmt = MI->getOperand(2).getImm(); local 1908 if (ShAmt == 0 || ShAmt >= 4) return 0; 1918 .addReg(0).addImm(1 << ShAmt).addOperand(Src).addImm(0).addReg(0); 1925 unsigned ShAmt = MI->getOperand(2).getImm(); local 1926 if (ShAmt == 0 || ShAmt >= 4) return 0; 1937 .addReg(0).addImm(1 << ShAmt) 1944 unsigned ShAmt = MI->getOperand(2).getImm(); local [all...] |