Searched refs:pre_div (Results 1 - 25 of 50) sorted by relevance

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/linux-master/drivers/gpu/drm/sun4i/
H A Dsun4i_hdmi_ddc_clk.c18 u8 pre_div; member in struct:sun4i_ddc
29 const u8 pre_div,
40 tmp_rate = (((parent_rate / pre_div) / 10) >> _n) /
67 return sun4i_ddc_calc_divider(rate, *prate, ddc->pre_div,
82 return (((parent_rate / ddc->pre_div) / 10) >> n) /
92 sun4i_ddc_calc_divider(rate, parent_rate, ddc->pre_div,
134 ddc->pre_div = hdmi->variant->ddc_clk_pre_divider;
27 sun4i_ddc_calc_divider(unsigned long rate, unsigned long parent_rate, const u8 pre_div, const u8 m_offset, u8 *m, u8 *n) argument
/linux-master/drivers/clk/sunxi/
H A Dclk-sun9i-cpus.c72 u8 div, pre_div = 1; local
87 pre_div = div;
90 pre_div = DIV_ROUND_UP(div, 2);
93 pre_div = DIV_ROUND_UP(div, 3);
96 pre_div = DIV_ROUND_UP(div, 4);
104 *pre_divp = pre_div - 1;
107 return parent_rate / pre_div / div;
154 u8 div, pre_div, parent; local
163 sun9i_a80_cpus_clk_round(rate, &div, &pre_div, parent, parent_rate);
166 reg = SUN9I_CPUS_PLL4_DIV_SET(reg, pre_div);
[all...]
/linux-master/drivers/clk/qcom/
H A Dclk-rcg.h15 u8 pre_div; member in struct:freq_tbl
26 u8 pre_div; member in struct:freq_conf
60 * struct pre_div - pre-divider
64 struct pre_div { struct
97 struct pre_div p;
136 struct pre_div p[2];
H A Dclk-rcg.c113 static u32 ns_to_pre_div(struct pre_div *p, u32 ns)
120 static u32 pre_div_to_ns(struct pre_div *p, u8 pre_div, u32 ns) argument
128 ns |= pre_div << p->pre_div_shift;
203 struct pre_div *p;
267 ns = pre_div_to_ns(p, f->pre_div - 1, ns);
312 f.pre_div = ns_to_pre_div(&rcg->p[bank], ns) + 1;
323 * pre_div n
326 calc_rate(unsigned long rate, u32 m, u32 n, u32 mode, u32 pre_div) argument
328 if (pre_div)
345 u32 pre_div, m = 0, n = 0, ns, md, mode = 0; local
370 u32 m, n, pre_div, ns, md, mode, reg; local
[all...]
H A Dclk-rcg2.c240 if (f->pre_div) {
244 rate *= f->pre_div + 1;
292 rate = calc_rate(parent_rate, conf->n, conf->m, conf->n, conf->pre_div);
347 if (conf->pre_div) {
351 rate *= conf->pre_div + 1;
435 cfg = f->pre_div << CFG_SRC_DIV_SHIFT;
508 f_tbl.pre_div = conf->pre_div;
735 f.pre_div = hid_div;
736 f.pre_div >>
1407 u32 level, mask, cfg, m = 0, n = 0, mode, pre_div; local
[all...]
H A Dgcc-ipq4019.c164 f->pre_div << pll->cdiv.shift);
185 u32 cdiv, pre_div; local
193 * frequency(parent_rate) and pre_div with 2 to make integer
197 pre_div = (cdiv + 1) * 2;
199 pre_div = cdiv + 12;
202 do_div(rate, pre_div);
262 u32 cdiv, pre_div = 1; local
267 pre_div = pll->fixed_div;
274 pre_div = clkt->div;
279 do_div(rate, pre_div);
[all...]
/linux-master/drivers/clk/bcm/
H A Dclk-kona-setup.c64 div = &peri->pre_div;
130 div = &peri->pre_div;
364 struct bcm_clk_div *pre_div; local
369 if (!divider_exists(&peri->div) || !divider_exists(&peri->pre_div))
373 pre_div = &peri->pre_div;
374 if (divider_is_fixed(div) || divider_is_fixed(pre_div))
379 return div->u.s.frac_width + pre_div->u.s.frac_width <= limit;
400 struct bcm_clk_div *pre_div; local
442 pre_div
[all...]
H A Dclk-kona.c686 struct bcm_clk_div *div, struct bcm_clk_div *pre_div,
708 if (pre_div && divider_exists(pre_div)) {
711 scaled_rate = scale_rate(pre_div, parent_rate);
713 scaled_div = divider_read_scaled(ccu, pre_div);
741 struct bcm_clk_div *pre_div,
766 if (divider_exists(pre_div)) {
770 scaled_rate = scale_rate(pre_div, parent_rate);
772 scaled_pre_div = divider_read_scaled(ccu, pre_div);
996 return clk_recalc_rate(bcm_clk->ccu, &data->div, &data->pre_div,
685 clk_recalc_rate(struct ccu_data *ccu, struct bcm_clk_div *div, struct bcm_clk_div *pre_div, unsigned long parent_rate) argument
740 round_rate(struct ccu_data *ccu, struct bcm_clk_div *div, struct bcm_clk_div *pre_div, unsigned long rate, unsigned long parent_rate, u64 *scaled_div) argument
[all...]
/linux-master/drivers/clk/
H A Dclk-sparx5.c53 u8 pre_div; member in struct:s5_pll_conf
65 int divt = sel_rates[conf->rot_sel] * (1 + conf->pre_div);
91 conf->pre_div = i;
183 val |= FIELD_PREP(PLL_PRE_DIV, conf.pre_div);
203 conf.pre_div = FIELD_GET(PLL_PRE_DIV, val);
/linux-master/drivers/phy/mediatek/
H A Dphy-mtk-hdmi-mt8173.c140 unsigned int pre_div; local
150 pre_div = 0;
153 pre_div = 1;
156 pre_div = 1;
160 mtk_phy_update_field(base + HDMI_CON0, RG_HDMITX_PLL_PREDIV, pre_div);
/linux-master/sound/soc/codecs/
H A Drt1019.c161 int pre_div, bclk_ms, frame_size; local
167 pre_div = rl6231_get_clk_info(rt1019->sysclk, rt1019->lrck);
168 if (pre_div < 0) {
184 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
185 bclk_ms, pre_div, dai->id);
187 switch (pre_div) {
H A Drt1308.c457 int pre_div, bclk_ms, frame_size; local
460 pre_div = rt1308_get_clk_info(rt1308->sysclk, rt1308->lrck);
461 if (pre_div < 0) {
477 dev_dbg(component->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
478 bclk_ms, pre_div, dai->id);
480 dev_dbg(component->dev, "lrck is %dHz and pre_div is %d for iis %d\n",
481 rt1308->lrck, pre_div, dai->id);
503 val_clk = pre_div << RT1308_DIV_FS_SYS_SFT;
H A Drt1016.c309 int pre_div, bclk_ms, frame_size; local
313 pre_div = rl6231_get_clk_info(rt1016->sysclk, rt1016->lrck);
314 if (pre_div < 0) {
333 dev_dbg(component->dev, "lrck is %dHz and pre_div is %d for iis %d\n",
334 rt1016->lrck, pre_div, dai->id);
357 ((pre_div + 3) << RT1016_FS_PD_SFT) |
358 (pre_div << RT1016_OSR_PD_SFT));
H A Drt5514.c755 int pre_div, bclk_ms, frame_size; local
759 pre_div = rl6231_get_clk_info(rt5514->sysclk, rt5514->lrck);
760 if (pre_div < 0) {
776 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
777 bclk_ms, pre_div, dai->id);
799 (pre_div + 1) << RT5514_CLK_AD_ANA1_SEL_SFT);
802 pre_div << RT5514_CLK_SYS_DIV_OUT_SFT |
803 pre_div << RT5514_SEL_ADC_OSR_SFT);
H A Drt1305.c629 int pre_div, bclk_ms, frame_size; local
632 pre_div = rt1305_get_clk_info(rt1305->sysclk, rt1305->lrck);
633 if (pre_div < 0) {
639 pre_div = 0;
651 dev_dbg(component->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
652 bclk_ms, pre_div, dai->id);
654 dev_dbg(component->dev, "lrck is %dHz and pre_div is %d for iis %d\n",
655 rt1305->lrck, pre_div, dai->id);
677 val_clk = pre_div << RT1305_DIV_FS_SYS_SFT;
H A Dwm8510.c266 unsigned int pre_div:4; /* prescale - 1 */ member in struct:pll_
285 pll_div.pre_div = 1;
288 pll_div.pre_div = 0;
332 snd_soc_component_write(component, WM8510_PLLN, (pll_div.pre_div << 4) | pll_div.n);
H A Dwm8974.c263 unsigned int pre_div:1; member in struct:pll_
284 pll_div->pre_div = 1;
287 pll_div->pre_div = 0;
332 snd_soc_component_write(component, WM8974_PLLN, (pll_div.pre_div << 4) | pll_div.n);
H A Drt1015.c704 int pre_div, frame_size, lrck; local
708 pre_div = rl6231_get_clk_info(rt1015->sysclk, lrck);
709 if (pre_div < 0) {
721 dev_dbg(component->dev, "pre_div is %d for iis %d\n", pre_div, dai->id);
723 dev_dbg(component->dev, "lrck is %dHz and pre_div is %d for iis %d\n",
724 lrck, pre_div, dai->id);
745 RT1015_FS_PD_MASK, pre_div << RT1015_FS_PD_SFT);
/linux-master/drivers/mmc/host/
H A Dsdhci-of-esdhc.c653 unsigned int pre_div = 1, div = 1; local
664 /* Start pre_div at 2 for vendor version < 2.3. */
666 pre_div = 2;
678 /* Calculate pre_div and div. */
679 while (host->max_clk / pre_div / 16 > clock_fixup && pre_div < 256)
680 pre_div *= 2;
682 while (host->max_clk / pre_div / div > clock_fixup && div < 16)
685 esdhc->div_ratio = pre_div * div;
693 pre_div
[all...]
/linux-master/drivers/rtc/
H A Drtc-ac100.c226 int div = 0, pre_div = 0; local
229 div = divider_get_val(rate * ac100_clkout_prediv[pre_div].div,
235 ac100_clkout_prediv[++pre_div].div);
240 pre_div = ac100_clkout_prediv[pre_div].val;
246 (pre_div - 1) << AC100_CLKOUT_PRE_DIV_SHIFT);
/linux-master/drivers/clk/sophgo/
H A Dclk-cv18xx-pll.c58 for_each_pll_limit_range(pre, &limit->pre_div) {
250 unsigned long pre_div,
262 trate = fpll_calc_rate(parent, pre_div, div, post_div,
297 for_each_pll_limit_range(pre, &limit->pre_div) {
248 fpll_find_synthesizer(unsigned long parent, unsigned long rate, unsigned long pre_div, unsigned long div, unsigned long post_div, bool is_full_parent, u32 *ssc_syn_set) argument
H A Dclk-cv18xx-pll.h15 } pre_div, div, post_div, ictrl, mode; member in struct:cv1800_clk_pll_limit
/linux-master/drivers/media/i2c/
H A Dccs-pll.c384 u32 pre_mul, pre_div; local
386 pre_div = gcd(pll->pixel_rate_csi,
388 pre_mul = pll->pixel_rate_csi / pre_div;
389 pre_div = pll->ext_clk_freq_hz * pll->vt_lanes / pre_div;
412 div = gcd(pre_mul * pll_fr->pre_pll_clk_div, pre_div);
414 div = pre_div / div;
H A Dov7251.c89 unsigned int pre_div; member in struct:ov7251_pll1_cfg
97 unsigned int pre_div; member in struct:ov7251_pll2_cfg
170 .pre_div = 0x03,
178 .pre_div = 0x01,
186 .pre_div = 0x03,
194 .pre_div = 0x05,
202 .pre_div = 0x04,
210 .pre_div = 0x04,
816 configs->pll1[ov7251->link_freq_idx]->pre_div);
840 configs->pll2->pre_div);
[all...]
/linux-master/drivers/iio/adc/
H A Dimx7d_adc.c126 u32 pre_div; member in struct:imx7d_adc_analogue_core_clk
131 .pre_div = (_pre_div), \
208 info->pre_div_num = adc_analogure_clk.pre_div;

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