/freebsd-current/sys/dev/xl/ |
H A D | if_xl.c | 406 CSR_WRITE_2(sc, XL_W4_PHY_MGMT, val); 571 CSR_WRITE_2(sc, XL_W0_EE_CMD, 574 CSR_WRITE_2(sc, XL_W0_EE_CMD, 644 CSR_WRITE_2(sc, XL_COMMAND, rxfilt | XL_CMD_RX_SET_FILT); 668 CSR_WRITE_2(sc, XL_COMMAND, h | XL_CMD_RX_SET_HASH | XL_HASH_SET); 705 CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RX_SET_HASH | i); 712 CSR_WRITE_2(sc, XL_COMMAND, rxfilt | XL_CMD_RX_SET_FILT); 733 CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_COAX_STOP); 818 CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_COAX_START); 820 CSR_WRITE_2(s [all...] |
H A D | if_xlreg.h | 654 #define CSR_WRITE_2(sc, reg, val) \ macro 672 CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_WINSEL | x); \
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/freebsd-current/sys/dev/vte/ |
H A D | if_vte.c | 175 CSR_WRITE_2(sc, VTE_MMDIO, MMDIO_READ | 199 CSR_WRITE_2(sc, VTE_MMWD, val); 200 CSR_WRITE_2(sc, VTE_MMDIO, MMDIO_WRITE | 256 CSR_WRITE_2(sc, VTE_MRICR, val); 264 CSR_WRITE_2(sc, VTE_MTICR, val); 1157 CSR_WRITE_2(sc, VTE_TX_POLL, TX_POLL_START); 1253 CSR_WRITE_2(sc, VTE_MCR0, mcr); 1354 CSR_WRITE_2(sc, VTE_MIER, 0); 1375 CSR_WRITE_2(sc, VTE_MIER, VTE_INTRS); 1574 CSR_WRITE_2(s [all...] |
H A D | if_vtevar.h | 149 #define CSR_WRITE_2(_sc, reg, val) \ macro
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/freebsd-current/sys/dev/bwi/ |
H A D | bwimac.c | 217 CSR_WRITE_2(sc, data_reg, v); 230 CSR_WRITE_2(sc, BWI_MOBJ_DATA_UNALIGN, v >> 16); 234 CSR_WRITE_2(sc, BWI_MOBJ_DATA, v & 0xffff); 278 CSR_WRITE_2(mac->mac_sc, BWI_BBP_ATTEN, BWI_BBP_ATTEN_MAGIC); 349 CSR_WRITE_2(sc, BWI_BBP_ATTEN, 0); 366 CSR_WRITE_2(sc, 0x60e, 0); 367 CSR_WRITE_2(sc, 0x610, 0x8000); 368 CSR_WRITE_2(sc, 0x604, 0); 369 CSR_WRITE_2(sc, 0x606, 0x200); 393 CSR_WRITE_2(s [all...] |
H A D | bwirf.c | 201 CSR_WRITE_2(sc, BWI_RF_CTRL, ctrl); 202 CSR_WRITE_2(sc, BWI_RF_DATA_LO, data); 220 CSR_WRITE_2(sc, BWI_RF_CTRL, ctrl); 251 CSR_WRITE_2(sc, BWI_RF_CTRL, BWI_RF_CTRL_RFINFO); 255 CSR_WRITE_2(sc, BWI_RF_CTRL, BWI_RF_CTRL_RFINFO); 354 CSR_WRITE_2(sc, BWI_RF_CHAN, BWI_RF_2GHZ_CHAN(chan)); 580 CSR_WRITE_2(sc, BWI_RF_CHAN, BWI_RF_2GHZ_CHAN(chan + 4)); 582 CSR_WRITE_2(sc, BWI_RF_CHAN, BWI_RF_2GHZ_CHAN(1)); 584 CSR_WRITE_2(sc, BWI_RF_CHAN, BWI_RF_2GHZ_CHAN(chan)); 786 CSR_WRITE_2(s [all...] |
H A D | bwiphy.c | 139 CSR_WRITE_2(sc, BWI_PHY_CTRL, ctrl); 140 CSR_WRITE_2(sc, BWI_PHY_DATA, data); 148 CSR_WRITE_2(sc, BWI_PHY_CTRL, ctrl); 441 CSR_WRITE_2(sc, BWI_BPHY_CTRL, BWI_BPHY_CTRL_INIT); 451 CSR_WRITE_2(sc, BWI_PHY_MAGIC_REG1, BWI_PHY_MAGIC_REG1_VAL1); 488 CSR_WRITE_2(sc, BWI_RF_CHAN_EX, 0x1100); 535 CSR_WRITE_2(sc, BWI_RF_ANTDIV, 0); 559 CSR_WRITE_2(sc, BWI_BPHY_CTRL, BWI_BPHY_CTRL_INIT); 567 CSR_WRITE_2(sc, BWI_PHY_MAGIC_REG1, BWI_PHY_MAGIC_REG1_VAL1); 721 CSR_WRITE_2(s [all...] |
H A D | if_bwivar.h | 83 #define CSR_WRITE_2(sc, reg, val) \ macro 89 CSR_WRITE_2((sc), (reg), CSR_READ_2((sc), (reg)) | (bits)) 94 CSR_WRITE_2((sc), (reg), (CSR_READ_2((sc), (reg)) & (filt)) | (bits)) 99 CSR_WRITE_2((sc), (reg), CSR_READ_2((sc), (reg)) & ~(bits))
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/freebsd-current/sys/dev/vge/ |
H A D | if_vgevar.h | 219 #define CSR_WRITE_2(sc, reg, val) \ macro 234 CSR_WRITE_2(sc, reg, CSR_READ_2(sc, reg) | (x)) 241 CSR_WRITE_2(sc, reg, CSR_READ_2(sc, reg) & ~(x))
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H A D | if_vge.c | 405 CSR_WRITE_2(sc, VGE_MIIDATA, data); 1597 CSR_WRITE_2(sc, VGE_RXDESC_RESIDUECNT, 2005 CSR_WRITE_2(sc, VGE_TXQCSRS, VGE_TXQCSR_WAK0); 2087 CSR_WRITE_2(sc, VGE_TXDESCNUM, VGE_TX_DESC_CNT - 1); 2091 CSR_WRITE_2(sc, VGE_RXDESCNUM, VGE_RX_DESC_CNT - 1); 2092 CSR_WRITE_2(sc, VGE_RXDESC_RESIDUECNT, VGE_RX_DESC_CNT); 2102 CSR_WRITE_2(sc, VGE_TXQCSRS, VGE_TXQCSR_RUN0); 2112 CSR_WRITE_2(sc, VGE_TX_PAUSE_TIMER, 0xFFFF); 2414 CSR_WRITE_2(sc, VGE_TXQCSRC, 0xFFFF);
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/freebsd-current/sys/dev/ste/ |
H A D | if_ste.c | 189 CSR_WRITE_2(sc, reg, CSR_READ_2(sc, reg) | (x)) 192 CSR_WRITE_2(sc, reg, CSR_READ_2(sc, reg) & ~(x)) 296 CSR_WRITE_2(sc, STE_MACCTL0, cfg); 393 CSR_WRITE_2(sc, STE_EEPROM_CTL, STE_EEOPCODE_READ | (off + i)); 448 CSR_WRITE_2(sc, STE_MAR0, hashes[0] & 0xFFFF); 449 CSR_WRITE_2(sc, STE_MAR1, (hashes[0] >> 16) & 0xFFFF); 450 CSR_WRITE_2(sc, STE_MAR2, hashes[1] & 0xFFFF); 451 CSR_WRITE_2(sc, STE_MAR3, (hashes[1] >> 16) & 0xFFFF); 552 CSR_WRITE_2(sc, STE_COUNTDOWN, 579 CSR_WRITE_2(s [all...] |
/freebsd-current/sys/dev/stge/ |
H A D | if_stge.c | 399 CSR_WRITE_2(sc, STGE_EepromCtrl, 1314 CSR_WRITE_2(sc, STGE_IntEnable, 0); 1322 CSR_WRITE_2(sc, STGE_IntEnable, 1511 CSR_WRITE_2(sc, STGE_IntEnable, sc->sc_IntEnable); 2017 CSR_WRITE_2(sc, STGE_StationAddress0, htole16(eaddr[0])); 2018 CSR_WRITE_2(sc, STGE_StationAddress1, htole16(eaddr[1])); 2019 CSR_WRITE_2(sc, STGE_StationAddress2, htole16(eaddr[2])); 2061 CSR_WRITE_2(sc, STGE_TxStartThresh, sc->sc_txthresh); 2068 CSR_WRITE_2(sc, STGE_RxEarlyThresh, 0x7ff); 2093 CSR_WRITE_2(s [all...] |
/freebsd-current/sys/dev/vr/ |
H A D | if_vr.c | 272 CSR_WRITE_2(sc, VR_MIIDATA, data); 739 CSR_WRITE_2(sc, VR_ISR, 0xFFFF); 740 CSR_WRITE_2(sc, VR_IMR, 0); 742 CSR_WRITE_2(sc, VR_MII_IMR, 0); 1618 CSR_WRITE_2(sc, VR_ISR, status); 1682 CSR_WRITE_2(sc, VR_IMR, 0x0000); 1713 CSR_WRITE_2(sc, VR_IMR, 0); 1714 CSR_WRITE_2(sc, VR_ISR, status); 1719 CSR_WRITE_2(sc, VR_ISR, status); 1745 CSR_WRITE_2(s [all...] |
H A D | if_vrreg.h | 750 #define CSR_WRITE_2(sc, reg, val) bus_write_2(sc->vr_res, reg, val) macro 759 #define VR_SETBIT16(sc, reg, x) CSR_WRITE_2(sc, reg, CSR_READ_2(sc, reg) | (x)) 760 #define VR_CLRBIT16(sc, reg, x) CSR_WRITE_2(sc, reg, CSR_READ_2(sc, reg) & ~(x))
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/freebsd-current/sys/dev/rl/ |
H A D | if_rl.c | 466 CSR_WRITE_2(sc, rl8139_reg, data); 1213 CSR_WRITE_2(sc, RL_CURRXADDR, cur_rx - 16); 1324 CSR_WRITE_2(sc, RL_CSCFG, RL_CSCFG_LINK_DOWN_OFF_CMD); 1327 CSR_WRITE_2(sc, RL_CSCFG, RL_CSCFG_LINK_DOWN_CMD); 1470 CSR_WRITE_2(sc, RL_ISR, status); 1509 CSR_WRITE_2(sc, RL_IMR, 0); 1511 CSR_WRITE_2(sc, RL_ISR, status); 1535 CSR_WRITE_2(sc, RL_IMR, RL_INTRS); 1746 CSR_WRITE_2(sc, RL_IMR, 0); 1750 CSR_WRITE_2(s [all...] |
H A D | if_rlreg.h | 949 #define CSR_WRITE_2(sc, reg, val) \ macro 971 CSR_WRITE_2(sc, offset, CSR_READ_2(sc, offset) | (val)) 974 CSR_WRITE_2(sc, offset, CSR_READ_2(sc, offset) & ~(val))
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/freebsd-current/sys/dev/re/ |
H A D | if_re.c | 612 CSR_WRITE_2(sc, re8139_reg, data); 822 CSR_WRITE_2(sc, RL_ISR, RL_INTRS); 839 CSR_WRITE_2(sc, RL_ISR, 0xFFFF); 851 CSR_WRITE_2(sc, RL_ISR, status); 2546 CSR_WRITE_2(sc, RL_ISR, status); 2575 CSR_WRITE_2(sc, RL_IMR, 0); 2596 CSR_WRITE_2(sc, RL_ISR, status); 2649 CSR_WRITE_2(sc, RL_IMR, RL_INTRS_CPLUS); 2670 CSR_WRITE_2(sc, RL_IMR, 0); 2678 CSR_WRITE_2(s [all...] |
/freebsd-current/sys/dev/msk/ |
H A D | if_msk.c | 684 CSR_WRITE_2(sc_if->msk_softc, 749 CSR_WRITE_2(sc_if->msk_softc, 817 CSR_WRITE_2(sc_if->msk_softc, 1291 CSR_WRITE_2(sc, B0_CTST, Y2_HW_WOL_ON); 1305 CSR_WRITE_2(sc, MR_ADDR(i, GMAC_LINK_CTRL), 1307 CSR_WRITE_2(sc, MR_ADDR(i, GMAC_LINK_CTRL), 1364 CSR_WRITE_2(sc, B28_Y2_ASF_HCU_CCSR, status); 1368 CSR_WRITE_2(sc, B0_CTST, Y2_ASF_DISABLE); 1373 CSR_WRITE_2(sc, B0_CTST, CS_RST_SET); 1374 CSR_WRITE_2(s [all...] |
/freebsd-current/sys/dev/fxp/ |
H A D | if_fxpvar.h | 248 #define CSR_WRITE_2(sc, reg, val) bus_write_2(sc->fxp_res[0], reg, val) macro
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H A D | if_fxp.c | 1143 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 1145 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg | FXP_EEPROM_EESK); 1147 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 1165 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS); 1179 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 1181 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg | FXP_EEPROM_EESK); 1183 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 1198 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg | FXP_EEPROM_EESK); 1202 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 1205 CSR_WRITE_2(s [all...] |
/freebsd-current/sys/dev/ipw/ |
H A D | if_ipwreg.h | 338 #define CSR_WRITE_2(sc, reg, val) \ macro 366 CSR_WRITE_2((sc), IPW_CSR_INDIRECT_DATA, (val)); \
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/freebsd-current/sys/dev/iwi/ |
H A D | if_iwireg.h | 588 #define CSR_WRITE_2(sc, reg, val) \ macro 608 CSR_WRITE_2((sc), IWI_CSR_INDIRECT_DATA, (val)); \
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/freebsd-current/sys/dev/alc/ |
H A D | if_alcvar.h | 262 #define CSR_WRITE_2(_sc, reg, val) \ macro
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/freebsd-current/sys/dev/age/ |
H A D | if_agevar.h | 239 #define CSR_WRITE_2(_sc, reg, val) \ macro
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/freebsd-current/sys/dev/ale/ |
H A D | if_alevar.h | 231 #define CSR_WRITE_2(_sc, reg, val) \ macro
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