/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeVectorTypes.cpp | 332 N->getBasePtr(), DAG.getUNDEF(N->getBasePtr().getValueType()), 498 return DAG.getUNDEF(N->getValueType(0).getVectorElementType()); 505 return DAG.getUNDEF(N->getValueType(0).getVectorElementType()); 1251 InHi = DAG.getVectorShuffle(InLoVT, dl, InLo, DAG.getUNDEF(InLoVT), SplitHi); 1353 Scalars.push_back(DAG.getUNDEF(EltVT)); 1490 Hi = DAG.getUNDEF(HiVT); 1503 SDValue Offset = DAG.getUNDEF(Ptr.getValueType()); 1846 SVOps.push_back(DAG.getUNDEF(EltVT)); 1863 Output = DAG.getUNDEF(NewVT); 1868 DAG.getUNDEF(NewV [all...] |
H A D | SelectionDAG.cpp | 1616 return getUNDEF(VT); 1630 N2 = getUNDEF(VT); 1684 return getUNDEF(VT); 1686 N2 = getUNDEF(VT); 1688 N1 = getUNDEF(VT); 1695 return getUNDEF(VT); 1721 return getUNDEF(VT); 2039 return getUNDEF(VT); 2044 return getUNDEF(VT); 2081 return getUNDEF(V [all...] |
H A D | LegalizeTypesGeneric.cpp | 448 SDValue UndefVal = DAG.getUNDEF(Ops[0].getValueType()); 558 Lo = DAG.getUNDEF(LoVT); 559 Hi = DAG.getUNDEF(HiVT);
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H A D | LegalizeVectorOps.cpp | 1091 ISD::INSERT_SUBVECTOR, DL, SrcVT, DAG.getUNDEF(SrcVT), Src, 1107 DAG.getVectorShuffle(SrcVT, DL, Src, DAG.getUNDEF(SrcVT), ShuffleMask)); 1151 ISD::INSERT_SUBVECTOR, DL, SrcVT, DAG.getUNDEF(SrcVT), Src, 1195 Op = DAG.getVectorShuffle(ByteVT, DL, Op, DAG.getUNDEF(ByteVT), ShuffleMask); 1227 Op = DAG.getVectorShuffle(ByteVT, DL, Op, DAG.getUNDEF(ByteVT),
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H A D | DAGCombiner.cpp | 2614 DAG.getUNDEF(CarryVT)); 3358 DAG.getUNDEF(CarryVT)); 3712 return DAG.getUNDEF(VT); 8009 return DAG.getUNDEF(VT); 9148 Elts.push_back(IsZext ? DAG.getConstant(0, DL, SVT) : DAG.getUNDEF(SVT)); 10576 return DAG.getUNDEF(VT); 10706 return DAG.getUNDEF(VT); 10722 return DAG.getUNDEF(VT); 10941 return DAG.getUNDEF(VT); 10948 Opnds.push_back(DAG.getUNDEF(VT [all...] |
H A D | SelectionDAGBuilder.cpp | 482 return DAG.getUNDEF(ValueVT); 649 SDValue EltUndef = DAG.getUNDEF(ElementVT); 1493 return DAG.getUNDEF(VT); 1547 Constants[i] = DAG.getUNDEF(EltVT); 3645 ConcatOps.push_back(DAG.getUNDEF(SrcVT)); 3662 SDValue UndefVal = DAG.getUNDEF(SrcVT); 3722 setValue(&I, DAG.getUNDEF(VT)); // Vectors are not used. 3730 Src = DAG.getUNDEF(VT); 3763 Res = DAG.getUNDEF(EltVT); 3806 setValue(&I, DAG.getUNDEF(MV [all...] |
H A D | TargetLowering.cpp | 623 return DAG.getUNDEF(Op.getValueType()); 776 return DAG.getUNDEF(Op.getValueType()); 847 return TLO.CombineTo(Op, TLO.DAG.getUNDEF(VT)); 859 return TLO.CombineTo(Op, TLO.DAG.getUNDEF(VT)); 2118 return DAG.getUNDEF(EltVT); 2175 return TLO.CombineTo(Op, TLO.DAG.getUNDEF(VT)); 2189 return TLO.CombineTo(Op, TLO.DAG.getUNDEF(VT)); 2289 Ops[i] = TLO.DAG.getUNDEF(Ops[0].getValueType()); 2348 TLO.DAG.getUNDEF(VT), 2636 return TLO.CombineTo(Op, TLO.DAG.getUNDEF(V [all...] |
H A D | LegalizeDAG.cpp | 1886 Vec2 = DAG.getUNDEF(VT); 1938 return DAG.getUNDEF(VT); 2001 Vec2 = DAG.getUNDEF(VT); 3088 Ops.push_back(DAG.getUNDEF(EltVT)); 3135 Results.push_back(DAG.getUNDEF(Node->getValueType(0))); 4676 SDValue Undef = DAG.getUNDEF(MidVT);
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H A D | LegalizeFloatTypes.cpp | 566 return DAG.getUNDEF(N->getValueType(0)); 697 return DAG.getUNDEF(TLI.getTypeToTransformTo(*DAG.getContext(), 2380 return DAG.getUNDEF(TLI.getTypeToTransformTo(*DAG.getContext(),
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H A D | LegalizeIntegerTypes.cpp | 1192 return DAG.getUNDEF(TLI.getTypeToTransformTo(*DAG.getContext(), 2523 Hi = DAG.getUNDEF(NVT); // The high part is undefined. 2850 Hi = DAG.getUNDEF(NVT);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLoweringHVX.cpp | 388 return DAG.getUNDEF(VecTy); 474 DAG.getUNDEF(ExtTy), Mask); 528 SDValue S = DAG.getVectorShuffle(ByteTy, dl, T, DAG.getUNDEF(ByteTy), Mask); 554 ? DAG.getUNDEF(MVT::i64) 580 SDValue Vec = ZeroFill ? getZero(dl, ByteTy, DAG) : DAG.getUNDEF(ByteTy); 624 : DAG.getUNDEF(MVT::i8); 644 : DAG.getUNDEF(MVT::i8); 825 SDValue Undef = DAG.getUNDEF(ByteTy); 1087 Elems[i] = DAG.getUNDEF(NTy);
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H A D | HexagonISelLowering.cpp | 1996 return DAG.getUNDEF(VecTy); 2195 return DAG.getUNDEF(VecTy); 2278 return DAG.getUNDEF(VecTy); 2440 DAG.getUNDEF(MVT::i32), ValR); 2495 return DAG.getUNDEF(MVT::i64); 2504 return DAG.getUNDEF(MVT::i32); 2612 DAG.getUNDEF(MVT::i32), W);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 3958 Arg = getMOVL(DAG, dl, MVT::v2i64, DAG.getUNDEF(MVT::v2i64), Arg); 5539 SDValue OpNode = IsUndef ? DAG.getUNDEF(EltVT) : 5543 Ops.push_back(IsUndef ? DAG.getUNDEF(EltVT) : 5570 Ops.append(Split ? 2 : 1, DAG.getUNDEF(EltVT)); 5709 : DAG.getUNDEF(VT); 5857 SDValue Undef = DAG.getUNDEF(WideOpVT); 5984 SDValue V = insertSubVector(DAG.getUNDEF(VT), V1, 0, DAG, dl, SubVectorWidth); 6096 ? getZeroVector(VT, Subtarget, DAG, SDLoc(V2)) : DAG.getUNDEF(VT); 7292 DAG.getUNDEF(AltVT), SubInput, 7459 DAG.getUNDEF(SrcV [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelDAGToDAG.cpp | 284 SDValue getUNDEF(const SDLoc &DL, EVT VT) const; 938 SDValue SystemZDAGToDAGISel::getUNDEF(const SDLoc &DL, EVT VT) const { function in class:SystemZDAGToDAGISel 947 DL, VT, getUNDEF(DL, MVT::i64), N); 1042 getUNDEF(DL, OpcodeVT),
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H A D | SystemZISelLowering.cpp | 1290 Value = DAG.getBuildVector(MVT::v2i64, DL, {Value, DAG.getUNDEF(MVT::i64)}); 2729 Op = DAG.getVectorShuffle(MVT::v4f32, DL, Op, DAG.getUNDEF(MVT::v4f32), Mask); 4445 IndexNodes[I] = DAG.getUNDEF(MVT::i32); 4548 return DAG.getUNDEF(VT); 4552 Ops.push_back(DAG.getUNDEF(MVT::v16i8)); 4642 return DAG.getUNDEF(VT); 4652 return DAG.getUNDEF(VT); 4667 return DAG.getUNDEF(MVT::v2i64); 4723 ResidueOps.push_back(DAG.getUNDEF(ResidueOps[0].getValueType())); 4840 Constants[I] = DAG.getUNDEF(Elem [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | R600ISelLowering.cpp | 1637 DAG.getConstant(PartOffset, DL, MVT::i32), DAG.getUNDEF(MVT::i32), 1705 NewBldVec[i] = DAG.getUNDEF(MVT::f32); 1708 NewBldVec[i] = DAG.getUNDEF(MVT::f32); 1717 NewBldVec[i] = DAG.getUNDEF(NewBldVec[i].getValueType()); 1916 Ops.append(NElts, DAG.getUNDEF(InVal.getValueType()));
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H A D | SIISelLowering.cpp | 2134 InVals.push_back(DAG.getUNDEF(Arg.VT)); 2695 InVals.push_back(DAG.getUNDEF(CLI.Ins[I].VT)); 4210 return DAG.getUNDEF(VT); 4247 return DAG.getUNDEF(VT); 4775 return DAG.getUNDEF(ASC->getValueType(0)); 5160 return DAG.getUNDEF(VT); 5169 return DAG.getUNDEF(VT); 5204 VecElts[i] = DAG.getUNDEF(MVT::f32); 5286 BVElts.push_back(DAG.getUNDEF(AdjEltVT)); 5480 AddrHi = DAG.getUNDEF(MV [all...] |
H A D | AMDGPUISelLowering.cpp | 1100 InVals.push_back(DAG.getUNDEF(CLI.Ins[I].VT)); 1442 Join = DAG.getNode(ISD::INSERT_SUBVECTOR, SL, VT, DAG.getUNDEF(VT), LoLoad,
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H A D | AMDGPUISelDAGToDAG.cpp | 2623 return CurDAG->getUNDEF(MVT::i32);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 3084 SDValue Undef = DAG.getUNDEF(MVT::i16); 5102 DAG.getUNDEF(VecVT), In1); 5104 DAG.getUNDEF(VecVT), In2); 6513 return DAG.getNode(ISD::INSERT_SUBVECTOR, DL, WideTy, DAG.getUNDEF(WideTy), 6639 DAG.getUNDEF(Src.ShuffleVec.getValueType())); 6732 SDValue ShuffleOps[] = { DAG.getUNDEF(ShuffleVT), DAG.getUNDEF(ShuffleVT) }; 7816 Lane = DAG.getUNDEF(MVT::i32); 7942 return DAG.getUNDEF(VT); 8113 SDValue Vec = DAG.getUNDEF(V [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 7164 return DAG.getUNDEF(VT); 7243 return DAG.getUNDEF(VT); 7274 DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, DAG.getUNDEF(VT), 7372 SDValue Vec = DAG.getUNDEF(VT); 7484 DAG.getUNDEF(Src.ShuffleVec.getValueType())); 7575 SDValue ShuffleOps[] = { DAG.getUNDEF(ShuffleVT), DAG.getUNDEF(ShuffleVT) }; 7847 DAG.getUNDEF(NewVT), ShuffleMask); 8117 Ops.push_back(DAG.getUNDEF(EltVT)); 8307 SDValue Val = DAG.getUNDEF(MV [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | SelectionDAG.h | 911 SDValue getUNDEF(EVT VT) { function in class:llvm::SelectionDAG
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyISelLowering.cpp | 933 : DAG.getUNDEF(In.VT));
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 7574 return DAG.getVectorShuffle(WideVT, DL, Conv, DAG.getUNDEF(WideVT), ShuffV); 7923 NewResChain, DAG.getUNDEF(MVT::Other)); 8006 SDValue UndefVec = DAG.getUNDEF(VecVT); 8044 SignedConv ? DAG.getUNDEF(WideVT) : DAG.getConstant(0, dl, WideVT); 13025 Ops.push_back(DAG.getUNDEF(SrcVT)); 13033 Ops.push_back(In.isUndef() ? DAG.getUNDEF(SrcVT) : In.getOperand(0)); 13138 DAG.getUNDEF(N->getValueType(0)), Ops); 13168 DAG.getUNDEF(Input.getValueType()), ShuffleMask);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsSEISelLowering.cpp | 2524 SDValue Vector = DAG.getUNDEF(ResTy);
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