Searched refs:cclk (Results 1 - 13 of 13) sorted by relevance

/freebsd-11-stable/sys/dev/cxgbe/common/
H A Dcommon.h252 unsigned int cclk; member in struct:vpd_params
503 return adap->params.vpd.cclk / 1000;
509 return (us * adap->params.vpd.cclk) / 1000;
516 return ((ticks * 1000 + adapter->params.vpd.cclk/2) /
517 adapter->params.vpd.cclk);
529 return (us * adap->params.vpd.cclk / 1000 >> adap->params.tp.tre);
H A Dt4vf_hw.c377 adapter->params.vpd.cclk = 50000;
H A Dt4_hw.c6405 unsigned int clk = adap->params.vpd.cclk * 1000;
6479 u64 v = (u64)bytes256 * adap->params.vpd.cclk;
8965 adapter->params.vpd.cclk = 50000;
9916 v = (adap->params.vpd.cclk * 1000) / cpt; /* ticks/s */
/freebsd-11-stable/sys/dev/sound/pci/
H A Denvy24.c111 u_int8_t cdti, cclk, cs, cif, type; member in struct:cfg_info
803 int cs, cclk, cdti; member in struct:envy24_delta_ak4524_codec
911 envy24_delta_ak4524_ctl(void *codec, unsigned int cs, unsigned int cclk, unsigned int cdti) argument
917 device_printf(ptr->parent->dev, "--> %d, %d, %d\n", cs, cclk, cdti);
920 data &= ~(ptr->cs | ptr->cclk | ptr->cdti);
922 if (cclk) data += ptr->cclk;
1011 ptr->cclk = ENVY24_GPIO_AK4524_CCLK;
1013 ptr->cclk = ptr->parent->cfg->cclk;
[all...]
H A Denvy24ht.c120 u_int32_t cdti, cclk, cs; member in struct:cfg_info
651 buff->cclk = 0x80000;
892 int cs, cclk, cdti; member in struct:envy24ht_spi_codec
896 envy24ht_spi_ctl(void *codec, unsigned int cs, unsigned int cclk, unsigned int cdti) argument
902 device_printf(ptr->parent->dev, "--> %d, %d, %d\n", cs, cclk, cdti);
905 data &= ~(ptr->cs | ptr->cclk | ptr->cdti);
907 if (cclk) data += ptr->cclk;
977 ptr->cclk = ptr->parent->cfg->cclk;
[all...]
/freebsd-11-stable/sys/dev/cxgb/common/
H A Dcxgb_t3_hw.c252 u32 clkdiv = adap->params.vpd.cclk / (2 * adap->params.vpd.mdc) - 1;
627 VPD_ENTRY(cclk, 6); /* core clock */
882 p->cclk = simple_strtoul(vpd.cclk_data, NULL, 10);
3694 unsigned int clk = adap->params.vpd.cclk * 1000;
3781 v = (adap->params.vpd.cclk * 1000) / cpt;
3811 tp_set_timers(adap, adap->params.vpd.cclk * 1000);
4366 V_I2C_CLKDIV(adapter->params.vpd.cclk / 80 - 1));
4517 p->tre = fls(adapter->params.vpd.cclk / (1000 / TP_TMR_RES)) -
4519 p->dack_re = fls(adapter->params.vpd.cclk / 10) - 1; /* 100us */
H A Dcxgb_common.h350 unsigned int cclk; member in struct:vpd_params
663 return adap->params.vpd.cclk / 1000;
H A Dcxgb_xgmac.c534 thres = (adap->params.vpd.cclk * 1000) / 15625;
/freebsd-11-stable/sys/dev/cxgbe/
H A Dt4_vf.c213 sc->params.vpd.cclk = val[2];
H A Dt4_main.c4020 sc->params.vpd.cclk = val[1];
5872 sc->params.vpd.cclk, "core clock frequency (in KHz)");
9248 u_int cclk_ps = 1000000000 / sc->params.vpd.cclk;
9278 u_int cclk_ps = 1000000000 / sc->params.vpd.cclk;
9294 u_int cclk_ps = 1000000000 / sc->params.vpd.cclk;
H A Dt4_sge.c621 * adap->params.vpd.cclk must be set up before this is called.
629 int timer_max = M_TIMERVALUE0 * 1000 / sc->params.vpd.cclk;
/freebsd-11-stable/sys/dev/cxgbe/cudbg/
H A Dcudbg_lib.c1212 if (!padap->params.vpd.cclk) {
1224 clk_info_buff->cclk_ps = 1000000000 / padap->params.vpd.cclk; /* in ps
1493 if (!padap->params.vpd.cclk) {
/freebsd-11-stable/sys/dev/cxgb/
H A Dcxgb_sge.c3380 CTLFLAG_RD, &sc->params.vpd.cclk,

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