Searched refs:OutVals (Results 1 - 25 of 49) sorted by relevance

12

/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEISelLowering.cpp53 const SmallVectorImpl<SDValue> &OutVals,
57 assert(OutVals.empty() && "TODO implement return values");
50 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL, SelectionDAG &DAG) const argument
H A DVEISelLowering.h57 const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.h117 const SmallVectorImpl<SDValue> &OutVals,
145 const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL,
H A DLanaiISelLowering.cpp414 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; local
429 OutVals, Ins, DL, DAG, InVals);
537 const SmallVectorImpl<SDValue> &OutVals,
557 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), OutVals[i], Flag);
599 const SmallVectorImpl<SDValue> &OutVals,
634 SDValue Arg = OutVals[I];
659 SDValue Arg = OutVals[I];
534 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL, SelectionDAG &DAG) const argument
596 LowerCCCCallTo( SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool IsVarArg, bool , const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.h152 const SmallVectorImpl<SDValue> &OutVals,
157 const SmallVectorImpl<SDValue> &OutVals,
162 const SmallVectorImpl<SDValue> &OutVals,
H A DSparcISelLowering.cpp200 const SmallVectorImpl<SDValue> &OutVals,
203 return LowerReturn_64(Chain, CallConv, IsVarArg, Outs, OutVals, DL, DAG);
204 return LowerReturn_32(Chain, CallConv, IsVarArg, Outs, OutVals, DL, DAG);
211 const SmallVectorImpl<SDValue> &OutVals,
237 SDValue Arg = OutVals[realRVLocIdx];
296 const SmallVectorImpl<SDValue> &OutVals,
319 SDValue OutVal = OutVals[i];
346 SDValue NV = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i64, OutVals[i+1]);
722 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; local
197 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL, SelectionDAG &DAG) const argument
208 LowerReturn_32(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL, SelectionDAG &DAG) const argument
293 LowerReturn_64(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL, SelectionDAG &DAG) const argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCISelLowering.h106 const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl,
H A DARCISelLowering.cpp228 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; local
264 SDValue Arg = OutVals[i];
608 const SmallVectorImpl<SDValue> &OutVals,
649 Chain, dl, OutVals[i], FIN,
664 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), OutVals[i], Flag);
605 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl, SelectionDAG &DAG) const argument
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFISelLowering.h99 const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL,
H A DBPFISelLowering.cpp279 auto &OutVals = CLI.OutVals; local
328 SDValue Arg = OutVals[i];
410 const SmallVectorImpl<SDValue> &OutVals,
437 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), OutVals[i], Flag);
407 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL, SelectionDAG &DAG) const argument
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelLowering.h156 const SmallVectorImpl<SDValue> &OutVals,
222 const SmallVectorImpl<SDValue> &OutVals,
H A DXCoreISelLowering.cpp1036 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; local
1055 Outs, OutVals, Ins, dl, DAG, InVals);
1110 const SmallVectorImpl<SDValue> &OutVals,
1144 SDValue Arg = OutVals[i];
1440 const SmallVectorImpl<SDValue> &OutVals,
1487 Chain, dl, OutVals[i], FIN,
1502 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), OutVals[i], Flag);
1107 LowerCCCCallTo( SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool isVarArg, bool isTailCall, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
1437 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl, SelectionDAG &DAG) const argument
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.h141 const SmallVectorImpl<SDValue> &OutVals,
175 const SmallVectorImpl<SDValue> &OutVals,
H A DMSP430ISelLowering.cpp591 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; local
609 Outs, OutVals, Ins, dl, DAG, InVals);
738 const SmallVectorImpl<SDValue> &OutVals,
766 OutVals[i], Flag);
807 const SmallVectorImpl<SDValue> &OutVals,
830 SDValue Arg = OutVals[i];
735 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl, SelectionDAG &DAG) const argument
804 LowerCCCCallTo( SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool isVarArg, bool isTailCall, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.h89 const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl,
H A DWebAssemblyISelLowering.cpp709 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; local
717 std::swap(OutVals[0], OutVals[1]);
723 SDValue &OutVal = OutVals[I];
762 SDValue &Arg = OutVals[I];
788 make_range(OutVals.begin() + NumFixedArgs, OutVals.end())) {
824 Ops.append(OutVals.begin(),
825 IsVarArg ? OutVals
875 LowerReturn( SDValue Chain, CallingConv::ID CallConv, bool , const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL, SelectionDAG &DAG) const argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.h1129 const SmallVectorImpl<SDValue> &OutVals,
1162 const SmallVectorImpl<SDValue> &OutVals,
1171 const SmallVectorImpl<SDValue> &OutVals,
1180 const SmallVectorImpl<SDValue> &OutVals,
1189 const SmallVectorImpl<SDValue> &OutVals,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.h118 const SmallVectorImpl<SDValue> &OutVals,
210 const SmallVectorImpl<SDValue> &OutVals,
226 const SmallVectorImpl<SDValue> &OutVals,
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DFastISel.h94 SmallVector<Value *, 16> OutVals; member in struct:llvm::FastISel::CallLoweringInfo
190 OutVals.clear();
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelLowering.h158 const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl,
H A DAVRISelLowering.cpp1150 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; local
1200 SDValue Arg = OutVals[AI];
1242 SDValue Arg = OutVals[Loc];
1373 const SmallVectorImpl<SDValue> &OutVals,
1404 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), OutVals[i], Flag);
1370 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl, SelectionDAG &DAG) const argument
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h176 const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.h304 const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL,
327 const SmallVectorImpl<SDValue> &OutVals,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.h499 const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.h659 const SmallVectorImpl<SDValue> &OutVals,
680 const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL,

Completed in 160 milliseconds

12