1239310Sdim//===-- NVPTXISelLowering.h - NVPTX DAG Lowering Interface ------*- C++ -*-===// 2239310Sdim// 3353358Sdim// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4353358Sdim// See https://llvm.org/LICENSE.txt for license information. 5353358Sdim// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6239310Sdim// 7239310Sdim//===----------------------------------------------------------------------===// 8239310Sdim// 9239310Sdim// This file defines the interfaces that NVPTX uses to lower LLVM code into a 10239310Sdim// selection DAG. 11239310Sdim// 12239310Sdim//===----------------------------------------------------------------------===// 13239310Sdim 14280031Sdim#ifndef LLVM_LIB_TARGET_NVPTX_NVPTXISELLOWERING_H 15280031Sdim#define LLVM_LIB_TARGET_NVPTX_NVPTXISELLOWERING_H 16239310Sdim 17239310Sdim#include "NVPTX.h" 18239310Sdim#include "llvm/CodeGen/SelectionDAG.h" 19327952Sdim#include "llvm/CodeGen/TargetLowering.h" 20239310Sdim 21239310Sdimnamespace llvm { 22239310Sdimnamespace NVPTXISD { 23288943Sdimenum NodeType : unsigned { 24239310Sdim // Start the numbering from where ISD NodeType finishes. 25239310Sdim FIRST_NUMBER = ISD::BUILTIN_OP_END, 26239310Sdim Wrapper, 27239310Sdim CALL, 28239310Sdim RET_FLAG, 29239310Sdim LOAD_PARAM, 30239310Sdim DeclareParam, 31239310Sdim DeclareScalarParam, 32239310Sdim DeclareRetParam, 33239310Sdim DeclareRet, 34239310Sdim DeclareScalarRet, 35239310Sdim PrintCall, 36309124Sdim PrintConvergentCall, 37239310Sdim PrintCallUni, 38309124Sdim PrintConvergentCallUni, 39239310Sdim CallArgBegin, 40239310Sdim CallArg, 41239310Sdim LastCallArg, 42239310Sdim CallArgEnd, 43239310Sdim CallVoid, 44239310Sdim CallVal, 45239310Sdim CallSymbol, 46239310Sdim Prototype, 47239310Sdim MoveParam, 48239310Sdim PseudoUseParam, 49239310Sdim RETURN, 50239310Sdim CallSeqBegin, 51239310Sdim CallSeqEnd, 52261991Sdim CallPrototype, 53344779Sdim ProxyReg, 54276479Sdim FUN_SHFL_CLAMP, 55276479Sdim FUN_SHFR_CLAMP, 56276479Sdim MUL_WIDE_SIGNED, 57276479Sdim MUL_WIDE_UNSIGNED, 58276479Sdim IMAD, 59321369Sdim SETP_F16X2, 60249423Sdim Dummy, 61249423Sdim 62249423Sdim LoadV2 = ISD::FIRST_TARGET_MEMORY_OPCODE, 63249423Sdim LoadV4, 64249423Sdim LDGV2, // LDG.v2 65249423Sdim LDGV4, // LDG.v4 66249423Sdim LDUV2, // LDU.v2 67249423Sdim LDUV4, // LDU.v4 68249423Sdim StoreV2, 69261991Sdim StoreV4, 70261991Sdim LoadParam, 71261991Sdim LoadParamV2, 72261991Sdim LoadParamV4, 73261991Sdim StoreParam, 74261991Sdim StoreParamV2, 75261991Sdim StoreParamV4, 76261991Sdim StoreParamS32, // to sext and store a <32bit value, not used currently 77321369Sdim StoreParamU32, // to zext and store a <32bit value, not used currently 78261991Sdim StoreRetval, 79261991Sdim StoreRetvalV2, 80276479Sdim StoreRetvalV4, 81276479Sdim 82276479Sdim // Texture intrinsics 83276479Sdim Tex1DFloatS32, 84276479Sdim Tex1DFloatFloat, 85276479Sdim Tex1DFloatFloatLevel, 86276479Sdim Tex1DFloatFloatGrad, 87276479Sdim Tex1DS32S32, 88276479Sdim Tex1DS32Float, 89276479Sdim Tex1DS32FloatLevel, 90276479Sdim Tex1DS32FloatGrad, 91276479Sdim Tex1DU32S32, 92276479Sdim Tex1DU32Float, 93276479Sdim Tex1DU32FloatLevel, 94276479Sdim Tex1DU32FloatGrad, 95276479Sdim Tex1DArrayFloatS32, 96276479Sdim Tex1DArrayFloatFloat, 97276479Sdim Tex1DArrayFloatFloatLevel, 98276479Sdim Tex1DArrayFloatFloatGrad, 99276479Sdim Tex1DArrayS32S32, 100276479Sdim Tex1DArrayS32Float, 101276479Sdim Tex1DArrayS32FloatLevel, 102276479Sdim Tex1DArrayS32FloatGrad, 103276479Sdim Tex1DArrayU32S32, 104276479Sdim Tex1DArrayU32Float, 105276479Sdim Tex1DArrayU32FloatLevel, 106276479Sdim Tex1DArrayU32FloatGrad, 107276479Sdim Tex2DFloatS32, 108276479Sdim Tex2DFloatFloat, 109276479Sdim Tex2DFloatFloatLevel, 110276479Sdim Tex2DFloatFloatGrad, 111276479Sdim Tex2DS32S32, 112276479Sdim Tex2DS32Float, 113276479Sdim Tex2DS32FloatLevel, 114276479Sdim Tex2DS32FloatGrad, 115276479Sdim Tex2DU32S32, 116276479Sdim Tex2DU32Float, 117276479Sdim Tex2DU32FloatLevel, 118276479Sdim Tex2DU32FloatGrad, 119276479Sdim Tex2DArrayFloatS32, 120276479Sdim Tex2DArrayFloatFloat, 121276479Sdim Tex2DArrayFloatFloatLevel, 122276479Sdim Tex2DArrayFloatFloatGrad, 123276479Sdim Tex2DArrayS32S32, 124276479Sdim Tex2DArrayS32Float, 125276479Sdim Tex2DArrayS32FloatLevel, 126276479Sdim Tex2DArrayS32FloatGrad, 127276479Sdim Tex2DArrayU32S32, 128276479Sdim Tex2DArrayU32Float, 129276479Sdim Tex2DArrayU32FloatLevel, 130276479Sdim Tex2DArrayU32FloatGrad, 131276479Sdim Tex3DFloatS32, 132276479Sdim Tex3DFloatFloat, 133276479Sdim Tex3DFloatFloatLevel, 134276479Sdim Tex3DFloatFloatGrad, 135276479Sdim Tex3DS32S32, 136276479Sdim Tex3DS32Float, 137276479Sdim Tex3DS32FloatLevel, 138276479Sdim Tex3DS32FloatGrad, 139276479Sdim Tex3DU32S32, 140276479Sdim Tex3DU32Float, 141276479Sdim Tex3DU32FloatLevel, 142276479Sdim Tex3DU32FloatGrad, 143276479Sdim TexCubeFloatFloat, 144276479Sdim TexCubeFloatFloatLevel, 145276479Sdim TexCubeS32Float, 146276479Sdim TexCubeS32FloatLevel, 147276479Sdim TexCubeU32Float, 148276479Sdim TexCubeU32FloatLevel, 149276479Sdim TexCubeArrayFloatFloat, 150276479Sdim TexCubeArrayFloatFloatLevel, 151276479Sdim TexCubeArrayS32Float, 152276479Sdim TexCubeArrayS32FloatLevel, 153276479Sdim TexCubeArrayU32Float, 154276479Sdim TexCubeArrayU32FloatLevel, 155276479Sdim Tld4R2DFloatFloat, 156276479Sdim Tld4G2DFloatFloat, 157276479Sdim Tld4B2DFloatFloat, 158276479Sdim Tld4A2DFloatFloat, 159276479Sdim Tld4R2DS64Float, 160276479Sdim Tld4G2DS64Float, 161276479Sdim Tld4B2DS64Float, 162276479Sdim Tld4A2DS64Float, 163276479Sdim Tld4R2DU64Float, 164276479Sdim Tld4G2DU64Float, 165276479Sdim Tld4B2DU64Float, 166276479Sdim Tld4A2DU64Float, 167276479Sdim TexUnified1DFloatS32, 168276479Sdim TexUnified1DFloatFloat, 169276479Sdim TexUnified1DFloatFloatLevel, 170276479Sdim TexUnified1DFloatFloatGrad, 171276479Sdim TexUnified1DS32S32, 172276479Sdim TexUnified1DS32Float, 173276479Sdim TexUnified1DS32FloatLevel, 174276479Sdim TexUnified1DS32FloatGrad, 175276479Sdim TexUnified1DU32S32, 176276479Sdim TexUnified1DU32Float, 177276479Sdim TexUnified1DU32FloatLevel, 178276479Sdim TexUnified1DU32FloatGrad, 179276479Sdim TexUnified1DArrayFloatS32, 180276479Sdim TexUnified1DArrayFloatFloat, 181276479Sdim TexUnified1DArrayFloatFloatLevel, 182276479Sdim TexUnified1DArrayFloatFloatGrad, 183276479Sdim TexUnified1DArrayS32S32, 184276479Sdim TexUnified1DArrayS32Float, 185276479Sdim TexUnified1DArrayS32FloatLevel, 186276479Sdim TexUnified1DArrayS32FloatGrad, 187276479Sdim TexUnified1DArrayU32S32, 188276479Sdim TexUnified1DArrayU32Float, 189276479Sdim TexUnified1DArrayU32FloatLevel, 190276479Sdim TexUnified1DArrayU32FloatGrad, 191276479Sdim TexUnified2DFloatS32, 192276479Sdim TexUnified2DFloatFloat, 193276479Sdim TexUnified2DFloatFloatLevel, 194276479Sdim TexUnified2DFloatFloatGrad, 195276479Sdim TexUnified2DS32S32, 196276479Sdim TexUnified2DS32Float, 197276479Sdim TexUnified2DS32FloatLevel, 198276479Sdim TexUnified2DS32FloatGrad, 199276479Sdim TexUnified2DU32S32, 200276479Sdim TexUnified2DU32Float, 201276479Sdim TexUnified2DU32FloatLevel, 202276479Sdim TexUnified2DU32FloatGrad, 203276479Sdim TexUnified2DArrayFloatS32, 204276479Sdim TexUnified2DArrayFloatFloat, 205276479Sdim TexUnified2DArrayFloatFloatLevel, 206276479Sdim TexUnified2DArrayFloatFloatGrad, 207276479Sdim TexUnified2DArrayS32S32, 208276479Sdim TexUnified2DArrayS32Float, 209276479Sdim TexUnified2DArrayS32FloatLevel, 210276479Sdim TexUnified2DArrayS32FloatGrad, 211276479Sdim TexUnified2DArrayU32S32, 212276479Sdim TexUnified2DArrayU32Float, 213276479Sdim TexUnified2DArrayU32FloatLevel, 214276479Sdim TexUnified2DArrayU32FloatGrad, 215276479Sdim TexUnified3DFloatS32, 216276479Sdim TexUnified3DFloatFloat, 217276479Sdim TexUnified3DFloatFloatLevel, 218276479Sdim TexUnified3DFloatFloatGrad, 219276479Sdim TexUnified3DS32S32, 220276479Sdim TexUnified3DS32Float, 221276479Sdim TexUnified3DS32FloatLevel, 222276479Sdim TexUnified3DS32FloatGrad, 223276479Sdim TexUnified3DU32S32, 224276479Sdim TexUnified3DU32Float, 225276479Sdim TexUnified3DU32FloatLevel, 226276479Sdim TexUnified3DU32FloatGrad, 227276479Sdim TexUnifiedCubeFloatFloat, 228276479Sdim TexUnifiedCubeFloatFloatLevel, 229276479Sdim TexUnifiedCubeS32Float, 230276479Sdim TexUnifiedCubeS32FloatLevel, 231276479Sdim TexUnifiedCubeU32Float, 232276479Sdim TexUnifiedCubeU32FloatLevel, 233276479Sdim TexUnifiedCubeArrayFloatFloat, 234276479Sdim TexUnifiedCubeArrayFloatFloatLevel, 235276479Sdim TexUnifiedCubeArrayS32Float, 236276479Sdim TexUnifiedCubeArrayS32FloatLevel, 237276479Sdim TexUnifiedCubeArrayU32Float, 238276479Sdim TexUnifiedCubeArrayU32FloatLevel, 239276479Sdim Tld4UnifiedR2DFloatFloat, 240276479Sdim Tld4UnifiedG2DFloatFloat, 241276479Sdim Tld4UnifiedB2DFloatFloat, 242276479Sdim Tld4UnifiedA2DFloatFloat, 243276479Sdim Tld4UnifiedR2DS64Float, 244276479Sdim Tld4UnifiedG2DS64Float, 245276479Sdim Tld4UnifiedB2DS64Float, 246276479Sdim Tld4UnifiedA2DS64Float, 247276479Sdim Tld4UnifiedR2DU64Float, 248276479Sdim Tld4UnifiedG2DU64Float, 249276479Sdim Tld4UnifiedB2DU64Float, 250276479Sdim Tld4UnifiedA2DU64Float, 251276479Sdim 252276479Sdim // Surface intrinsics 253276479Sdim Suld1DI8Clamp, 254276479Sdim Suld1DI16Clamp, 255276479Sdim Suld1DI32Clamp, 256276479Sdim Suld1DI64Clamp, 257276479Sdim Suld1DV2I8Clamp, 258276479Sdim Suld1DV2I16Clamp, 259276479Sdim Suld1DV2I32Clamp, 260276479Sdim Suld1DV2I64Clamp, 261276479Sdim Suld1DV4I8Clamp, 262276479Sdim Suld1DV4I16Clamp, 263276479Sdim Suld1DV4I32Clamp, 264276479Sdim 265276479Sdim Suld1DArrayI8Clamp, 266276479Sdim Suld1DArrayI16Clamp, 267276479Sdim Suld1DArrayI32Clamp, 268276479Sdim Suld1DArrayI64Clamp, 269276479Sdim Suld1DArrayV2I8Clamp, 270276479Sdim Suld1DArrayV2I16Clamp, 271276479Sdim Suld1DArrayV2I32Clamp, 272276479Sdim Suld1DArrayV2I64Clamp, 273276479Sdim Suld1DArrayV4I8Clamp, 274276479Sdim Suld1DArrayV4I16Clamp, 275276479Sdim Suld1DArrayV4I32Clamp, 276276479Sdim 277276479Sdim Suld2DI8Clamp, 278276479Sdim Suld2DI16Clamp, 279276479Sdim Suld2DI32Clamp, 280276479Sdim Suld2DI64Clamp, 281276479Sdim Suld2DV2I8Clamp, 282276479Sdim Suld2DV2I16Clamp, 283276479Sdim Suld2DV2I32Clamp, 284276479Sdim Suld2DV2I64Clamp, 285276479Sdim Suld2DV4I8Clamp, 286276479Sdim Suld2DV4I16Clamp, 287276479Sdim Suld2DV4I32Clamp, 288276479Sdim 289276479Sdim Suld2DArrayI8Clamp, 290276479Sdim Suld2DArrayI16Clamp, 291276479Sdim Suld2DArrayI32Clamp, 292276479Sdim Suld2DArrayI64Clamp, 293276479Sdim Suld2DArrayV2I8Clamp, 294276479Sdim Suld2DArrayV2I16Clamp, 295276479Sdim Suld2DArrayV2I32Clamp, 296276479Sdim Suld2DArrayV2I64Clamp, 297276479Sdim Suld2DArrayV4I8Clamp, 298276479Sdim Suld2DArrayV4I16Clamp, 299276479Sdim Suld2DArrayV4I32Clamp, 300276479Sdim 301276479Sdim Suld3DI8Clamp, 302276479Sdim Suld3DI16Clamp, 303276479Sdim Suld3DI32Clamp, 304276479Sdim Suld3DI64Clamp, 305276479Sdim Suld3DV2I8Clamp, 306276479Sdim Suld3DV2I16Clamp, 307276479Sdim Suld3DV2I32Clamp, 308276479Sdim Suld3DV2I64Clamp, 309276479Sdim Suld3DV4I8Clamp, 310276479Sdim Suld3DV4I16Clamp, 311276479Sdim Suld3DV4I32Clamp, 312276479Sdim 313276479Sdim Suld1DI8Trap, 314276479Sdim Suld1DI16Trap, 315276479Sdim Suld1DI32Trap, 316276479Sdim Suld1DI64Trap, 317276479Sdim Suld1DV2I8Trap, 318276479Sdim Suld1DV2I16Trap, 319276479Sdim Suld1DV2I32Trap, 320276479Sdim Suld1DV2I64Trap, 321276479Sdim Suld1DV4I8Trap, 322276479Sdim Suld1DV4I16Trap, 323276479Sdim Suld1DV4I32Trap, 324276479Sdim 325276479Sdim Suld1DArrayI8Trap, 326276479Sdim Suld1DArrayI16Trap, 327276479Sdim Suld1DArrayI32Trap, 328276479Sdim Suld1DArrayI64Trap, 329276479Sdim Suld1DArrayV2I8Trap, 330276479Sdim Suld1DArrayV2I16Trap, 331276479Sdim Suld1DArrayV2I32Trap, 332276479Sdim Suld1DArrayV2I64Trap, 333276479Sdim Suld1DArrayV4I8Trap, 334276479Sdim Suld1DArrayV4I16Trap, 335276479Sdim Suld1DArrayV4I32Trap, 336276479Sdim 337276479Sdim Suld2DI8Trap, 338276479Sdim Suld2DI16Trap, 339276479Sdim Suld2DI32Trap, 340276479Sdim Suld2DI64Trap, 341276479Sdim Suld2DV2I8Trap, 342276479Sdim Suld2DV2I16Trap, 343276479Sdim Suld2DV2I32Trap, 344276479Sdim Suld2DV2I64Trap, 345276479Sdim Suld2DV4I8Trap, 346276479Sdim Suld2DV4I16Trap, 347276479Sdim Suld2DV4I32Trap, 348276479Sdim 349276479Sdim Suld2DArrayI8Trap, 350276479Sdim Suld2DArrayI16Trap, 351276479Sdim Suld2DArrayI32Trap, 352276479Sdim Suld2DArrayI64Trap, 353276479Sdim Suld2DArrayV2I8Trap, 354276479Sdim Suld2DArrayV2I16Trap, 355276479Sdim Suld2DArrayV2I32Trap, 356276479Sdim Suld2DArrayV2I64Trap, 357276479Sdim Suld2DArrayV4I8Trap, 358276479Sdim Suld2DArrayV4I16Trap, 359276479Sdim Suld2DArrayV4I32Trap, 360276479Sdim 361276479Sdim Suld3DI8Trap, 362276479Sdim Suld3DI16Trap, 363276479Sdim Suld3DI32Trap, 364276479Sdim Suld3DI64Trap, 365276479Sdim Suld3DV2I8Trap, 366276479Sdim Suld3DV2I16Trap, 367276479Sdim Suld3DV2I32Trap, 368276479Sdim Suld3DV2I64Trap, 369276479Sdim Suld3DV4I8Trap, 370276479Sdim Suld3DV4I16Trap, 371276479Sdim Suld3DV4I32Trap, 372276479Sdim 373276479Sdim Suld1DI8Zero, 374276479Sdim Suld1DI16Zero, 375276479Sdim Suld1DI32Zero, 376276479Sdim Suld1DI64Zero, 377276479Sdim Suld1DV2I8Zero, 378276479Sdim Suld1DV2I16Zero, 379276479Sdim Suld1DV2I32Zero, 380276479Sdim Suld1DV2I64Zero, 381276479Sdim Suld1DV4I8Zero, 382276479Sdim Suld1DV4I16Zero, 383276479Sdim Suld1DV4I32Zero, 384276479Sdim 385276479Sdim Suld1DArrayI8Zero, 386276479Sdim Suld1DArrayI16Zero, 387276479Sdim Suld1DArrayI32Zero, 388276479Sdim Suld1DArrayI64Zero, 389276479Sdim Suld1DArrayV2I8Zero, 390276479Sdim Suld1DArrayV2I16Zero, 391276479Sdim Suld1DArrayV2I32Zero, 392276479Sdim Suld1DArrayV2I64Zero, 393276479Sdim Suld1DArrayV4I8Zero, 394276479Sdim Suld1DArrayV4I16Zero, 395276479Sdim Suld1DArrayV4I32Zero, 396276479Sdim 397276479Sdim Suld2DI8Zero, 398276479Sdim Suld2DI16Zero, 399276479Sdim Suld2DI32Zero, 400276479Sdim Suld2DI64Zero, 401276479Sdim Suld2DV2I8Zero, 402276479Sdim Suld2DV2I16Zero, 403276479Sdim Suld2DV2I32Zero, 404276479Sdim Suld2DV2I64Zero, 405276479Sdim Suld2DV4I8Zero, 406276479Sdim Suld2DV4I16Zero, 407276479Sdim Suld2DV4I32Zero, 408276479Sdim 409276479Sdim Suld2DArrayI8Zero, 410276479Sdim Suld2DArrayI16Zero, 411276479Sdim Suld2DArrayI32Zero, 412276479Sdim Suld2DArrayI64Zero, 413276479Sdim Suld2DArrayV2I8Zero, 414276479Sdim Suld2DArrayV2I16Zero, 415276479Sdim Suld2DArrayV2I32Zero, 416276479Sdim Suld2DArrayV2I64Zero, 417276479Sdim Suld2DArrayV4I8Zero, 418276479Sdim Suld2DArrayV4I16Zero, 419276479Sdim Suld2DArrayV4I32Zero, 420276479Sdim 421276479Sdim Suld3DI8Zero, 422276479Sdim Suld3DI16Zero, 423276479Sdim Suld3DI32Zero, 424276479Sdim Suld3DI64Zero, 425276479Sdim Suld3DV2I8Zero, 426276479Sdim Suld3DV2I16Zero, 427276479Sdim Suld3DV2I32Zero, 428276479Sdim Suld3DV2I64Zero, 429276479Sdim Suld3DV4I8Zero, 430276479Sdim Suld3DV4I16Zero, 431276479Sdim Suld3DV4I32Zero 432239310Sdim}; 433239310Sdim} 434239310Sdim 435276479Sdimclass NVPTXSubtarget; 436276479Sdim 437239310Sdim//===--------------------------------------------------------------------===// 438239310Sdim// TargetLowering Implementation 439239310Sdim//===--------------------------------------------------------------------===// 440239310Sdimclass NVPTXTargetLowering : public TargetLowering { 441239310Sdimpublic: 442288943Sdim explicit NVPTXTargetLowering(const NVPTXTargetMachine &TM, 443288943Sdim const NVPTXSubtarget &STI); 444276479Sdim SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 445239310Sdim 446239310Sdim SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const; 447239310Sdim 448276479Sdim const char *getTargetNodeName(unsigned Opcode) const override; 449239310Sdim 450249423Sdim bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I, 451327952Sdim MachineFunction &MF, 452276479Sdim unsigned Intrinsic) const override; 453239310Sdim 454239310Sdim /// isLegalAddressingMode - Return true if the addressing mode represented 455239310Sdim /// by AM is legal for this target, for a load/store of the specified type 456239310Sdim /// Used to guide target specific optimizations, like loop strength 457239310Sdim /// reduction (LoopStrengthReduce.cpp) and memory optimization for 458239310Sdim /// address mode (CodeGenPrepare.cpp) 459288943Sdim bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty, 460327952Sdim unsigned AS, 461327952Sdim Instruction *I = nullptr) const override; 462239310Sdim 463296417Sdim bool isTruncateFree(Type *SrcTy, Type *DstTy) const override { 464296417Sdim // Truncating 64-bit to 32-bit is free in SASS. 465296417Sdim if (!SrcTy->isIntegerTy() || !DstTy->isIntegerTy()) 466296417Sdim return false; 467296417Sdim return SrcTy->getPrimitiveSizeInBits() == 64 && 468296417Sdim DstTy->getPrimitiveSizeInBits() == 32; 469296417Sdim } 470239310Sdim 471288943Sdim EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Ctx, 472288943Sdim EVT VT) const override { 473249423Sdim if (VT.isVector()) 474276479Sdim return EVT::getVectorVT(Ctx, MVT::i1, VT.getVectorNumElements()); 475239310Sdim return MVT::i1; 476239310Sdim } 477239310Sdim 478288943Sdim ConstraintType getConstraintType(StringRef Constraint) const override; 479249423Sdim std::pair<unsigned, const TargetRegisterClass *> 480288943Sdim getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, 481288943Sdim StringRef Constraint, MVT VT) const override; 482239310Sdim 483309124Sdim SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, 484309124Sdim bool isVarArg, 485309124Sdim const SmallVectorImpl<ISD::InputArg> &Ins, 486309124Sdim const SDLoc &dl, SelectionDAG &DAG, 487309124Sdim SmallVectorImpl<SDValue> &InVals) const override; 488239310Sdim 489276479Sdim SDValue LowerCall(CallLoweringInfo &CLI, 490276479Sdim SmallVectorImpl<SDValue> &InVals) const override; 491239310Sdim 492288943Sdim std::string getPrototype(const DataLayout &DL, Type *, const ArgListTy &, 493239310Sdim const SmallVectorImpl<ISD::OutputArg> &, 494261991Sdim unsigned retAlignment, 495327952Sdim ImmutableCallSite CS) const; 496239310Sdim 497309124Sdim SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, 498309124Sdim const SmallVectorImpl<ISD::OutputArg> &Outs, 499309124Sdim const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl, 500309124Sdim SelectionDAG &DAG) const override; 501239310Sdim 502276479Sdim void LowerAsmOperandForConstraint(SDValue Op, std::string &Constraint, 503276479Sdim std::vector<SDValue> &Ops, 504276479Sdim SelectionDAG &DAG) const override; 505239310Sdim 506280031Sdim const NVPTXTargetMachine *nvTM; 507239310Sdim 508239310Sdim // PTX always uses 32-bit shift amounts 509288943Sdim MVT getScalarShiftAmountTy(const DataLayout &, EVT) const override { 510288943Sdim return MVT::i32; 511288943Sdim } 512239310Sdim 513276479Sdim TargetLoweringBase::LegalizeTypeAction 514344779Sdim getPreferredVectorAction(MVT VT) const override; 515249423Sdim 516321369Sdim // Get the degree of precision we want from 32-bit floating point division 517321369Sdim // operations. 518321369Sdim // 519321369Sdim // 0 - Use ptx div.approx 520321369Sdim // 1 - Use ptx.div.full (approximate, but less so than div.approx) 521321369Sdim // 2 - Use IEEE-compliant div instructions, if available. 522321369Sdim int getDivF32Level() const; 523321369Sdim 524321369Sdim // Get whether we should use a precise or approximate 32-bit floating point 525321369Sdim // sqrt instruction. 526321369Sdim bool usePrecSqrtF32() const; 527321369Sdim 528321369Sdim // Get whether we should use instructions that flush floating-point denormals 529321369Sdim // to sign-preserving zero. 530321369Sdim bool useF32FTZ(const MachineFunction &MF) const; 531321369Sdim 532321369Sdim SDValue getSqrtEstimate(SDValue Operand, SelectionDAG &DAG, int Enabled, 533321369Sdim int &ExtraSteps, bool &UseOneConst, 534321369Sdim bool Reciprocal) const override; 535321369Sdim 536321369Sdim unsigned combineRepeatedFPDivisors() const override { return 2; } 537321369Sdim 538276479Sdim bool allowFMA(MachineFunction &MF, CodeGenOpt::Level OptLevel) const; 539321369Sdim bool allowUnsafeFPMath(MachineFunction &MF) const; 540276479Sdim 541360784Sdim bool isFMAFasterThanFMulAndFAdd(const MachineFunction &MF, 542360784Sdim EVT) const override { 543360784Sdim return true; 544360784Sdim } 545276479Sdim 546280031Sdim bool enableAggressiveFMAFusion(EVT VT) const override { return true; } 547280031Sdim 548321369Sdim // The default is to transform llvm.ctlz(x, false) (where false indicates that 549321369Sdim // x == 0 is not undefined behavior) into a branch that checks whether x is 0 550321369Sdim // and avoids calling ctlz in that case. We have a dedicated ctlz 551321369Sdim // instruction, so we say that ctlz is cheap to speculate. 552321369Sdim bool isCheapToSpeculateCtlz() const override { return true; } 553321369Sdim 554239310Sdimprivate: 555288943Sdim const NVPTXSubtarget &STI; // cache the subtarget here 556261991Sdim SDValue getParamSymbol(SelectionDAG &DAG, int idx, EVT) const; 557239310Sdim 558321369Sdim SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const; 559239310Sdim SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const; 560321369Sdim SDValue LowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const; 561243830Sdim 562353358Sdim SDValue LowerFROUND(SDValue Op, SelectionDAG &DAG) const; 563353358Sdim SDValue LowerFROUND32(SDValue Op, SelectionDAG &DAG) const; 564353358Sdim SDValue LowerFROUND64(SDValue Op, SelectionDAG &DAG) const; 565353358Sdim 566249423Sdim SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG) const; 567249423Sdim SDValue LowerLOADi1(SDValue Op, SelectionDAG &DAG) const; 568249423Sdim 569243830Sdim SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG) const; 570249423Sdim SDValue LowerSTOREi1(SDValue Op, SelectionDAG &DAG) const; 571249423Sdim SDValue LowerSTOREVector(SDValue Op, SelectionDAG &DAG) const; 572249423Sdim 573276479Sdim SDValue LowerShiftRightParts(SDValue Op, SelectionDAG &DAG) const; 574276479Sdim SDValue LowerShiftLeftParts(SDValue Op, SelectionDAG &DAG) const; 575261991Sdim 576288943Sdim SDValue LowerSelect(SDValue Op, SelectionDAG &DAG) const; 577288943Sdim 578276479Sdim void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results, 579276479Sdim SelectionDAG &DAG) const override; 580276479Sdim SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override; 581276479Sdim 582327952Sdim unsigned getArgumentAlignment(SDValue Callee, ImmutableCallSite CS, Type *Ty, 583327952Sdim unsigned Idx, const DataLayout &DL) const; 584239310Sdim}; 585239310Sdim} // namespace llvm 586239310Sdim 587280031Sdim#endif 588