Searched refs:MemIndexedMode (Results 1 - 25 of 28) sorted by relevance

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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelLowering.h96 ISD::MemIndexedMode &AM,
100 SDValue &Offset, ISD::MemIndexedMode &AM,
H A DAVRISelDAGToDAG.cpp123 ISD::MemIndexedMode AM = LD->getAddressingMode();
170 ISD::MemIndexedMode AM = LD->getAddressingMode();
H A DAVRISelLowering.cpp774 ISD::MemIndexedMode &AM,
831 ISD::MemIndexedMode &AM,
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DSelectionDAGNodes.h563 // LSBaseSDNode => enum ISD::MemIndexedMode
564 // MaskedLoadStoreBaseSDNode => enum ISD::MemIndexedMode
1027 static const char* getIndexedModeName(ISD::MemIndexedMode AM);
2193 SDVTList VTs, ISD::MemIndexedMode AM, EVT MemVT,
2206 ISD::MemIndexedMode getAddressingMode() const {
2207 return static_cast<ISD::MemIndexedMode>(LSBaseSDNodeBits.AddressingMode);
2227 ISD::MemIndexedMode AM, ISD::LoadExtType ETy, EVT MemVT,
2255 ISD::MemIndexedMode AM, bool isTrunc, EVT MemVT,
2288 ISD::MemIndexedMode AM, EVT MemVT,
2310 ISD::MemIndexedMode getAddressingMod
[all...]
H A DISDOpcodes.h958 /// MemIndexedMode enum - This enum defines the load / store indexed
985 enum MemIndexedMode { enum in namespace:llvm::ISD
H A DSelectionDAG.h1119 SDValue Offset, ISD::MemIndexedMode AM);
1120 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
1126 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
1149 SDValue Offset, ISD::MemIndexedMode AM);
1153 MachineMemOperand *MMO, ISD::MemIndexedMode AM,
1156 SDValue Offset, ISD::MemIndexedMode AM);
1159 MachineMemOperand *MMO, ISD::MemIndexedMode AM,
1163 ISD::MemIndexedMode AM);
H A DBasicTTIImpl.h174 static ISD::MemIndexedMode getISDIndexedMode(TTI::MemIndexedMode M) {
187 llvm_unreachable("Unexpected MemIndexedMode");
248 bool isIndexedLoadLegal(TTI::MemIndexedMode M, Type *Ty,
254 bool isIndexedStoreLegal(TTI::MemIndexedMode M, Type *Ty,
H A DTargetLowering.h2980 ISD::MemIndexedMode &/*AM*/,
2991 ISD::MemIndexedMode &/*AM*/,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.h181 ISD::MemIndexedMode &AM,
H A DMSP430ISelDAGToDAG.cpp299 ISD::MemIndexedMode AM = LD->getAddressingMode();
H A DMSP430ISelLowering.cpp1342 ISD::MemIndexedMode &AM,
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DTargetTransformInfo.h1085 enum MemIndexedMode { enum in class:llvm::TargetTransformInfo
1094 bool isIndexedLoadLegal(enum MemIndexedMode Mode, Type *Ty) const;
1097 bool isIndexedStoreLegal(enum MemIndexedMode Mode, Type *Ty) const;
1377 virtual bool isIndexedLoadLegal(MemIndexedMode Mode, Type *Ty) const = 0;
1378 virtual bool isIndexedStoreLegal(MemIndexedMode Mode,Type *Ty) const = 0;
1832 bool isIndexedLoadLegal(MemIndexedMode Mode, Type *Ty) const override {
1835 bool isIndexedStoreLegal(MemIndexedMode Mode, Type *Ty) const override {
H A DTargetTransformInfoImpl.h566 bool isIndexedLoadLegal(TTI::MemIndexedMode Mode, Type *Ty,
571 bool isIndexedStoreLegal(TTI::MemIndexedMode Mode, Type *Ty,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.h803 ISD::MemIndexedMode &AM, bool &IsInc,
806 ISD::MemIndexedMode &AM,
809 SDValue &Offset, ISD::MemIndexedMode &AM,
H A DAArch64ISelDAGToDAG.cpp1191 ISD::MemIndexedMode AM = LD->getAddressingMode();
H A DAArch64ISelLowering.cpp12728 ISD::MemIndexedMode &AM,
12752 ISD::MemIndexedMode &AM,
12774 ISD::MemIndexedMode &AM, SelectionDAG &DAG) const {
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.h402 ISD::MemIndexedMode &AM,
409 SDValue &Offset, ISD::MemIndexedMode &AM,
H A DARMISelDAGToDAG.cpp790 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD)
826 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD)
846 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD)
925 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD)
1045 ISD::MemIndexedMode AM = LdSt->getAddressingMode();
1327 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD)
1379 ISD::MemIndexedMode AM;
1523 ISD::MemIndexedMode AM = LD->getAddressingMode();
1603 ISD::MemIndexedMode AM = LD->getAddressingMode();
1629 ISD::MemIndexedMode A
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.h264 ISD::MemIndexedMode &AM,
H A DHexagonISelDAGToDAG.cpp451 ISD::MemIndexedMode AM = LD->getAddressingMode();
560 ISD::MemIndexedMode AM = ST->getAddressingMode();
H A DHexagonISelLowering.cpp600 SDValue &Base, SDValue &Offset, ISD::MemIndexedMode &AM,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Analysis/
H A DTargetTransformInfo.cpp794 bool TargetTransformInfo::isIndexedLoadLegal(MemIndexedMode Mode,
799 bool TargetTransformInfo::isIndexedStoreLegal(MemIndexedMode Mode,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp454 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
H A DSelectionDAG.cpp6794 SDValue SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
6819 SDValue SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
6906 ISD::MemIndexedMode AM) {
7039 ISD::MemIndexedMode AM) {
7069 ISD::MemIndexedMode AM,
7101 ISD::MemIndexedMode AM) {
7114 ISD::MemIndexedMode AM, bool IsTruncating,
7149 ISD::MemIndexedMode AM) {
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.h705 ISD::MemIndexedMode &AM,

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