Searched refs:Addr (Results 1 - 25 of 32) sorted by relevance

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/barrelfish-master/usr/skb/programs/
H A Ddecoding_net.pl55 Addr #>= Base,
56 Addr #< Base + Size,
59 address:Addr
66 address:Addr
68 get_bounds(Addr,Min,Max),
70 ( get_domain_size(Addr,Size) ->
89 maps_to_name([Map|_],Addr,Name) :-
100 Addr :: Range,
102 DestAddr #= Addr - SrcBase + DestBase.
104 maps_to_name([_|Maps],Addr,Nam
[all...]
H A Dirq_routing.pl21 findgsi(Pin, Addr, Gsi, Pir) :-
24 prt(Addr, Pin, PrtEntry)
27 Addr = addr(Bus, Device, _),
42 assignirq(Pin, Addr, Pir, Gsi) :-
44 findgsi(Pin, Addr, Gsi, Pir),
66 assigndeviceirq(Addr) :-
67 device(_, Addr, _, _, _, _, _, Pin),
71 assignedGsi(Addr, Pin, Gsi),
74 assignirq(Pin, Addr, Pir, Gsi),
75 assert(assignedGsi(Addr, Pi
[all...]
H A Dbridge_linux.pl22 convert_devices([buselement(device, Addr ,Regions)|T], L) :-
26 param(Addr)
39 El = buselement(device, Addr, BAR, Base, High, Size, mem, Prefetch, pcie, Bits),
40 assert(bar(Addr,BAR,_,Size,_,_,_))
48 convert_bridges([buselement(bridge, Addr, S, m(B1,H1), p(B2, H2),_)|T], L) :-
51 Bridge1 = [buselement(bridge, Addr, S, B1, H1, S1, mem, nonprefetchable, pcie, 0)];
56 Bridge2 = [buselement(bridge, Addr, S, B2, H2, S2, mem, prefetchable, pcie, 0)];
H A Dbridge_postorder.pl43 findall(root(Addr,Child,mem(LP,HP)),
44 ( rootbridge(Addr,Child,mem(L,H)),
85 root(Addr,childbus(MinBus,MaxBus),mem(LMem,HMem)) = Root,
90 constrain_bus(Granularity, Type, _, Addr,MinBus,MaxBus,LMem,HMem,BusElementListP),
91 devicetree(BusElementListP,buselement(bridge,Addr,secondary(MinBus),RBaseP,RHighP,RSizeP, Type, _, _, _),T),
94 % constrain_bus(Granularity, Type, prefetchable, Addr,MinBus,MaxBus,LMem,HMem,BusElementListP),
95 % devicetree(BusElementListP,buselement(bridge,Addr,secondary(MinBus),RBaseP,RHighP,RSizeP, Type, prefetchable, _, _),TP),
98 % constrain_bus(Granularity, Type, nonprefetchable, Addr,MinBus,MaxBus,LMem,HMem,BusElementListNP),
99 % devicetree(BusElementListNP,buselement(bridge,Addr,secondary(MinBus),RBaseNP,RHighNP,RSizeNP, Type, nonprefetchable, _, _),TNP),
116 subtract(Lista,[buselement(bridge,Addr,
[all...]
H A Dbridge_page_orig_naturally_aligned.pl29 findall(root(Addr,Child,mem(LP,HP)),
30 ( rootbridge(Addr,Child,mem(L,H)),
103 root(Addr,childbus(MinBus,MaxBus),mem(LMem,HMem)) = Root,
108 constrain_bus(Granularity, Type, prefetchable, Addr,MinBus,MaxBus,LMem,HMem,BusElementListP),
112 devicetree(BusElementListP,buselement(bridge,Addr,secondary(MinBus),RBaseP,RHighP,RSizeP, Type, prefetchable, _, _),TP),
115 constrain_bus(Granularity, Type, nonprefetchable, Addr,MinBus,MaxBus,LMem,HMem,BusElementListNP),
119 devicetree(BusElementListNP,buselement(bridge,Addr,secondary(MinBus),RBaseNP,RHighNP,RSizeNP, Type, nonprefetchable, _, _),TNP),
134 subtract(Lista,[buselement(bridge,Addr,_,_,_,_,_,prefetchable,_,_)],Pl3),
135 subtract(Pl3,[buselement(bridge,Addr,_,_,_,_,_,nonprefetchable,_,_)],Pl2),
239 ( buselement(device,Addr,BA
[all...]
H A Dbridge_page.pl42 merge_address_windows(Addr, Output) :-
44 findall(range(Base, High), (rootbridge_address_window(Addr, mem(B, H)),
55 get_address_window(Addr, Min, Max) :-
56 findall(Low, rootbridge_address_window(Addr, mem(Low, _)), LowList),
57 findall(High, rootbridge_address_window(Addr, mem(_, High)), HighList),
78 findall(root(Addr,Child,mem(LP,HP), Ranges),
79 ( rootbridge(Addr,Child, _),
80 merge_address_windows(Addr, Ranges),
81 get_address_window(Addr, L, H),
179 should_shift_bridge(Addr, Se
[all...]
H A Dbridge_postorder_sorted.pl47 findall(root(Addr,Child,mem(LP,HP)),
48 ( rootbridge(Addr,Child,mem(L,H)),
89 root(Addr,childbus(MinBus,MaxBus),mem(LMem,HMem)) = Root,
93 constrain_bus(Granularity, Type, _, Addr,MinBus,MaxBus,LMem,HMem,BusElementListP),
94 devicetree(BusElementListP,buselement(bridge,Addr,secondary(MinBus),RBaseP,RHighP,RSizeP, Type, _, _, _),T),
97 % constrain_bus(Granularity, Type, prefetchable, Addr,MinBus,MaxBus,LMem,HMem,BusElementListP),
98 % devicetree(BusElementListP,buselement(bridge,Addr,secondary(MinBus),RBaseP,RHighP,RSizeP, Type, prefetchable, _, _),TP),
101 % constrain_bus(Granularity, Type, nonprefetchable, Addr,MinBus,MaxBus,LMem,HMem,BusElementListNP),
102 % devicetree(BusElementListNP,buselement(bridge,Addr,secondary(MinBus),RBaseNP,RHighNP,RSizeNP, Type, nonprefetchable, _, _),TNP),
119 subtract(Lista,[buselement(bridge,Addr,
[all...]
H A Dbridge_postorder_sorted_sum.pl48 findall(root(Addr,Child,mem(LP,HP)),
49 ( rootbridge(Addr,Child,mem(L,H)),
90 root(Addr,childbus(MinBus,MaxBus),mem(LMem,HMem)) = Root,
95 constrain_bus(Granularity, Type, _, Addr,MinBus,MaxBus,LMem,HMem,BusElementListP),
97 writeln(Addr),
99 devicetree(BusElementListP,buselement(bridge,Addr,secondary(MinBus),RBaseP,RHighP,RSizeP, Type, _, _, _),T),
102 % constrain_bus(Granularity, Type, prefetchable, Addr,MinBus,MaxBus,LMem,HMem,BusElementListP),
103 % devicetree(BusElementListP,buselement(bridge,Addr,secondary(MinBus),RBaseP,RHighP,RSizeP, Type, prefetchable, _, _),TP),
106 % constrain_bus(Granularity, Type, nonprefetchable, Addr,MinBus,MaxBus,LMem,HMem,BusElementListNP),
107 % devicetree(BusElementListNP,buselement(bridge,Addr,secondar
[all...]
H A Dbridge_postorder_sorted_sum_ascending.pl47 findall(root(Addr,Child,mem(LP,HP)),
48 ( rootbridge(Addr,Child,mem(L,H)),
89 root(Addr,childbus(MinBus,MaxBus),mem(LMem,HMem)) = Root,
94 constrain_bus(Granularity, Type, _, Addr,MinBus,MaxBus,LMem,HMem,BusElementListP),
95 devicetree(BusElementListP,buselement(bridge,Addr,secondary(MinBus),RBaseP,RHighP,RSizeP, Type, _, _, _),T),
98 % constrain_bus(Granularity, Type, prefetchable, Addr,MinBus,MaxBus,LMem,HMem,BusElementListP),
99 % devicetree(BusElementListP,buselement(bridge,Addr,secondary(MinBus),RBaseP,RHighP,RSizeP, Type, prefetchable, _, _),TP),
102 % constrain_bus(Granularity, Type, nonprefetchable, Addr,MinBus,MaxBus,LMem,HMem,BusElementListNP),
103 % devicetree(BusElementListNP,buselement(bridge,Addr,secondary(MinBus),RBaseNP,RHighNP,RSizeNP, Type, nonprefetchable, _, _),TNP),
120 subtract(Lista,[buselement(bridge,Addr,
[all...]
H A Dbridge_postorder_sorted_ascending.pl47 findall(root(Addr,Child,mem(LP,HP)),
48 ( rootbridge(Addr,Child,mem(L,H)),
89 root(Addr,childbus(MinBus,MaxBus),mem(LMem,HMem)) = Root,
94 constrain_bus(Granularity, Type, _, Addr,MinBus,MaxBus,LMem,HMem,BusElementListP),
95 devicetree(BusElementListP,buselement(bridge,Addr,secondary(MinBus),RBaseP,RHighP,RSizeP, Type, _, _, _),T),
98 % constrain_bus(Granularity, Type, prefetchable, Addr,MinBus,MaxBus,LMem,HMem,BusElementListP),
99 % devicetree(BusElementListP,buselement(bridge,Addr,secondary(MinBus),RBaseP,RHighP,RSizeP, Type, prefetchable, _, _),TP),
102 % constrain_bus(Granularity, Type, nonprefetchable, Addr,MinBus,MaxBus,LMem,HMem,BusElementListNP),
103 % devicetree(BusElementListNP,buselement(bridge,Addr,secondary(MinBus),RBaseNP,RHighNP,RSizeNP, Type, nonprefetchable, _, _),TNP),
120 subtract(Lista,[buselement(bridge,Addr,
[all...]
H A Ddecoding_net2.pl14 % Addr = [kind, [1,2,3]]
66 name{address: Addr} = Name,
67 address_aligned(Addr, Bits).
188 iblock_iaddress_gt([Block | Bs], [Addr | As]) :-
192 Addr #> Limit,
200 iblock_limit_iaddress([Block | Bs], [Addr | As]) :-
202 limit: Addr
211 iblock_base_iaddress([Block | Bs], [Addr | As]) :-
213 base: Addr
254 accept(NodeId, Addr)
[all...]
H A Ddecoding_net4_support.pl317 % Addr - PCI address, should be provided by caller.
319 remove_pci(S, Addr, NewS) :-
320 node_enum_exists(Addr, Enum),
335 add_xeon_phi(S, Addr, Enum, NewS) :-
336 add_pci_internal(S, Addr, Enum, add_XEONPHI, add_XEONPHI_IOMMU, S1),
368 add_pci(S, Addr, Enum, NewS) :-
369 add_pci_internal(S, Addr, Enum, add_PCI, add_PCI_IOMMU, NewS).
383 node_enum_exists(Addr, OldEnum),
384 Addr = addr(_,_,_),
385 remove_pci(S, Addr, S
[all...]
H A Dcompute_required_resources.pl87 buselement(device,Addr,BAR,_,_,_,mem,_, _, _) = H,
88 bar(Addr,BAR,_,S,_,_,_),
95 buselement(device,Addr,BAR,_,_,_,mem,prefetchable, _, _) = El,
96 bar(Addr,BAR,_,S,mem,prefetchable,_)
100 buselement(device,Addr,BAR,_,_,_,mem,nonprefetchable, _, _) = El2,
101 bar(Addr,BAR,_,S,mem,nonprefetchable,_)
293 write(Addr),write('\\l'),
H A Dbridge_bios.pl106 ( buselement(device,Addr,BAR,Base,High,Size,_,_,_,_) = H ->
107 assert(currentbar(Addr,BAR,Base,High,Size));
115 ( buselement(device,Addr,BAR,_,_,_,_,_,_,_) = H ->
116 ( currentbar(Addr,BAR,_,_,_) ->
117 retract(currentbar(Addr,BAR,_,_,_));
H A Ddecoding_net3.pl17 % Addr = [kind, 1]
192 name{address: Addr} = Name,
193 address_aligned(Addr, Bits).
248 address_match_region(Addr, region{blocks:Blocks}) :-
249 address_match(Addr, Blocks).
281 iblock_iaddress_gt(Block, Addr) :-
285 Addr #> Limit.
353 block_limit_address([K, Block], [K, Addr]) :-
355 limit: Addr
359 block_base_address([K, Block], [K, Addr])
[all...]
H A Ddecoding_net3_multid.pl14 % Addr = [kind, [1,2,3]]
190 name{address: Addr} = Name,
191 address_aligned(Addr, Bits).
251 address_match_region(Addr, region{blocks:Blocks}) :-
252 address_match(Addr, Blocks).
315 iblock_iaddress_gt([Block | Bs], [Addr | As]) :-
319 Addr #> Limit,
389 iblock_limit_iaddress([Block | Bs], [Addr | As]) :-
391 limit: Addr
400 iblock_base_iaddress([Block | Bs], [Addr | A
[all...]
H A Dbridge_fake_babybel.pl28 convert_devices([buselement(device, Addr ,Regions)|T], L) :-
32 param(Addr)
48 El = buselement(device, Addr, BAR, Base, High, Size, mem, Prefetch, pcie, Bits),
49 assert(bar(Addr,BAR,_,Size,_,_,_))
57 convert_bridges([buselement(bridge, Addr, S, m(B1,H1), p(B2, H2),_)|T], L) :-
60 Bridge1 = [buselement(bridge, Addr, S, B1, H1+1, S1+1, mem, nonprefetchable, pcie, 0)];
65 Bridge2 = [buselement(bridge, Addr, S, B2, H2+1, S2+1, mem, prefetchable, pcie, 0)];
594 root(Addr,childbus(MinBus,MaxBus),mem(LMem,HMem)) = Root,
599 constrain_bus(Granularity, Type, prefetchable, Addr,MinBus,MaxBus,LMem,HMem,BusElementListP),
603 devicetree(BusElementListP,buselement(bridge,Addr,secondar
[all...]
H A Dbridge.pl39 findall(root(Addr,Child,Mem),rootbridge(Addr,Child,Mem),Roots),
51 root(Addr,childbus(MinBus,MaxBus),mem(LMem,HMem)) = Root,
53 constrain_bus(Addr,MinBus,MaxBus,0,X,BusElementList),
57 devicetree(BusElementList,buselement(bridge,Addr,secondary(MinBus),RBase,RHigh,RSize),T),
70 subtract(Lista,[buselement(bridge,Addr,_,_,_,_)],Pl),
313 ( foreach(Addr, DeviceAddresses),
317 ( (bar(Addr,_,Base,_,_),
318 buselement(_,Addr,_,B,_,_) = Device) ->
H A Ddecoding_net_queries.pl112 find_device_region(region{node_id:Core,namespace:[],base:Addr,size:Size},region{name:Id}),
113 Next = [reg(Addr,Size)|Prev]
H A Dbridge_fake_bigfish.pl101 root(Addr,childbus(MinBus,MaxBus),mem(LMem,HMem)) = Root,
106 constrain_bus(Granularity, Type, prefetchable, Addr,MinBus,MaxBus,LMem,HMem,BusElementListP),
110 devicetree(BusElementListP,buselement(bridge,Addr,secondary(MinBus),RBaseP,RHighP,RSizeP, Type, prefetchable, _, _),TP),
113 constrain_bus(Granularity, Type, nonprefetchable, Addr,MinBus,MaxBus,LMem,HMem,BusElementListNP),
117 devicetree(BusElementListNP,buselement(bridge,Addr,secondary(MinBus),RBaseNP,RHighNP,RSizeNP, Type, nonprefetchable, _, _),TNP),
133 subtract(Lista,[buselement(bridge,Addr,_,_,_,_,_,prefetchable,_,_)],Pl3),
134 subtract(Pl3,[buselement(bridge,Addr,_,_,_,_,_,nonprefetchable,_,_)],Pl2),
247 ( buselement(device,Addr,BAR,Base,High,Size,_,_,_,_) = H ->
248 assert(currentbar(Addr,BAR,Base,High,Size));
256 ( buselement(device,Addr,BA
[all...]
/barrelfish-master/lib/compiler-rt/builtins/
H A Dclear_cache.c45 static void clear_mips_cache(const void *Addr, size_t Size) { argument
52 "daddu %[Size], %[Addr], %[Size]\n" // Calculate end address + 1
60 "synci 0(%[Addr])\n" // Synchronize all caches around
62 "daddu %[Addr], %[Addr], $v0\n" // Add step size.
63 "sltu $at, %[Addr], %[Size]\n" // Compare current with end
80 : [ Addr ] "+r"(Addr), [ Size ] "+r"(Size)::"at", "ra", "v0", "memory");
/barrelfish-master/include/sys/
H A Delf_generic.h58 __ElfType(Addr); variable
/barrelfish-master/lib/posixcompat/
H A Ddlfcn.c62 const ElfW(Addr) addr = DL_LOOKUP_ADDRESS (address);
/barrelfish-master/usr/eclipseclp/Kernel/lib/
H A Dprofile.pl156 getw(S, Addr),
157 loop_addr(Addr, S, Preds, 0, Ticks),
161 loop_addr(Addr, S, Preds, T, Ticks) :-
162 integer(Addr),
164 (search(Addr, Preds, pred(_, I, _, _)) ->
/barrelfish-master/usr/eclipseclp/Kernel/src/
H A Dprintam.c134 #define Addr p_fprintf(current_output_, "0x%x ", *code++); macro
136 #define Addr p_fprintf(current_output_, "0x%x ", *code++ & 0xfff); macro
1164 Addr;
1242 Addr;
1249 Addr;
1261 Addr;
1268 Addr;
1371 Addr;

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