Lines Matching refs:Addr
28 convert_devices([buselement(device, Addr ,Regions)|T], L) :-
32 param(Addr)
48 El = buselement(device, Addr, BAR, Base, High, Size, mem, Prefetch, pcie, Bits),
49 assert(bar(Addr,BAR,_,Size,_,_,_))
57 convert_bridges([buselement(bridge, Addr, S, m(B1,H1), p(B2, H2),_)|T], L) :-
60 Bridge1 = [buselement(bridge, Addr, S, B1, H1+1, S1+1, mem, nonprefetchable, pcie, 0)];
65 Bridge2 = [buselement(bridge, Addr, S, B2, H2+1, S2+1, mem, prefetchable, pcie, 0)];
594 root(Addr,childbus(MinBus,MaxBus),mem(LMem,HMem)) = Root,
599 constrain_bus(Granularity, Type, prefetchable, Addr,MinBus,MaxBus,LMem,HMem,BusElementListP),
603 devicetree(BusElementListP,buselement(bridge,Addr,secondary(MinBus),RBaseP,RHighP,RSizeP, Type, prefetchable, _, _),TP),
606 constrain_bus(Granularity, Type, nonprefetchable, Addr,MinBus,MaxBus,LMem,HMem,BusElementListNP),
610 devicetree(BusElementListNP,buselement(bridge,Addr,secondary(MinBus),RBaseNP,RHighNP,RSizeNP, Type, nonprefetchable, _, _),TNP),
626 subtract(Lista,[buselement(bridge,Addr,_,_,_,_,_,prefetchable,_,_)],Pl3),
627 subtract(Pl3,[buselement(bridge,Addr,_,_,_,_,_,nonprefetchable,_,_)],Pl2),
737 ( buselement(device,Addr,BAR,Base,High,Size,_,_,_,_) = H ->
738 assert(currentbar(Addr,BAR,Base,High,Size));
746 ( buselement(device,Addr,BAR,_,_,_,_,_,_,_) = H ->
747 ( currentbar(Addr,BAR,_,_,_) ->
748 retract(currentbar(Addr,BAR,_,_,_));