Lines Matching refs:Addr
43 findall(root(Addr,Child,mem(LP,HP)),
44 ( rootbridge(Addr,Child,mem(L,H)),
85 root(Addr,childbus(MinBus,MaxBus),mem(LMem,HMem)) = Root,
90 constrain_bus(Granularity, Type, _, Addr,MinBus,MaxBus,LMem,HMem,BusElementListP),
91 devicetree(BusElementListP,buselement(bridge,Addr,secondary(MinBus),RBaseP,RHighP,RSizeP, Type, _, _, _),T),
94 % constrain_bus(Granularity, Type, prefetchable, Addr,MinBus,MaxBus,LMem,HMem,BusElementListP),
95 % devicetree(BusElementListP,buselement(bridge,Addr,secondary(MinBus),RBaseP,RHighP,RSizeP, Type, prefetchable, _, _),TP),
98 % constrain_bus(Granularity, Type, nonprefetchable, Addr,MinBus,MaxBus,LMem,HMem,BusElementListNP),
99 % devicetree(BusElementListNP,buselement(bridge,Addr,secondary(MinBus),RBaseNP,RHighNP,RSizeNP, Type, nonprefetchable, _, _),TNP),
116 subtract(Lista,[buselement(bridge,Addr,_,_,_,_,_,_,_,_)],Pl),
121 % subtract(Lista,[buselement(bridge,Addr,_,_,_,_,_,prefetchable,_,_)],Pl3),
122 % subtract(Pl3,[buselement(bridge,Addr,_,_,_,_,_,nonprefetchable,_,_)],Pl2),
215 buselement(Type,Addr,BAR,Base,High,Size,_,_,_,_) = Node,
264 device(_,Addr,_,_,Class, SubClass, ProgIf,_),bar(Addr,BAR,B,H,_,_,_)
367 ( buselement(device,Addr,BAR,Base,High,Size,_,_,_,_) = H ->
368 assert(currentbar(Addr,BAR,Base,High,Size));
376 ( buselement(device,Addr,BAR,_,_,_,_,_,_,_) = H ->
377 ( currentbar(Addr,BAR,_,_,_) ->
378 retract(currentbar(Addr,BAR,_,_,_));