/haiku/src/add-ons/print/drivers/lpstyl/ |
H A D | Lpstyl.h | 44 int _GetStatus(char reg);
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/haiku/headers/private/debugger/types/ |
H A D | ValueLocation.h | 31 uint32 reg; // register number member in union:ValuePieceLocation::__anon1 107 void SetToRegister(uint32 reg) argument 110 this->reg = reg;
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/haiku/src/add-ons/kernel/drivers/network/ether/rdc/dev/vte/ |
H A D | if_vtevar.h | 151 #define CSR_WRITE_2(_sc, reg, val) \ 152 bus_write_2((_sc)->vte_res, (reg), (val)) 153 #define CSR_READ_2(_sc, reg) \ 154 bus_read_2((_sc)->vte_res, (reg))
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/haiku/src/system/boot/platform/riscv/ |
H A D | fdt.cpp | 59 const uint8* prop = (const uint8*)fdt_getprop(fdt, node, "reg", &propSize); 113 "reg", NULL) + 0)); 115 "reg", NULL) + 1)); 123 uint64* reg = (uint64*)fdt_getprop(fdt, node, "reg", NULL); local 124 sClint.start = fdt64_to_cpu(*(reg + 0)); 125 sClint.size = fdt64_to_cpu(*(reg + 1)); 148 uint64* reg = (uint64*)fdt_getprop(fdt, node, "reg", NULL); local 150 fdt64_to_cpu(*(reg 162 uint64* reg = (uint64*)fdt_getprop(fdt, node, "reg", NULL); local [all...] |
/haiku/src/add-ons/kernel/drivers/network/wlan/realtekwifi/dev/rtwn/rtl8188e/ |
H A D | r88e_fw.c | 107 uint16_t reg; local 109 reg = rtwn_read_2(sc, R92C_SYS_FUNC_EN); 110 rtwn_write_2(sc, R92C_SYS_FUNC_EN, reg & ~R92C_SYS_FUNC_EN_CPUEN); 114 reg | R92C_SYS_FUNC_EN_CPUEN); 139 uint32_t reg; local 141 reg = R88E_MACID_NO_LINK; 143 reg += 4; 146 rtwn_setbits_4(sc, reg, 1 << (id % 32), 0); 148 rtwn_setbits_4(sc, reg, 0, 1 << (id % 32));
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/haiku/src/add-ons/accelerants/nvidia/engine/ |
H A D | nv_info.c | 15 uint16 MacroTablePtr; /* ptr to list with items containing multiple 32bit reg writes */ 42 static void log_pll(uint32 reg, uint32 freq); 46 static status_t translate_ISA_PCI(uint32* reg); 428 uint32 reg, data, data2, and_out, or_in; local 451 reg = *((uint32*)(&(rom[adress]))); 456 LOG(8,("cmd 'calculate indirect and set PLL 32bit reg $%08x for %.3fMHz'\n", 457 reg, ((float)data2))); 463 NV_REG32(reg) = ((p << 16) | (n << 8) | m); 465 log_pll(reg, data2); 479 reg 796 log_pll(uint32 reg, uint32 freq) argument 1015 uint32 reg, reg2, data, data2, and_out, and_out2, or_in, or_in2, safe32, offset32, size32; local 1835 uint32 reg, and_out, and_out2, offset32; local 2017 translate_ISA_PCI(uint32* reg) argument 2075 set_pll(uint32 reg, uint32 req_clk) argument [all...] |
/haiku/src/add-ons/kernel/drivers/network/ether/via_rhine/dev/vr/ |
H A D | if_vrreg.h | 753 #define CSR_WRITE_4(sc, reg, val) bus_write_4(sc->vr_res, reg, val) 754 #define CSR_WRITE_2(sc, reg, val) bus_write_2(sc->vr_res, reg, val) 755 #define CSR_WRITE_1(sc, reg, val) bus_write_1(sc->vr_res, reg, val) 757 #define CSR_READ_2(sc, reg) bus_read_2(sc->vr_res, reg) 758 #define CSR_READ_1(sc, reg) bus_read_1(sc->vr_res, reg) [all...] |
/haiku/src/add-ons/accelerants/radeon/ |
H A D | CP.h | 81 #define WRITE_IB_REG( reg, value ) \ 82 do { buffer[0] = CP_PACKET0( (reg), 1 ); \
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/haiku/src/add-ons/media/media-add-ons/usb_vision/ |
H A D | AddOn.h | 49 status_t USBVisionWriteRegister(uint8 reg, uint8 *data, uint8 len = sizeof(uint8)); 50 status_t USBVisionReadRegister(uint8 reg, uint8 *data, uint8 len = sizeof(uint8));
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/haiku/src/kits/debugger/dwarf/ |
H A D | CfaContext.h | 46 void SetReturnAddressRegister(uint32 reg); 53 void RestoreRegisterRule(uint32 reg);
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/haiku/headers/private/kernel/arch/m68k/ |
H A D | arch_platform.h | 51 virtual uint8 ReadRTCReg(uint8 reg) = 0; 52 virtual void WriteRTCReg(uint8 reg, uint8 val) = 0;
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/haiku/src/add-ons/kernel/drivers/network/ether/attansic_l1/dev/age/ |
H A D | if_agevar.h | 239 #define CSR_WRITE_4(_sc, reg, val) \ 240 bus_write_4((_sc)->age_res[0], (reg), (val)) 241 #define CSR_WRITE_2(_sc, reg, val) \ 242 bus_write_2((_sc)->age_res[0], (reg), (val)) 243 #define CSR_READ_2(_sc, reg) \ 244 bus_read_2((_sc)->age_res[0], (reg)) 245 #define CSR_READ_4(_sc, reg) \ 246 bus_read_4((_sc)->age_res[0], (reg))
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/haiku/src/add-ons/kernel/drivers/graphics/radeon_hd/ |
H A D | device.cpp | 75 uint32 reg = parse_expression(argv[1]); local 81 kprintf("radeon_hd register %#lx\n", reg); 84 uint32 oldValue = read32(info.registers + reg); 89 write32(info.registers + reg, value); 91 value = read32(info.registers + reg);
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/haiku/src/add-ons/kernel/drivers/network/ether/usb_davicom/ |
H A D | DavicomDevice.h | 144 status_t _ReadRegister(uint8 reg, size_t size, uint8* buffer); 145 status_t _WriteRegister(uint8 reg, size_t size, uint8* buffer); 146 status_t _Write1Register(uint8 reg, uint8 buffer); 147 status_t _ReadMII(uint8 reg, uint16* data); 148 status_t _WriteMII(uint8 reg, uint16 data);
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/haiku/src/add-ons/kernel/drivers/ports/pc_serial/ |
H A D | SerialDevice.h | 96 uint8 ReadReg8(int reg); 97 void WriteReg8(int reg, uint8 value); 98 void OrReg8(int reg, uint8 value); 99 void AndReg8(int reg, uint8 value); 100 void MaskReg8(int reg, uint8 value);
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/haiku/src/add-ons/kernel/drivers/network/ether/jmicron2x0/dev/jme/ |
H A D | if_jme.c | 217 jme_miibus_readreg(device_t dev, int phy, int reg) argument 230 SMI_PHY_ADDR(phy) | SMI_REG_ADDR(reg)); 238 device_printf(sc->jme_dev, "phy read timeout : %d\n", reg); 249 jme_miibus_writereg(device_t dev, int phy, int reg, int val) argument 262 SMI_PHY_ADDR(phy) | SMI_REG_ADDR(reg)); 270 device_printf(sc->jme_dev, "phy write timeout : %d\n", reg); 356 uint32_t reg; local 361 reg = CSR_READ_4(sc, JME_SMBCSR); 362 if ((reg & SMBCSR_HW_BUSY_MASK) == SMBCSR_HW_IDLE) 372 reg 396 uint8_t fup, reg, val; local 442 uint32_t reg; local 631 uint32_t reg; local 1979 uint32_t reg; local 2769 uint32_t reg; local 3074 uint32_t reg; local 3094 uint32_t reg; local 3227 uint32_t reg; local 3335 uint32_t reg; local 3373 uint32_t reg; local 3390 uint32_t reg; local [all...] |
/haiku/src/add-ons/kernel/drivers/network/ether/dec21xxx/dev/dc/ |
H A D | dcphy.c | 75 #define DC_SETBIT(sc, reg, x) \ 76 CSR_WRITE_4(sc, reg, \ 77 CSR_READ_4(sc, reg) | x) 79 #define DC_CLRBIT(sc, reg, x) \ 80 CSR_WRITE_4(sc, reg, \ 81 CSR_READ_4(sc, reg) & ~x) 193 int reg; local 265 reg = CSR_READ_4(dc_sc, DC_10BTSTAT); 266 if (!(reg & DC_TSTAT_LS10) || !(reg [all...] |
/haiku/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/ |
H A D | e1000_82571.c | 1152 u32 reg; local 1157 reg = E1000_READ_REG(hw, E1000_TXDCTL(0)); 1158 reg |= (1 << 22); 1159 E1000_WRITE_REG(hw, E1000_TXDCTL(0), reg); 1162 reg = E1000_READ_REG(hw, E1000_TXDCTL(1)); 1163 reg |= (1 << 22); 1164 E1000_WRITE_REG(hw, E1000_TXDCTL(1), reg); 1167 reg = E1000_READ_REG(hw, E1000_TARC(0)); 1168 reg &= ~(0xF << 27); /* 30:27 */ 1172 reg | [all...] |
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5312/ |
H A D | ar5312_reset.c | 69 uint32_t reg = V(i, 0); local 72 if (!(bChannelChange && IS_NO_RESET_TIMER_ADDR(reg))) { 73 OS_REG_WRITE(ah, reg, V(i, 1)); 276 /* Clear reg to alllow RX_CLEAR line debug */ 402 * Disable: reg val 414 /* flush SCAL reg */ 773 uint32_t reg; local 796 reg = OS_REG_READ(ah, 801 reg |= resetBB; /* Cold and warm reset the baseband bits */ 807 reg [all...] |
/haiku/src/add-ons/kernel/drivers/network/ether/attansic_l1/dev/mii/ |
H A D | atphy.c | 278 uint32_t reg; local 285 reg = PHY_READ(sc, ATPHY_SCR); 287 reg |= ATPHY_SCR_AUTO_X_MODE; 289 reg &= ~ATPHY_SCR_MAC_PDOWN; 291 reg |= ATPHY_SCR_ASSERT_CRS_ON_TX; 293 reg |= ATPHY_SCR_POLARITY_REVERSAL; 294 PHY_WRITE(sc, ATPHY_SCR, reg);
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/haiku/src/add-ons/kernel/drivers/audio/ac97/sis7018/ |
H A D | Stream.cpp | 269 uint32 reg = 0; local 272 reg = fDevice->ReadPCI32(RegALiDigiMixer); 273 fDevice->WritePCI32(RegALiDigiMixer, reg | (1 << _HWVoice())); 276 reg = fDevice->ReadPCI8(RegCodecStatus); 278 reg | CodecStatusADCON | CodecStatusSBCtrl); 283 reg = fDevice->ReadPCI16(RegMiscINT); 284 fDevice->WritePCI8(RegMiscINT, reg | 0x1000); 324 uint32 reg = fDevice->ReadPCI32(RegALiDigiMixer); local 325 fDevice->WritePCI32(RegALiDigiMixer, reg & ~(1 << _HWVoice()));
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/haiku/src/add-ons/kernel/drivers/network/ether/pcnet/dev/pcn/ |
H A D | if_pcn.c | 200 #define PCN_CSR_SETBIT(sc, reg, x) \ 201 pcn_csr_write(sc, reg, pcn_csr_read(sc, reg) | (x)) 203 #define PCN_CSR_CLRBIT(sc, reg, x) \ 204 pcn_csr_write(sc, reg, pcn_csr_read(sc, reg) & ~(x)) 206 #define PCN_BCR_SETBIT(sc, reg, x) \ 207 pcn_bcr_write(sc, reg, pcn_bcr_read(sc, reg) | (x)) 209 #define PCN_BCR_CLRBIT(sc, reg, [all...] |
/haiku/src/apps/debugger/user_interface/gui/team_window/ |
H A D | RegistersView.cpp | 158 const Register* reg = fArchitecture->Registers() + rowIndex; local 162 value.SetTo(reg->Name(), B_VARIANT_DONT_COPY_DATA); 167 if (!fCpuState->GetRegisterValue(reg, value)) 169 else if (reg->Format() == REGISTER_FORMAT_SIMD) { 172 reg->BitSize(),fSIMDFormat, output)); 320 const Register* reg = fArchitecture->Registers() + rowIndex; local 321 if (reg->Format() == REGISTER_FORMAT_FLOAT) { 333 if (reg->Format() == REGISTER_FORMAT_INTEGER) { 353 } else if (reg->Format() == REGISTER_FORMAT_SIMD) {
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/haiku/src/add-ons/kernel/busses/usb/ |
H A D | xhci.h | 201 inline void WriteOpReg(uint32 reg, uint32 value); 202 inline uint32 ReadOpReg(uint32 reg); 203 inline status_t WaitOpBits(uint32 reg, uint32 mask, uint32 expected); 206 inline uint32 ReadCapReg32(uint32 reg); 207 inline void WriteCapReg32(uint32 reg, uint32 value); 210 inline uint32 ReadRunReg32(uint32 reg); 211 inline void WriteRunReg32(uint32 reg, uint32 value); 214 inline uint32 ReadDoorReg32(uint32 reg); 215 inline void WriteDoorReg32(uint32 reg, uint32 value);
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/haiku/src/add-ons/kernel/drivers/network/ether/atheros81xx/dev/ale/ |
H A D | if_ale.c | 206 ale_miibus_readreg(device_t dev, int phy, int reg) argument 215 MDIO_SUP_PREAMBLE | MDIO_CLK_25_4 | MDIO_REG_ADDR(reg)); 224 device_printf(sc->ale_dev, "phy read timeout : %d\n", reg); 232 ale_miibus_writereg(device_t dev, int phy, int reg, int val) argument 242 MDIO_SUP_PREAMBLE | MDIO_CLK_25_4 | MDIO_REG_ADDR(reg)); 251 device_printf(sc->ale_dev, "phy write timeout : %d\n", reg); 262 uint32_t reg; local 295 reg = CSR_READ_4(sc, ALE_MAC_CFG); 296 reg |= MAC_CFG_TX_ENB | MAC_CFG_RX_ENB; 297 CSR_WRITE_4(sc, ALE_MAC_CFG, reg); 365 uint32_t ea[2], reg; local 1499 uint32_t reg, pmcs; local 2084 uint32_t reg; local 2116 uint32_t *reg; local 2136 uint32_t *reg; local 2598 uint32_t reg; local 2641 uint32_t reg, rxf_hi, rxf_lo; local 2870 uint32_t reg; local 2921 uint32_t reg; local 2999 uint32_t reg; local [all...] |