1/*-
2 * SPDX-License-Identifier: BSD-4-Clause
3 *
4 * Copyright (c) 1997, 1998, 1999
5 *	Bill Paul <wpaul@ee.columbia.edu>.  All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 *    must display the following acknowledgement:
17 *	This product includes software developed by Bill Paul.
18 * 4. Neither the name of the author nor the names of any co-contributors
19 *    may be used to endorse or promote products derived from this software
20 *    without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
32 * THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35#include <sys/cdefs.h>
36__FBSDID("$FreeBSD: releng/12.0/sys/dev/dc/dcphy.c 325966 2017-11-18 14:26:50Z pfg $");
37
38/*
39 * Pseudo-driver for internal NWAY support on DEC 21143 and workalike
40 * controllers.  Technically we're abusing the miibus code to handle
41 * media selection and NWAY support here since there is no MII
42 * interface.  However the logical operations are roughly the same,
43 * and the alternative is to create a fake MII interface in the driver,
44 * which is harder to do.
45 */
46
47#include <sys/param.h>
48#include <sys/systm.h>
49#include <sys/kernel.h>
50#include <sys/socket.h>
51#include <sys/errno.h>
52#include <sys/lock.h>
53#include <sys/module.h>
54#include <sys/mutex.h>
55#include <sys/bus.h>
56
57#include <net/if.h>
58#include <net/if_var.h>
59#include <net/if_arp.h>
60#include <net/if_media.h>
61
62#include <dev/mii/mii.h>
63#include <dev/mii/miivar.h>
64#include "miidevs.h"
65
66#include <machine/bus.h>
67#include <machine/resource.h>
68
69#include <dev/pci/pcivar.h>
70
71#include <dev/dc/if_dcreg.h>
72
73#include "miibus_if.h"
74
75#define DC_SETBIT(sc, reg, x)                           \
76        CSR_WRITE_4(sc, reg,                            \
77                CSR_READ_4(sc, reg) | x)
78
79#define DC_CLRBIT(sc, reg, x)                           \
80        CSR_WRITE_4(sc, reg,                            \
81                CSR_READ_4(sc, reg) & ~x)
82
83#define MIIF_AUTOTIMEOUT	0x0004
84
85/*
86 * This is the subsystem ID for the built-in 21143 ethernet
87 * in several Compaq Presario systems.  Apparently these are
88 * 10Mbps only, so we need to treat them specially.
89 */
90#define COMPAQ_PRESARIO_ID	0xb0bb0e11
91
92static int dcphy_probe(device_t);
93static int dcphy_attach(device_t);
94
95static device_method_t dcphy_methods[] = {
96	/* device interface */
97	DEVMETHOD(device_probe,		dcphy_probe),
98	DEVMETHOD(device_attach,	dcphy_attach),
99	DEVMETHOD(device_detach,	mii_phy_detach),
100	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
101	DEVMETHOD_END
102};
103
104static devclass_t dcphy_devclass;
105
106static driver_t dcphy_driver = {
107	"dcphy",
108	dcphy_methods,
109	sizeof(struct mii_softc)
110};
111
112DRIVER_MODULE(dcphy, miibus, dcphy_driver, dcphy_devclass, 0, 0);
113
114static int	dcphy_service(struct mii_softc *, struct mii_data *, int);
115static void	dcphy_status(struct mii_softc *);
116static void	dcphy_reset(struct mii_softc *);
117static int	dcphy_auto(struct mii_softc *);
118
119static const struct mii_phy_funcs dcphy_funcs = {
120	dcphy_service,
121	dcphy_status,
122	dcphy_reset
123};
124
125static int
126dcphy_probe(device_t dev)
127{
128	struct mii_attach_args *ma;
129
130	ma = device_get_ivars(dev);
131
132	/*
133	 * The dc driver will report the 21143 vendor and device
134	 * ID to let us know that it wants us to attach.
135	 */
136	if (ma->mii_id1 != DC_VENDORID_DEC ||
137	    ma->mii_id2 != DC_DEVICEID_21143)
138		return (ENXIO);
139
140	device_set_desc(dev, "Intel 21143 NWAY media interface");
141
142	return (BUS_PROBE_DEFAULT);
143}
144
145static int
146dcphy_attach(device_t dev)
147{
148	struct mii_softc *sc;
149	struct dc_softc		*dc_sc;
150	device_t brdev;
151
152	sc = device_get_softc(dev);
153
154	mii_phy_dev_attach(dev, MIIF_NOISOLATE | MIIF_NOMANPAUSE,
155	    &dcphy_funcs, 0);
156
157	/*PHY_RESET(sc);*/
158	dc_sc = if_getsoftc(sc->mii_pdata->mii_ifp);
159	CSR_WRITE_4(dc_sc, DC_10BTSTAT, 0);
160	CSR_WRITE_4(dc_sc, DC_10BTCTRL, 0);
161
162	brdev = device_get_parent(sc->mii_dev);
163	switch (pci_get_subdevice(brdev) << 16 | pci_get_subvendor(brdev)) {
164	case COMPAQ_PRESARIO_ID:
165		/* Example of how to only allow 10Mbps modes. */
166		sc->mii_capabilities = BMSR_ANEG | BMSR_10TFDX | BMSR_10THDX;
167		break;
168	default:
169		if (dc_sc->dc_pmode == DC_PMODE_SIA)
170			sc->mii_capabilities =
171			    BMSR_ANEG | BMSR_10TFDX | BMSR_10THDX;
172		else
173			sc->mii_capabilities =
174			    BMSR_ANEG | BMSR_100TXFDX | BMSR_100TXHDX |
175			    BMSR_10TFDX | BMSR_10THDX;
176		break;
177	}
178
179	sc->mii_capabilities &= sc->mii_capmask;
180	device_printf(dev, " ");
181	mii_phy_add_media(sc);
182	printf("\n");
183
184	MIIBUS_MEDIAINIT(sc->mii_dev);
185	return (0);
186}
187
188static int
189dcphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
190{
191	struct dc_softc		*dc_sc;
192	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
193	int reg;
194	u_int32_t		mode;
195
196	dc_sc = if_getsoftc(mii->mii_ifp);
197
198	switch (cmd) {
199	case MII_POLLSTAT:
200		break;
201
202	case MII_MEDIACHG:
203		/*
204		 * If the interface is not up, don't do anything.
205		 */
206		if ((if_getflags(mii->mii_ifp) & IFF_UP) == 0)
207			break;
208
209		mii->mii_media_active = IFM_NONE;
210		mode = CSR_READ_4(dc_sc, DC_NETCFG);
211		mode &= ~(DC_NETCFG_FULLDUPLEX | DC_NETCFG_PORTSEL |
212		    DC_NETCFG_PCS | DC_NETCFG_SCRAMBLER | DC_NETCFG_SPEEDSEL);
213
214		switch (IFM_SUBTYPE(ife->ifm_media)) {
215		case IFM_AUTO:
216			/*PHY_RESET(sc);*/
217			(void)dcphy_auto(sc);
218			break;
219		case IFM_100_TX:
220			PHY_RESET(sc);
221			DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
222			mode |= DC_NETCFG_PORTSEL | DC_NETCFG_PCS |
223			    DC_NETCFG_SCRAMBLER;
224			if ((ife->ifm_media & IFM_FDX) != 0)
225				mode |= DC_NETCFG_FULLDUPLEX;
226			else
227				mode &= ~DC_NETCFG_FULLDUPLEX;
228			CSR_WRITE_4(dc_sc, DC_NETCFG, mode);
229			break;
230		case IFM_10_T:
231			DC_CLRBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
232			DC_CLRBIT(dc_sc, DC_10BTCTRL, 0xFFFF);
233			if ((ife->ifm_media & IFM_FDX) != 0)
234				DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3D);
235			else
236				DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3F);
237			DC_SETBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
238			DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
239			mode &= ~DC_NETCFG_PORTSEL;
240			mode |= DC_NETCFG_SPEEDSEL;
241			if ((ife->ifm_media & IFM_FDX) != 0)
242				mode |= DC_NETCFG_FULLDUPLEX;
243			else
244				mode &= ~DC_NETCFG_FULLDUPLEX;
245			CSR_WRITE_4(dc_sc, DC_NETCFG, mode);
246			break;
247		default:
248			return (EINVAL);
249		}
250		break;
251
252	case MII_TICK:
253		/*
254		 * Is the interface even up?
255		 */
256		if ((if_getflags(mii->mii_ifp) & IFF_UP) == 0)
257			return (0);
258
259		/*
260		 * Only used for autonegotiation.
261		 */
262		if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
263			break;
264
265		reg = CSR_READ_4(dc_sc, DC_10BTSTAT);
266		if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100))
267			break;
268
269                /*
270                 * Only retry autonegotiation every 5 seconds.
271		 *
272		 * Otherwise, fall through to calling dcphy_status()
273		 * since real Intel 21143 chips don't show valid link
274		 * status until autonegotiation is switched off, and
275		 * that only happens in dcphy_status().  Without this,
276		 * successful autonegotiation is never recognised on
277		 * these chips.
278                 */
279                if (++sc->mii_ticks <= 50)
280			break;
281
282		sc->mii_ticks = 0;
283		dcphy_auto(sc);
284
285		break;
286	}
287
288	/* Update the media status. */
289	PHY_STATUS(sc);
290
291	/* Callback if something changed. */
292	mii_phy_update(sc, cmd);
293	return (0);
294}
295
296static void
297dcphy_status(struct mii_softc *sc)
298{
299	struct mii_data *mii = sc->mii_pdata;
300	int anlpar, tstat;
301	struct dc_softc		*dc_sc;
302
303	dc_sc = if_getsoftc(mii->mii_ifp);
304
305	mii->mii_media_status = IFM_AVALID;
306	mii->mii_media_active = IFM_ETHER;
307
308	if ((if_getflags(mii->mii_ifp) & IFF_UP) == 0)
309		return;
310
311	tstat = CSR_READ_4(dc_sc, DC_10BTSTAT);
312	if (!(tstat & DC_TSTAT_LS10) || !(tstat & DC_TSTAT_LS100))
313		mii->mii_media_status |= IFM_ACTIVE;
314
315	if (CSR_READ_4(dc_sc, DC_10BTCTRL) & DC_TCTL_AUTONEGENBL) {
316		/* Erg, still trying, I guess... */
317		if ((tstat & DC_TSTAT_ANEGSTAT) != DC_ASTAT_AUTONEGCMP) {
318			if ((DC_IS_MACRONIX(dc_sc) || DC_IS_PNICII(dc_sc)) &&
319			    (tstat & DC_TSTAT_ANEGSTAT) == DC_ASTAT_DISABLE)
320				goto skip;
321			mii->mii_media_active |= IFM_NONE;
322			return;
323		}
324
325		if (tstat & DC_TSTAT_LP_CAN_NWAY) {
326			anlpar = tstat >> 16;
327			if (anlpar & ANLPAR_TX_FD &&
328			    sc->mii_capabilities & BMSR_100TXFDX)
329				mii->mii_media_active |= IFM_100_TX | IFM_FDX;
330			else if (anlpar & ANLPAR_T4 &&
331			    sc->mii_capabilities & BMSR_100T4)
332				mii->mii_media_active |= IFM_100_T4 | IFM_HDX;
333			else if (anlpar & ANLPAR_TX &&
334			    sc->mii_capabilities & BMSR_100TXHDX)
335				mii->mii_media_active |= IFM_100_TX | IFM_HDX;
336			else if (anlpar & ANLPAR_10_FD)
337				mii->mii_media_active |= IFM_10_T | IFM_FDX;
338			else if (anlpar & ANLPAR_10)
339				mii->mii_media_active |= IFM_10_T | IFM_HDX;
340			else
341				mii->mii_media_active |= IFM_NONE;
342			if (DC_IS_INTEL(dc_sc))
343				DC_CLRBIT(dc_sc, DC_10BTCTRL,
344				    DC_TCTL_AUTONEGENBL);
345			return;
346		}
347
348		/*
349		 * If the other side doesn't support NWAY, then the
350		 * best we can do is determine if we have a 10Mbps or
351		 * 100Mbps link.  There's no way to know if the link
352		 * is full or half duplex, so we default to half duplex
353		 * and hope that the user is clever enough to manually
354		 * change the media settings if we're wrong.
355		 */
356		if (!(tstat & DC_TSTAT_LS100))
357			mii->mii_media_active |= IFM_100_TX | IFM_HDX;
358		else if (!(tstat & DC_TSTAT_LS10))
359			mii->mii_media_active |= IFM_10_T | IFM_HDX;
360		else
361			mii->mii_media_active |= IFM_NONE;
362		if (DC_IS_INTEL(dc_sc))
363			DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
364		return;
365	}
366
367skip:
368	if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_SPEEDSEL)
369		mii->mii_media_active |= IFM_10_T;
370	else
371		mii->mii_media_active |= IFM_100_TX;
372	if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_FULLDUPLEX)
373		mii->mii_media_active |= IFM_FDX;
374	else
375		mii->mii_media_active |= IFM_HDX;
376}
377
378static int
379dcphy_auto(struct mii_softc *mii)
380{
381	struct dc_softc		*sc;
382
383	sc = if_getsoftc(mii->mii_pdata->mii_ifp);
384
385	DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL);
386	DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_FULLDUPLEX);
387	DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET);
388	if (mii->mii_capabilities & BMSR_100TXHDX)
389		CSR_WRITE_4(sc, DC_10BTCTRL, 0x3FFFF);
390	else
391		CSR_WRITE_4(sc, DC_10BTCTRL, 0xFFFF);
392	DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET);
393	DC_SETBIT(sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
394	DC_SETBIT(sc, DC_10BTSTAT, DC_ASTAT_TXDISABLE);
395
396	return (EJUSTRETURN);
397}
398
399static void
400dcphy_reset(struct mii_softc *mii)
401{
402	struct dc_softc		*sc;
403
404	sc = if_getsoftc(mii->mii_pdata->mii_ifp);
405
406	DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET);
407	DELAY(1000);
408	DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET);
409}
410