Searched refs:stream (Results 51 - 75 of 946) sorted by path

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/linux-master/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_crc.c86 static void amdgpu_dm_set_crc_window_default(struct drm_crtc *crtc, struct dc_stream_state *stream) argument
109 dc_stream_forward_crc_window(stream, NULL, true);
119 struct dc_stream_state *stream; local
136 stream = to_amdgpu_crtc(crtc)->dm_irq_params.stream;
137 phy_inst = stream->link->link_enc_hw_inst;
166 struct dc_stream_state *stream; local
175 stream = to_amdgpu_crtc(crtc)->dm_irq_params.stream;
178 dc_stream_forward_crc_window(stream,
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H A Damdgpu_dm_crtc.c127 struct dc_link *link = vblank_work->stream->link;
139 amdgpu_dm_replay_enable(vblank_work->stream, true);
142 amdgpu_dm_psr_disable(vblank_work->stream);
147 (struct amdgpu_dm_connector *) vblank_work->stream->dm_stream_context;
150 amdgpu_dm_psr_enable(vblank_work->stream);
181 if (vblank_work->stream && vblank_work->stream->link) {
185 vblank_work->stream->link->replay_settings.replay_feature_enabled);
190 dc_stream_release(vblank_work->stream);
240 if (acrtc_state->stream) {
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H A Damdgpu_dm_debugfs.c1023 if (dm_crtc_state->stream == NULL)
1026 switch (dm_crtc_state->stream->timing.display_color_depth) {
1074 if (dm_crtc_state->stream == NULL)
1077 switch (dm_crtc_state->stream->output_color_space) {
1219 if (pipe_ctx->stream &&
1220 pipe_ctx->stream->link == link)
1269 dc_stream_send_dp_sdp(acrtc_state->stream, data, write_size);
1497 if (pipe_ctx->stream &&
1498 pipe_ctx->stream->link == aconnector->dc_link &&
1499 pipe_ctx->stream
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H A Damdgpu_dm_helpers.c252 const struct dc_stream_state *stream,
261 aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context;
291 * stream. AMD ASIC stream slot allocation should follow the same
294 fill_dc_mst_payload_table_from_drm(stream->link, enable, target_payload, proposed_table);
321 const struct dc_stream_state *stream)
327 aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context;
347 const struct dc_stream_state *stream)
357 aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context;
381 const struct dc_stream_state *stream)
250 dm_helpers_dp_mst_write_payload_allocation_table( struct dc_context *ctx, const struct dc_stream_state *stream, struct dc_dp_mst_stream_allocation_table *proposed_table, bool enable) argument
319 dm_helpers_dp_mst_poll_for_allocation_change_trigger( struct dc_context *ctx, const struct dc_stream_state *stream) argument
345 dm_helpers_dp_mst_send_payload_allocation( struct dc_context *ctx, const struct dc_stream_state *stream) argument
379 dm_helpers_dp_mst_update_mst_mgr_for_deallocation( struct dc_context *ctx, const struct dc_stream_state *stream) argument
755 write_dsc_enable_synaptics_non_virtual_dpcd_mst( struct drm_dp_aux *aux, const struct dc_stream_state *stream, bool enable) argument
792 dm_helpers_dp_write_dsc_enable( struct dc_context *ctx, const struct dc_stream_state *stream, bool enable) argument
1106 dm_helpers_mst_enable_stream_features(const struct dc_stream_state *stream) argument
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H A Damdgpu_dm_irq_params.h34 struct dc_stream_state *stream; member in struct:dm_irq_params
H A Damdgpu_dm_mst_types.c704 /* ACK at DPCD to notify down stream */
1065 struct dc_stream_state *stream; local
1082 stream = dc_state->streams[i];
1084 if (stream->link != dc_link)
1087 aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context;
1094 stream->timing.flags.DSC = 0;
1096 params[count].timing = &stream->timing;
1097 params[count].sink = stream->sink;
1106 params[count].compression_possible = stream->sink->dsc_caps.dsc_dec_caps.is_dsc_supported;
1109 stream
1200 struct dc_stream_state *stream; local
1303 struct dc_stream_state *stream; local
1367 struct dc_stream_state *stream; local
1412 find_crtc_index_in_state_by_stream(struct drm_atomic_state *state, struct dc_stream_state *stream) argument
1495 struct dc_stream_state *stream = dm_state->context->streams[i]; local
1542 struct dc_stream_state *stream = dm_state->context->streams[i]; local
1556 struct dc_stream_state *stream = dm_state->context->streams[i]; local
1579 is_dsc_common_config_possible(struct dc_stream_state *stream, struct dc_dsc_bw_range *bw_range) argument
1595 dm_dp_mst_is_port_support_mode( struct amdgpu_dm_connector *aconnector, struct dc_stream_state *stream) argument
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H A Damdgpu_dm_mst_types.h91 struct dc_stream_state *stream);
H A Damdgpu_dm_plane.c1255 if (crtc_state && crtc_state->stream) {
1257 dc_stream_set_cursor_position(crtc_state->stream,
1285 if (crtc_state->stream) {
1287 if (!dc_stream_set_cursor_attributes(crtc_state->stream,
1291 if (!dc_stream_set_cursor_position(crtc_state->stream,
H A Damdgpu_dm_psr.c101 * @stream: stream state
105 bool amdgpu_dm_link_setup_psr(struct dc_stream_state *stream) argument
113 if (stream == NULL)
116 link = stream->link;
120 mod_power_calc_psr_configs(&psr_config, link, stream);
125 mod_power_only_edp(dc->current_state, stream);
129 if (!psr_su_set_dsc_slice_height(dc, link, stream, &psr_config))
132 ret = dc_link_setup_psr(link, stream, &psr_config, &psr_context);
142 * @stream
145 amdgpu_dm_psr_enable(struct dc_stream_state *stream) argument
204 amdgpu_dm_psr_disable(struct dc_stream_state *stream) argument
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H A Damdgpu_dm_psr.h35 void amdgpu_dm_psr_enable(struct dc_stream_state *stream);
36 bool amdgpu_dm_link_setup_psr(struct dc_stream_state *stream);
37 bool amdgpu_dm_psr_disable(struct dc_stream_state *stream);
H A Damdgpu_dm_replay.c142 * @stream: stream state
146 bool amdgpu_dm_replay_enable(struct dc_stream_state *stream, bool wait) argument
151 if (stream == NULL)
154 link = stream->link;
157 link->dc->link_srv->edp_setup_replay(link, stream);
158 link->dc->link_srv->edp_set_coasting_vtotal(link, stream->timing.v_total);
169 * @stream: stream state
173 bool amdgpu_dm_replay_disable(struct dc_stream_state *stream) argument
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H A Damdgpu_dm_replay.h42 bool amdgpu_dm_replay_enable(struct dc_stream_state *stream, bool enable);
45 bool amdgpu_dm_replay_disable(struct dc_stream_state *stream);
H A Damdgpu_dm_trace.h385 const struct dc_stream_state *stream,
388 TP_ARGS(pipe_idx, plane_state, stream, plane_res, update_flags),
392 __field(const void *, stream)
424 __entry->stream = stream;
425 __entry->stream_w = stream->timing.h_addressable;
426 __entry->stream_h = stream->timing.v_addressable;
453 TP_printk("pipe_idx=%d stream=%p rct(%d,%d) dst=(%d,%d,%d,%d) "
458 __entry->stream,
/linux-master/drivers/gpu/drm/amd/display/dc/basics/
H A Ddce_calcs.c2803 if (!pipe[i].stream || !pipe[i].bottom_pipe)
2822 data->h_total[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing.h_total);
2823 data->v_total[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing.v_total);
2824 data->pixel_rate[num_displays + 4] = bw_frc_to_fixed(pipe[i].stream->timing.pix_clk_100hz, 10000);
2915 if (!pipe[i].stream || pipe[i].bottom_pipe)
2921 data->h_total[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing.h_total);
2922 data->v_total[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing.v_total);
2923 pixel_clock_100hz = pipe[i].stream->timing.pix_clk_100hz;
2924 if (pipe[i].stream->timing.timing_3d_format == TIMING_3D_FORMAT_HW_FRAME_PACKING)
2976 } else if (pipe[i].stream
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/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/
H A Dclk_mgr.c60 const struct dc_stream_state *stream = context->streams[i]; local
65 if (dc_state_get_stream_subvp_type(context, stream) == SUBVP_PHANTOM)
69 * Only notify active stream or virtual stream.
70 * Need to notify virtual stream to work around
74 if (!stream->dpms_off || stream->signal == SIGNAL_TYPE_VIRTUAL)
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/
H A Ddce_clk_mgr.c173 if (pipe_ctx->stream == NULL)
186 if (dc_is_dp_signal(pipe_ctx->stream->signal) &&
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/
H A Ddce110_clk_mgr.c98 struct dc_stream_state *stream = context->streams[j]; local
101 uint32_t vertical_total_min = stream->timing.v_total;
102 struct dc_crtc_timing_adjust adjust = stream->adjust;
106 vertical_blank_in_pixels = stream->timing.h_total *
108 - stream->timing.v_addressable);
110 * 10000 / stream->timing.pix_clk_100hz;
129 const struct dc_stream_state *stream = context->streams[j]; local
135 if (stream == context->res_ctx.pipe_ctx[k].stream) {
142 /* only notify active stream */
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/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
H A Drn_clk_mgr.c62 const struct dc_stream_state *stream = context->streams[i]; local
64 if (stream->signal == SIGNAL_TYPE_HDMI_TYPE_A ||
65 stream->signal == SIGNAL_TYPE_DVI_SINGLE_LINK ||
66 stream->signal == SIGNAL_TYPE_DVI_DUAL_LINK)
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
H A Dvg_clk_mgr.c71 const struct dc_stream_state *stream = context->streams[i]; local
73 if (stream->signal == SIGNAL_TYPE_HDMI_TYPE_A ||
74 stream->signal == SIGNAL_TYPE_DVI_SINGLE_LINK ||
75 stream->signal == SIGNAL_TYPE_DVI_DUAL_LINK)
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
H A Ddcn31_clk_mgr.c84 const struct dc_stream_state *stream = context->streams[i]; local
86 if (stream->signal == SIGNAL_TYPE_HDMI_TYPE_A ||
87 stream->signal == SIGNAL_TYPE_DVI_SINGLE_LINK ||
88 stream->signal == SIGNAL_TYPE_DVI_DUAL_LINK)
91 /* Checking stream / link detection ensuring that PHY is active*/
92 if (dc_is_dp_signal(stream->signal) && !stream->dpms_off)
123 if (pipe->stream && (pipe->stream->dpms_off || dc_is_virtual_signal(pipe->stream
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/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
H A Ddcn314_clk_mgr.c119 const struct dc_stream_state *stream = context->streams[i]; local
121 if (stream->signal == SIGNAL_TYPE_HDMI_TYPE_A ||
122 stream->signal == SIGNAL_TYPE_DVI_SINGLE_LINK ||
123 stream->signal == SIGNAL_TYPE_DVI_DUAL_LINK)
126 /* Checking stream / link detection ensuring that PHY is active*/
127 if (dc_is_dp_signal(stream->signal) && !stream->dpms_off)
161 if (pipe->stream && (pipe->stream->dpms_off || dc_is_virtual_signal(pipe->stream
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/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
H A Ddcn315_clk_mgr.c66 const struct dc_stream_state *stream = context->streams[i]; local
68 if (stream->signal == SIGNAL_TYPE_HDMI_TYPE_A ||
69 stream->signal == SIGNAL_TYPE_DVI_SINGLE_LINK ||
70 stream->signal == SIGNAL_TYPE_DVI_DUAL_LINK)
94 if (pipe->stream->link->link_enc && pipe->stream->link->link_enc->funcs->is_dig_enabled &&
95 pipe->stream->link->link_enc->funcs->is_dig_enabled(pipe->stream->link->link_enc))
110 if (pipe->stream && (pipe->stream
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
H A Ddcn316_clk_mgr.c78 const struct dc_stream_state *stream = context->streams[i]; local
80 if (stream->signal == SIGNAL_TYPE_HDMI_TYPE_A ||
81 stream->signal == SIGNAL_TYPE_DVI_SINGLE_LINK ||
82 stream->signal == SIGNAL_TYPE_DVI_DUAL_LINK)
115 if (pipe->stream && (pipe->stream->dpms_off || dc_is_virtual_signal(pipe->stream->signal) ||
116 !pipe->stream->link_enc)) {
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/
H A Ddcn32_clk_mgr.c494 if (pipe->stream->timing.h_addressable == width &&
495 pipe->stream->timing.v_addressable == height &&
518 if (pipe_ctx->stream && dc_state_get_pipe_subvp_type(context, pipe_ctx) != SUBVP_PHANTOM) {
573 pix_clk_list[i] = curr_pipe_ctx->stream->timing.pix_clk_100hz;
576 refresh_rate = (curr_pipe_ctx->stream->timing.pix_clk_100hz * (uint64_t)100 +
577 curr_pipe_ctx->stream->timing.v_total * curr_pipe_ctx->stream->timing.h_total - (uint64_t)1);
578 refresh_rate = div_u64(refresh_rate, curr_pipe_ctx->stream->timing.v_total);
579 refresh_rate = div_u64(refresh_rate, curr_pipe_ctx->stream->timing.h_total);
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/
H A Ddcn35_clk_mgr.c99 const struct dc_stream_state *stream = context->streams[i]; local
101 if (stream->signal == SIGNAL_TYPE_HDMI_TYPE_A ||
102 stream->signal == SIGNAL_TYPE_DVI_SINGLE_LINK ||
103 stream->signal == SIGNAL_TYPE_DVI_DUAL_LINK)
137 if (pipe->stream && (pipe->stream->dpms_off || dc_is_virtual_signal(pipe->stream->signal) ||
138 !pipe->stream->link_enc)) {

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