Searched refs:reg (Results 476 - 500 of 7230) sorted by relevance

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/linux-master/drivers/misc/
H A Dad525x_dpot-i2c.c19 static int write_r8d8(void *client, u8 reg, u8 val) argument
21 return i2c_smbus_write_byte_data(client, reg, val);
24 static int write_r8d16(void *client, u8 reg, u16 val) argument
26 return i2c_smbus_write_word_data(client, reg, val);
34 static int read_r8d8(void *client, u8 reg) argument
36 return i2c_smbus_read_byte_data(client, reg);
39 static int read_r8d16(void *client, u8 reg) argument
41 return i2c_smbus_read_word_data(client, reg);
/linux-master/drivers/clk/renesas/
H A Dclk-emev2.c66 u32 reg[2]; local
69 if (WARN_ON(of_property_read_u32_array(np, "reg", reg, 2)))
74 smu_base + reg[0], reg[1], 8, 0, &lock);
83 u32 reg[2]; local
86 if (WARN_ON(of_property_read_u32_array(np, "reg", reg, 2)))
91 smu_base + reg[0], reg[
[all...]
/linux-master/drivers/clk/axs10x/
H A Dpll_clock.c33 * reg should be an u32 variable.
36 #define PLL_REG_GET_LOW(reg) \
37 (((reg) & (0x3F << 0)) >> 0)
38 #define PLL_REG_GET_HIGH(reg) \
39 (((reg) & (0x3F << 6)) >> 6)
40 #define PLL_REG_GET_EDGE(reg) \
41 (((reg) & (BIT(12))) ? 1 : 0)
42 #define PLL_REG_GET_BYPASS(reg) \
43 (((reg) & (BIT(13))) ? 1 : 0)
44 #define PLL_REG_GET_NOUPD(reg) \
98 axs10x_pll_write(struct axs10x_pll_clk *clk, u32 reg, u32 val) argument
104 axs10x_pll_read(struct axs10x_pll_clk *clk, u32 reg) argument
114 axs10x_div_get_value(u32 reg) argument
[all...]
/linux-master/arch/loongarch/lib/
H A Dxor_simd.c19 #define LD(reg, base, offset) \
20 "vld $vr" #reg ", %[" #base "], " #offset "\n\t"
21 #define ST(reg, base, offset) \
22 "vst $vr" #reg ", %[" #base "], " #offset "\n\t"
62 #define LD(reg, base, offset) \
63 "xvld $xr" #reg ", %[" #base "], " #offset "\n\t"
64 #define ST(reg, base, offset) \
65 "xvst $xr" #reg ", %[" #base "], " #offset "\n\t"
/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn303/
H A Ddcn303_hwseq.c38 #define REG(reg)\
39 hws->regs->reg
/linux-master/drivers/gpu/drm/i915/display/
H A Dintel_sdvo.h21 i915_reg_t reg, enum port port);
29 i915_reg_t reg, enum port port)
28 intel_sdvo_init(struct drm_i915_private *dev_priv, i915_reg_t reg, enum port port) argument
H A Dintel_fdi.c467 i915_reg_t reg; local
471 reg = FDI_TX_CTL(pipe);
472 temp = intel_de_read(dev_priv, reg);
480 intel_de_write(dev_priv, reg, temp);
482 reg = FDI_RX_CTL(pipe);
483 temp = intel_de_read(dev_priv, reg);
491 intel_de_write(dev_priv, reg, temp | FDI_RX_ENHANCE_FRAME_ENABLE);
494 intel_de_posting_read(dev_priv, reg);
499 intel_de_rmw(dev_priv, reg, 0, FDI_FS_ERRC_ENABLE | FDI_FE_ERRC_ENABLE);
509 i915_reg_t reg; local
611 i915_reg_t reg; local
747 i915_reg_t reg; local
1029 i915_reg_t reg; local
1083 i915_reg_t reg; local
[all...]
H A Dintel_dmc_wl.h28 void intel_dmc_wl_get(struct intel_display *display, i915_reg_t reg);
29 void intel_dmc_wl_put(struct intel_display *display, i915_reg_t reg);
/linux-master/drivers/usb/typec/tcpm/
H A Dtcpci_maxim.h68 static inline int max_tcpci_read16(struct max_tcpci_chip *chip, unsigned int reg, u16 *val) argument
70 return regmap_raw_read(chip->data.regmap, reg, val, sizeof(u16));
73 static inline int max_tcpci_write16(struct max_tcpci_chip *chip, unsigned int reg, u16 val) argument
75 return regmap_raw_write(chip->data.regmap, reg, &val, sizeof(u16));
78 static inline int max_tcpci_read8(struct max_tcpci_chip *chip, unsigned int reg, u8 *val) argument
80 return regmap_raw_read(chip->data.regmap, reg, val, sizeof(u8));
83 static inline int max_tcpci_write8(struct max_tcpci_chip *chip, unsigned int reg, u8 val) argument
85 return regmap_raw_write(chip->data.regmap, reg, &val, sizeof(u8));
/linux-master/drivers/media/dvb-frontends/
H A Dstb0899_algo.c166 u8 reg; local
172 reg = stb0899_read_reg(state, STB0899_TLIR);
173 lock = STB0899_GETFIELD(TLIR_TMG_LOCK_IND, reg);
241 u8 reg; local
245 reg = stb0899_read_reg(state, STB0899_CFD);
246 STB0899_SETFIELD_VAL(CFD_ON, reg, 1);
247 stb0899_write_reg(state, STB0899_CFD, reg);
249 reg = stb0899_read_reg(state, STB0899_DSTATUS);
250 dprintk(state->verbose, FE_DEBUG, 1, "--------------------> STB0899_DSTATUS=[0x%02x]", reg);
251 if (STB0899_GETFIELD(CARRIER_FOUND, reg)) {
273 u8 reg; local
328 u8 reg; local
381 u8 reg; local
495 u8 bclc, reg; local
730 u32 uwp1, uwp2, uwp3, reg; local
762 u32 reg; local
842 u32 correction, freq_adj, band_lim, decim_cntrl, reg; local
900 u32 reg; local
954 u32 reg; local
971 u32 range, reg; local
1015 u32 reg; local
1038 u32 reg = 0; local
1087 u32 reg; local
1121 u8 reg; local
1273 u32 bTrNomFreq, srate, decimRate, intval1, intval2, reg; local
1309 u32 reg, csm1; local
[all...]
/linux-master/sound/soc/tegra/
H A Dtegra210_mixer.c23 #define MIXER_REG(reg, id) ((reg) + ((id) * TEGRA210_MIXER_REG_STRIDE))
24 #define MIXER_REG_BASE(reg) ((reg) % TEGRA210_MIXER_REG_STRIDE)
39 #define REG_DURATION_PARAM(reg, i) ((reg) + NUM_GAIN_POLY_COEFFS + 1 + (i))
100 unsigned int reg, val; local
110 reg = (addr << TEGRA210_MIXER_GAIN_CFG_RAM_ADDR_SHIFT) &
112 reg |= TEGRA210_MIXER_GAIN_CFG_RAM_ADDR_INIT_EN;
113 reg |
130 unsigned int reg = MIXER_GAIN_CFG_RAM_ADDR(id); local
183 unsigned int reg = mc->reg; local
202 unsigned int reg = mc->reg, id; local
235 tegra210_mixer_set_audio_cif(struct tegra210_mixer *mixer, struct snd_pcm_hw_params *params, unsigned int reg, unsigned int id) argument
511 tegra210_mixer_wr_reg(struct device *dev, unsigned int reg) argument
535 tegra210_mixer_rd_reg(struct device *dev, unsigned int reg) argument
553 tegra210_mixer_volatile_reg(struct device *dev, unsigned int reg) argument
583 tegra210_mixer_precious_reg(struct device *dev, unsigned int reg) argument
[all...]
/linux-master/drivers/media/i2c/
H A Dadv7183.c72 static inline int adv7183_read(struct v4l2_subdev *sd, unsigned char reg) argument
76 return i2c_smbus_read_byte_data(client, reg);
79 static inline int adv7183_write(struct v4l2_subdev *sd, unsigned char reg, argument
84 return i2c_smbus_write_byte_data(client, reg, value);
90 unsigned char reg, data; local
99 reg = *regs++;
103 adv7183_write(sd, reg, data);
200 int reg; local
202 reg = adv7183_read(sd, ADV7183_IN_CTRL) & 0xF;
204 reg |
230 int reg; local
243 int reg; local
352 int reg; local
400 int reg; local
474 adv7183_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg) argument
481 adv7183_s_register(struct v4l2_subdev *sd, const struct v4l2_dbg_register *reg) argument
[all...]
/linux-master/drivers/base/regmap/
H A Dregmap-ac97.c17 bool regmap_ac97_default_volatile(struct device *dev, unsigned int reg) argument
19 switch (reg) {
44 static int regmap_ac97_reg_read(void *context, unsigned int reg, argument
49 *val = ac97->bus->ops->read(ac97, reg);
54 static int regmap_ac97_reg_write(void *context, unsigned int reg, argument
59 ac97->bus->ops->write(ac97, reg, val);
/linux-master/drivers/clk/actions/
H A Dowl-reset.c20 return regmap_update_bits(reset->regmap, map->reg, map->bit, 0);
29 return regmap_update_bits(reset->regmap, map->reg, map->bit, map->bit);
47 u32 reg; local
50 ret = regmap_read(reset->regmap, map->reg, &reg);
58 return !(map->bit & reg);
/linux-master/arch/arm/kernel/
H A Dio.c15 void atomic_io_modify_relaxed(void __iomem *reg, u32 mask, u32 set) argument
21 value = readl_relaxed(reg) & ~mask;
23 writel_relaxed(value, reg);
28 void atomic_io_modify(void __iomem *reg, u32 mask, u32 set) argument
34 value = readl_relaxed(reg) & ~mask;
36 writel(value, reg);
/linux-master/drivers/net/ethernet/intel/fm10k/
H A Dfm10k_common.h12 u16 fm10k_read_pci_cfg_word(struct fm10k_hw *hw, u32 reg);
15 u32 fm10k_read_reg(struct fm10k_hw *hw, int reg);
18 #define fm10k_write_reg(hw, reg, val) \
22 writel((val), &hw_addr[(reg)]); \
26 #define fm10k_write_sw_reg(hw, reg, val) \
30 writel((val), &sw_addr[(reg)]); \
/linux-master/drivers/gpu/drm/sun4i/
H A Dsun4i_hdmi_tmds_clk.c129 u32 reg; local
131 reg = readl(tmds->hdmi->base + SUN4I_HDMI_PAD_CTRL1_REG);
132 if (reg & SUN4I_HDMI_PAD_CTRL1_HALVE_CLK)
135 reg = readl(tmds->hdmi->base + SUN4I_HDMI_PLL_CTRL_REG);
136 reg = ((reg >> 4) & 0xf) + tmds->div_offset;
137 if (!reg)
138 reg = 1;
140 return parent_rate / reg;
148 u32 reg; local
171 u32 reg; local
181 u32 reg; local
[all...]
/linux-master/drivers/net/wireless/broadcom/b43/
H A Dphy_ac.c37 static void b43_phy_ac_op_maskset(struct b43_wldev *dev, u16 reg, u16 mask, argument
40 b43_write16f(dev, B43_MMIO_PHY_CONTROL, reg);
45 static u16 b43_phy_ac_op_radio_read(struct b43_wldev *dev, u16 reg) argument
47 b43_write16f(dev, B43_MMIO_RADIO24_CONTROL, reg);
51 static void b43_phy_ac_op_radio_write(struct b43_wldev *dev, u16 reg, argument
54 b43_write16f(dev, B43_MMIO_RADIO24_CONTROL, reg);
/linux-master/arch/powerpc/boot/
H A Dtreeboot-currituck.c26 #include "reg.h"
41 u32 reg; local
46 reg = mfdcrx(DDR3_MR0CF + i);
48 if (!(reg & 1))
51 reg &= 0x0000f000;
52 reg >>= 12;
53 memsize += (0x800000ULL << reg);
/linux-master/drivers/clk/sunxi/
H A Dclk-sun4i-display.c33 void __iomem *reg; member in struct:reset_data
51 u32 reg; local
55 reg = readl(data->reg);
56 writel(reg & ~BIT(data->offset + id), data->reg);
68 u32 reg; local
72 reg = readl(data->reg);
73 writel(reg | BI
111 void __iomem *reg; local
[all...]
/linux-master/arch/mips/ralink/
H A Dearly_printk.c35 static inline void uart_w32(u32 val, unsigned reg) argument
37 __raw_writel(val, uart_membase + reg);
40 static inline u32 uart_r32(unsigned reg) argument
42 return __raw_readl(uart_membase + reg);
59 u32 reg = uart_r32(UART_REG_LCR + (0x100 * i)); local
61 if (!reg)
/linux-master/drivers/clocksource/
H A Dmmio.c11 void __iomem *reg; member in struct:clocksource_mmio
22 return (u64)readl_relaxed(to_mmio_clksrc(c)->reg);
27 return ~(u64)readl_relaxed(to_mmio_clksrc(c)->reg) & c->mask;
32 return (u64)readw_relaxed(to_mmio_clksrc(c)->reg);
37 return ~(u64)readw_relaxed(to_mmio_clksrc(c)->reg) & c->mask;
62 cs->reg = base;
/linux-master/drivers/gpu/drm/pl111/
H A Dpl111_debugfs.c13 #define REGDEF(reg) { reg, #reg }
15 u32 reg; member in struct:__anon307
42 pl111_reg_defs[i].name, pl111_reg_defs[i].reg,
43 readl(priv->regs + pl111_reg_defs[i].reg));
/linux-master/arch/mips/bcm63xx/
H A Dprom.c23 u32 reg, mask; local
51 reg = bcm_perf_readl(PERF_CKCTL_REG);
52 reg &= ~mask;
53 bcm_perf_writel(reg, PERF_CKCTL_REG);
66 reg = bcm_readl(BCM_6328_OTP_BASE +
69 if (reg & OTP_6328_REG3_TP1_DISABLED)
/linux-master/arch/arm/include/asm/
H A Darch_timer.h28 void arch_timer_reg_write_cp15(int access, enum arch_timer_reg reg, u64 val) argument
31 switch (reg) {
43 switch (reg) {
60 u32 arch_timer_reg_read_cp15(int access, enum arch_timer_reg reg) argument
65 switch (reg) {
73 switch (reg) {

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