Lines Matching refs:reg

23 #define MIXER_REG(reg, id)	((reg) + ((id) * TEGRA210_MIXER_REG_STRIDE))
24 #define MIXER_REG_BASE(reg) ((reg) % TEGRA210_MIXER_REG_STRIDE)
39 #define REG_DURATION_PARAM(reg, i) ((reg) + NUM_GAIN_POLY_COEFFS + 1 + (i))
100 unsigned int reg, val;
110 reg = (addr << TEGRA210_MIXER_GAIN_CFG_RAM_ADDR_SHIFT) &
112 reg |= TEGRA210_MIXER_GAIN_CFG_RAM_ADDR_INIT_EN;
113 reg |= TEGRA210_MIXER_GAIN_CFG_RAM_RW_WRITE;
114 reg |= TEGRA210_MIXER_GAIN_CFG_RAM_SEQ_ACCESS_EN;
118 reg);
130 unsigned int reg = MIXER_GAIN_CFG_RAM_ADDR(id);
137 err = tegra210_mixer_write_ram(mixer, reg + i,
145 err = tegra210_mixer_write_ram(mixer, reg + NUM_GAIN_POLY_COEFFS,
160 REG_DURATION_PARAM(reg, i),
167 err = tegra210_mixer_write_ram(mixer, reg + REG_CFG_DONE_TRIGGER,
183 unsigned int reg = mc->reg;
186 i = (reg - TEGRA210_MIXER_GAIN_CFG_RAM_ADDR_0) /
202 unsigned int reg = mc->reg, id;
206 id = (reg - TEGRA210_MIXER_GAIN_CFG_RAM_ADDR_0) /
237 unsigned int reg,
264 reg + (id * TEGRA210_MIXER_REG_STRIDE),
374 #define ADDER_CTRL_DECL(name, reg) \
376 SOC_DAPM_SINGLE("RX1", reg, 0, 1, 0), \
377 SOC_DAPM_SINGLE("RX2", reg, 1, 1, 0), \
378 SOC_DAPM_SINGLE("RX3", reg, 2, 1, 0), \
379 SOC_DAPM_SINGLE("RX4", reg, 3, 1, 0), \
380 SOC_DAPM_SINGLE("RX5", reg, 4, 1, 0), \
381 SOC_DAPM_SINGLE("RX6", reg, 5, 1, 0), \
382 SOC_DAPM_SINGLE("RX7", reg, 6, 1, 0), \
383 SOC_DAPM_SINGLE("RX8", reg, 7, 1, 0), \
384 SOC_DAPM_SINGLE("RX9", reg, 8, 1, 0), \
385 SOC_DAPM_SINGLE("RX10", reg, 9, 1, 0), \
512 unsigned int reg)
514 if (reg < TEGRA210_MIXER_RX_LIMIT)
515 reg = MIXER_REG_BASE(reg);
516 else if (reg < TEGRA210_MIXER_TX_LIMIT)
517 reg = MIXER_REG_BASE(reg) + TEGRA210_MIXER_TX1_ENABLE;
519 switch (reg) {
536 unsigned int reg)
538 if (reg < TEGRA210_MIXER_RX_LIMIT)
539 reg = MIXER_REG_BASE(reg);
540 else if (reg < TEGRA210_MIXER_TX_LIMIT)
541 reg = MIXER_REG_BASE(reg) + TEGRA210_MIXER_TX1_ENABLE;
543 switch (reg) {
554 unsigned int reg)
556 if (reg < TEGRA210_MIXER_RX_LIMIT)
557 reg = MIXER_REG_BASE(reg);
558 else if (reg < TEGRA210_MIXER_TX_LIMIT)
559 reg = MIXER_REG_BASE(reg) + TEGRA210_MIXER_TX1_ENABLE;
561 switch (reg) {
584 unsigned int reg)
586 switch (reg) {