Searched refs:period (Results 276 - 300 of 538) sorted by relevance

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/linux-master/kernel/sched/
H A Dcore.c498 * p->dl.dl_{runtime, deadline, period, flags, bw, density}
4854 unsigned long to_ratio(u64 period, u64 runtime) argument
4864 if (period == 0)
4867 return div64_u64(runtime << BW_SHIFT, period);
10364 * We have to wait for yet another RCU grace period to expire, as
10440 * current RCU grace period has expired.
10580 * Relies on the RCU grace period between css_released() and this.
10807 static int __cfs_schedulable(struct task_group *tg, u64 period, u64 runtime);
10809 static int tg_set_cfs_bandwidth(struct task_group *tg, u64 period, u64 quota, argument
10819 * Ensure we have at some amount of bandwidth every period
10899 u64 quota, period, burst; local
10928 u64 quota, period, burst; local
10952 u64 quota, period, burst; local
11012 u64 period, quota; member in struct:cfs_schedulable_data
11022 u64 quota, period; local
11077 __cfs_schedulable(struct task_group *tg, u64 period, u64 quota) argument
11359 cpu_period_quota_print(struct seq_file *sf, long period, long quota) argument
11404 u64 period = tg_get_cfs_period(tg); local
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H A Drt.c16 * period over which we measure -rt task CPU usage in us.
22 * part of the period that we allow rt tasks to run in us.
94 void init_rt_bandwidth(struct rt_bandwidth *rt_b, u64 period, u64 runtime) argument
96 rt_b->rt_period = ns_to_ktime(period);
114 * not reset the period. If a deadline task was running
117 * to update the period.
713 * spare time, but no more than our period.
2727 u64 period, runtime; local
2729 period = ktime_to_ns(tg->rt_bandwidth.rt_period);
2733 period
2779 __rt_schedulable(struct task_group *tg, u64 period, u64 runtime) argument
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H A Ddeadline.c22 * Default limits for DL period; on the top end we guard against small util
888 * refill the runtime and set the deadline a period in the future,
900 * task with deadline equal to period this is the same of using
956 * If the task has deadline < period, and the deadline is in the past,
968 * deadline == relative period. A task with constrained deadline has a
969 * relative deadline <= relative period.
987 * When the task is starting a new period, the Original CBS is used. In this
990 * When a task is queued before the begin of the next period, using the
995 * If the task has an implicit deadline, i.e., deadline == period, the Original
1000 * deadline < period, whic
2858 u64 period = global_rt_period(); local
2948 u64 period = attr->sched_period ?: attr->sched_deadline; local
3047 u64 period, max, min; local
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/linux-master/drivers/net/ethernet/intel/ice/
H A Dice_ptp.c1671 * specified period.
1676 u64 current_time, period, start_time, phase; local
1705 period = config->period;
1707 div64_u64_rem(start_time, period, &phase);
1710 /* 1. Write clkout with half of required period value */
1711 if (period & 0x1) {
1716 period >>= 1;
1721 if (period <= MIN_PULSE || period > U32_MA
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/linux-master/arch/mips/kernel/
H A Dperf_event_mipsxx.c414 u64 period = hwc->sample_period; local
417 if (unlikely((left + period) & (1ULL << 63))) {
418 /* left underflowed by more than period. */
419 left = period;
421 hwc->last_period = period;
423 } else if (unlikely((left + period) <= period)) {
424 /* left underflowed by less than period. */
425 left += period;
427 hwc->last_period = period;
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/linux-master/drivers/gpu/drm/bridge/
H A Dti-sn65dsi86.c1401 * - Changing both period and duty_cycle is not done atomically, neither is the
1414 u64 period; local
1450 * With the period T_pwm = 1/PWM_FREQ this can be written:
1462 * the duty cycle over accuracy of the period, the lowest
1475 if (state->period <= NSEC_PER_SEC / pdata->pwm_refclk_freq) {
1482 * Limit period to this to avoid overflows
1486 period = min(state->period, period_max);
1488 pre_div = DIV64_U64_ROUND_UP(period * pdata->pwm_refclk_freq,
1490 scale = div64_u64(period * pdat
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/linux-master/drivers/mtd/nand/raw/
H A Dintel-nand-controller.c202 unsigned int period = DIV_ROUND_UP(USEC_PER_SEC, rate); local
215 period);
218 thold = DIV_ROUND_UP(max(timings->tDH_min, timings->tDS_min), period);
222 period);
225 twrwait = DIV_ROUND_UP(max(timings->tWC_min, timings->tWH_min), period);
/linux-master/drivers/input/misc/
H A Dda7280.c339 period_mag_multi = (u64)state.period * haptics->gain;
348 period_mag_multi += state.period;
1185 * Check PWM period, PWM freq = 1000000 / state.period.
1188 if (state.period > 100000 || state.period < 4000) {
1189 dev_err(dev, "Unsupported PWM period: %lld\n",
1190 state.period);
/linux-master/drivers/hwmon/
H A Daspeed-pwm-tacho.c485 u16 period, dc_time_on; local
487 period = priv->type_pwm_clock_unit[priv->pwm_port_type[index]];
488 period += 1;
489 dc_time_on = (fan_ctrl * period) / PWM_MAX;
494 if (dc_time_on == period)
718 * type M clock division H bit * (type M PWM period bit + 1))
H A Daspeed-g6-pwm-tach.c10 * The length of a PWM period is (DUTY_CYCLE_PERIOD + 1) * Q.
15 * period the output is active until DUTY_CYCLE_FALLING_POINT * Q. Note
23 * emit inactive level to the PIN_ENABLE mux after that the driver can still change the pwm period
35 * - When changing both duty cycle and period, we cannot prevent in
36 * software that the output might produce a period with mixed
38 * - Disabling the PWM doesn't complete the current period.
41 * - When only changing one of duty cycle or period, our pwm controller will not
174 state->period = DIV_ROUND_UP_ULL(dividend, priv->clk_rate);
181 state->duty_cycle = clk_en ? state->period : 0;
197 expect_period = min(expect_period, state->period);
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/linux-master/sound/drivers/
H A Ddummy.c437 unsigned int period, rate; local
442 period = runtime->period_size;
444 sec = period / rate;
445 period %= rate;
446 nsecs = div_u64((u64)period * 1000000000UL + rate - 1, rate);
/linux-master/drivers/scsi/
H A Dncr53c8xx.c1214 /*0*/ u16 period; member in struct:tcb
1224 /*2*/ u16 period; member in struct:tcb
1674 u_char minsync; /* Minimum sync period factor */
1675 u_char maxsync; /* Maximum sync period factor */
3041 ** get period and offset
3707 u_long period; local
3770 * Minimum synchronous period factor supported by the chip.
3771 * Btw, 'period' is in tenths of nanoseconds.
3774 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
3775 if (period <
8322 ncr53c8xx_set_period(struct scsi_target *starget, int period) argument
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/linux-master/drivers/pwm/
H A Dpwm-stm32.c142 * contains period + duty_cycle. So, subtract period.
206 /* Capture period on IC1/3 rising edge, duty cycle on IC2/4 falling. */
238 /* Compute intermediate period not to exceed timeout at low rates */
253 /* Last chance to improve period accuracy, using input prescaler */
296 result->period = DIV_ROUND_UP_ULL(prd, rate << icpsc);
450 state->duty_cycle, state->period);
506 state->period = DIV_ROUND_UP_ULL(prd, rate);
/linux-master/drivers/scsi/pcmcia/
H A Dnsp_cs.c452 unsigned int period, offset; local
456 period = sync->SyncPeriod;
459 nsp_dbg(NSP_DEBUG_SYNC, "period=0x%x, offset=0x%x", period, offset);
468 if ( period >= sync_table->min_period &&
469 period <= sync_table->max_period ) {
474 if (period != 0 && sync_table->max_period == 0) {
476 * No proper period/offset found
478 nsp_dbg(NSP_DEBUG_SYNC, "no proper period/offset");
/linux-master/drivers/ptp/
H A Dptp_ocp.c301 ktime_t period; member in struct:ptp_ocp_signal
1406 if (on && (rq->perout.period.sec != 1 ||
1407 rq->perout.period.nsec != 0))
2039 if (!s->period)
2043 s->pulse = ktime_divns(s->period * s->duty, 100);
2052 s->start = DIV64_U64_ROUND_UP(start_ns, s->period);
2059 if (s->pulse < 1 || s->pulse > s->period)
2077 s.period = ktime_set(req->period.sec, req->period
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/linux-master/sound/usb/line6/
H A Dplayback.c358 if (line6pcm->out.bytes >= line6pcm->out.period) {
359 line6pcm->out.bytes %= line6pcm->out.period;
/linux-master/tools/perf/tests/
H A Dsample-parsing.c76 COMP(period);
234 .period = 108,
/linux-master/drivers/hid/amd-sfh-hid/
H A Damd_sfh_client.c167 info.period = AMD_SFH_IDLE_LOOP;
275 info.period = AMD_SFH_IDLE_LOOP;
/linux-master/tools/testing/selftests/ptp/
H A Dtestptp.c139 " -p val enable output with a period of 'val' nanoseconds\n"
487 perout_request.period.sec = perout / NSEC_PER_SEC;
488 perout_request.period.nsec = perout % NSEC_PER_SEC;
/linux-master/include/uapi/linux/
H A Dif_bridge.h310 __u32 period; member in struct:br_mrp_start_test
329 __u32 period; member in struct:br_mrp_start_in_test
/linux-master/include/net/
H A Dswitchdev.h142 u32 period; member in struct:switchdev_obj_ring_test_mrp
175 u32 period; member in struct:switchdev_obj_in_test_mrp
/linux-master/drivers/net/ethernet/mellanox/mlx4/
H A Dcq.c170 u16 count, u16 period)
182 cq_context->cq_period = cpu_to_be16(period);
169 mlx4_cq_modify(struct mlx4_dev *dev, struct mlx4_cq *cq, u16 count, u16 period) argument
/linux-master/drivers/regulator/
H A Dpwm-regulator.c162 pstate.duty_cycle = pstate.period;
343 pstate.duty_cycle = pstate.period;
/linux-master/tools/perf/util/
H A Dannotate.h126 u64 period; member in struct:sym_hist_entry
185 "local period",
186 "global period",
246 * @period: Sum of sample periods.
250 u64 period; member in struct:sym_hist
297 * of samples and period.
/linux-master/arch/sparc/kernel/
H A Dperf_event.c891 s64 period = hwc->sample_period; local
894 /* The period may have been changed by PERF_EVENT_IOC_PERIOD */
895 if (unlikely(period != hwc->last_period))
896 left = period - (hwc->last_period - left);
898 if (unlikely(left <= -period)) {
899 left = period;
901 hwc->last_period = period;
906 left += period;
908 hwc->last_period = period;

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