/freebsd-11-stable/sys/contrib/ncsw/Peripherals/FM/MAC/ |
H A D | tgec_mii_acc.c | 44 uint8_t reg, 60 WRITE_UINT32(p_MiiAccess->mdio_regaddr, reg); 80 uint8_t reg, 97 WRITE_UINT32(p_MiiAccess->mdio_regaddr, reg); 117 ("Read Error: phyAddr 0x%x, dev 0x%x, reg 0x%x, cfg_status 0x%x", 118 ((phyAddr & 0xe0)>>5), (phyAddr & 0x1f), reg, cfg_status)); 42 TGEC_MII_WritePhyReg(t_Handle h_Tgec, uint8_t phyAddr, uint8_t reg, uint16_t data) argument 78 TGEC_MII_ReadPhyReg(t_Handle h_Tgec, uint8_t phyAddr, uint8_t reg, uint16_t *p_Data) argument
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/freebsd-11-stable/sys/dev/ath/ath_hal/ar5212/ |
H A D | ar5212_gpio.c | 33 #define AR_GPIOD_MASK 0x0000002F /* GPIO data reg r/w mask */ 74 uint32_t reg; local 78 reg = OS_REG_READ(ah, AR_GPIODO); 79 reg &= ~(1 << gpio); 80 reg |= (val&1) << gpio; 82 OS_REG_WRITE(ah, AR_GPIODO, reg);
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/freebsd-11-stable/sys/dev/ath/ath_hal/ar5312/ |
H A D | ar5315_gpio.c | 32 #define AR5315_GPIOD_MASK 0x0000007F /* GPIO data reg r/w mask */ 74 uint32_t reg; local 79 reg = OS_REG_READ(ah, gpioOffset+AR5315_GPIODO); 80 reg &= ~(1 << gpio); 81 reg |= (val&1) << gpio; 83 OS_REG_WRITE(ah, gpioOffset+AR5315_GPIODO, reg);
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/freebsd-11-stable/sys/mips/atheros/ |
H A D | ar71xx_pci.c | 102 uint32_t reg; local 106 reg = ATH_READ_REG(AR71XX_PCI_INTR_MASK); 108 reg = ATH_READ_REG(AR71XX_PCI_INTR_MASK); 109 ATH_WRITE_REG(AR71XX_PCI_INTR_MASK, reg & ~(1 << irq)); 115 uint32_t reg; local 119 reg = ATH_READ_REG(AR71XX_PCI_INTR_MASK); 120 ATH_WRITE_REG(AR71XX_PCI_INTR_MASK, reg | (1 << irq)); 122 reg = ATH_READ_REG(AR71XX_PCI_INTR_MASK); 131 ar71xx_get_bytes_to_read(int reg, int bytes) argument 138 bytes_to_read = (~(1 << (reg 183 ar71xx_pci_make_addr(int bus, int slot, int func, int reg) argument 194 ar71xx_pci_conf_setup(int bus, int slot, int func, int reg, int bytes, uint32_t cmd) argument 212 ar71xx_pci_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, int bytes) argument 249 ar71xx_pci_local_write(device_t dev, uint32_t reg, uint32_t data, int bytes) argument 265 ar71xx_pci_write_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, uint32_t data, int bytes) argument 293 uint32_t reg, val, bar0; local 620 uint32_t reg, irq, mask; local [all...] |
H A D | ar91xx_chip.c | 92 uint32_t reg; local 94 reg = ATH_READ_REG(AR91XX_RESET_REG_RESET_MODULE); 95 ATH_WRITE_REG(AR91XX_RESET_REG_RESET_MODULE, reg | mask); 101 uint32_t reg; local 103 reg = ATH_READ_REG(AR91XX_RESET_REG_RESET_MODULE); 104 ATH_WRITE_REG(AR91XX_RESET_REG_RESET_MODULE, reg & ~mask); 110 uint32_t reg; local 112 reg = ATH_READ_REG(AR91XX_RESET_REG_RESET_MODULE); 113 return ((reg & mask) == mask);
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/freebsd-11-stable/contrib/llvm-project/lldb/source/Plugins/Process/Utility/ |
H A D | RegisterInfos_mips64.h | 40 #define DEFINE_GPR(reg, alt, kind1, kind2, kind3) \ 42 #reg, alt, sizeof(((GPR_linux_mips *) 0)->reg), \ 43 GPR_OFFSET(reg), eEncodingUint, eFormatHex, \ 44 {kind1, kind2, kind3, ptrace_##reg##_mips, \ 45 gpr_##reg##_mips64 }, \ 49 #define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \ 51 #reg, alt, sizeof(((GPR_freebsd_mips *) 0)->reg), \ 52 GPR_OFFSET(reg), eEncodingUin [all...] |
H A D | DynamicRegisterInfo.cpp | 529 for (const auto ® : m_regs) { 530 if (reg.kinds[eRegisterKindGeneric] != LLDB_INVALID_REGNUM) { 541 for (auto ® : m_regs) { 542 if (strcmp(reg.name, "pc") == 0) 543 reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_PC; 544 else if ((strcmp(reg.name, "fp") == 0) || 545 (strcmp(reg.name, "x29") == 0)) 546 reg.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FP; 547 else if ((strcmp(reg.name, "lr") == 0) || 548 (strcmp(reg [all...] |
/freebsd-11-stable/sys/dev/hwpmc/ |
H A D | hwpmc_arm64.c | 63 uint32_t reg; local 65 reg = (1 << pmc); 66 WRITE_SPECIALREG(PMINTENSET_EL1, reg); 77 uint32_t reg; local 79 reg = (1 << pmc); 80 WRITE_SPECIALREG(PMINTENCLR_EL1, reg); 91 uint32_t reg; local 93 reg = (1 << pmc); 94 WRITE_SPECIALREG(PMCNTENSET_EL0, reg); 105 uint32_t reg; local 119 uint32_t reg; local 127 arm64_pmcr_write(uint32_t reg) argument 152 arm64_pmcn_write(unsigned int pmc, uint32_t reg) argument 332 int reg; local 483 int reg; local [all...] |
/freebsd-11-stable/sys/dev/e1000/ |
H A D | e1000_82542.c | 441 * @reg: e1000 register to be read 448 u32 e1000_translate_register_82542(u32 reg) argument 456 switch (reg) { 458 reg = 0x00040; 461 reg = 0x00108; 464 reg = 0x00110; 467 reg = 0x00114; 470 reg = 0x00118; 473 reg = 0x00120; 476 reg [all...] |
/freebsd-11-stable/sys/arm/ti/am335x/ |
H A D | am335x_musb.c | 99 #define USB_WRITE4(sc, idx, reg, val) do { \ 100 bus_write_4((sc)->sc_mem_res[idx], (reg), (val)); \ 103 #define USB_READ4(sc, idx, reg) bus_read_4((sc)->sc_mem_res[idx], (reg)) 105 #define USBCTRL_WRITE4(sc, reg, val) \ 106 USB_WRITE4((sc), RES_USBCTRL, (reg), (val)) 107 #define USBCTRL_READ4(sc, reg) \ 108 USB_READ4((sc), RES_USBCTRL, (reg)) 157 uint32_t c, reg; local 160 reg 173 uint32_t c, reg; local 242 uint32_t reg; local [all...] |
/freebsd-11-stable/sys/dev/ath/ath_hal/ar5416/ |
H A D | ar5416_gpio.c | 86 uint32_t gpio_shift, reg; local 124 reg = OS_REG_READ(ah, AR_GPIO_OE_OUT); 125 reg &= ~(AR_GPIO_OE_OUT_DRV << gpio_shift); 126 reg |= AR_GPIO_OE_OUT_DRV_ALL << gpio_shift; 127 OS_REG_WRITE(ah, AR_GPIO_OE_OUT, reg); 139 uint32_t gpio_shift, reg; local 149 reg = OS_REG_READ(ah, AR_GPIO_OE_OUT); 150 reg &= ~(AR_GPIO_OE_OUT_DRV << gpio_shift); 151 reg |= AR_GPIO_OE_OUT_DRV_ALL << gpio_shift; 152 OS_REG_WRITE(ah, AR_GPIO_OE_OUT, reg); 163 uint32_t reg; local [all...] |
/freebsd-11-stable/sys/dev/mii/ |
H A D | nsphy.c | 147 int reg; local 154 reg = PHY_READ(sc, MII_NSPHY_PCR); 160 reg |= PCR_LED4MODE; 167 reg |= PCR_CIMDIS; 173 reg |= PCR_FLINK100; 185 reg |= 0x0100 | 0x0400; 188 PHY_WRITE(sc, MII_NSPHY_PCR, reg); 288 int reg, i; local 291 reg = BMCR_RESET; 293 reg [all...] |
/freebsd-11-stable/sys/powerpc/powermac/ |
H A D | uninorthpci.c | 136 uint32_t reg[3]; local 143 if (OF_getprop(node, "reg", reg, sizeof(reg)) < 8) 156 regbase = reg[0]; 159 regbase |= reg[1]; 169 uninorth_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, argument 176 caoff = sc->sc_data + (reg & 0x07); 178 if (uninorth_enable_config(sc, bus, slot, func, reg) != 0) { 197 u_int reg, u_int32_ 196 uninorth_write_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, u_int32_t val, int width) argument 221 uninorth_enable_config(struct uninorth_softc *sc, u_int bus, u_int slot, u_int func, u_int reg) argument [all...] |
/freebsd-11-stable/sys/dev/iser/ |
H A D | iser_memory.c | 111 struct iser_mem_reg *reg) 115 reg->sge.lkey = device->mr->lkey; 116 reg->rkey = device->mr->rkey; 117 reg->sge.length = ib_sg_dma_len(device->ib_device, &sg[0]); 118 reg->sge.addr = ib_sg_dma_address(device->ib_device, &sg[0]); 155 struct iser_mem_reg *reg) 167 return iser_reg_dma(device, mem, reg); 202 reg->sge.lkey = mr->lkey; 203 reg->rkey = mr->rkey; 204 reg 110 iser_reg_dma(struct iser_device *device, struct iser_data_buf *mem, struct iser_mem_reg *reg) argument 152 iser_fast_reg_mr(struct icl_iser_pdu *iser_pdu, struct iser_data_buf *mem, struct iser_reg_resources *rsc, struct iser_mem_reg *reg) argument 257 struct iser_mem_reg *reg = &iser_pdu->rdma_reg[cmd_dir]; local [all...] |
/freebsd-11-stable/sys/dev/firewire/ |
H A D | fwcrom.c | 104 struct csrreg *reg; local 108 reg = crom_get(cc); 109 if ((reg->key & CSRTYPE_MASK) == CSRTYPE_D) { 117 ptr->dir = (struct csrdirectory *) (reg + reg->val); 144 struct csrreg *reg; local 147 reg = crom_get(cc); 148 if (reg->key == key) 149 return reg; 158 struct csrreg *reg; local 185 struct csrreg *reg; local 296 struct csrreg *reg; local 409 struct csrreg reg; member in union:__anon10096 499 struct csrreg *reg; local [all...] |
/freebsd-11-stable/sys/dev/intel/ |
H A D | spi.c | 260 uint32_t reg; local 271 reg = INTELSPI_READ(sc, INTELSPI_SSPREG_SSSR); 272 if (reg == 0xffffffffU) { 280 reg = INTELSPI_READ(sc, INTELSPI_SSPREG_SSCR1); 281 reg &= ~(SSCR1_TIE | SSCR1_RIE | SSCR1_TINTE); 282 INTELSPI_WRITE(sc, INTELSPI_SSPREG_SSCR1, reg); 292 uint32_t reg; local 297 reg = INTELSPI_READ(sc, INTELSPI_SSPREG_SPI_CS_CTRL); 298 reg &= ~(SPI_CS_CTRL_CS_MASK); 299 reg | 329 uint32_t reg; local [all...] |
/freebsd-11-stable/contrib/groff/src/roff/troff/ |
H A D | reg.cpp | 26 #include "reg.h" 30 int reg::get_value(units * /*d*/) 35 void reg::increment() 40 void reg::decrement() 45 void reg::set_increment(units /*n*/) 50 void reg::alter_format(char /*f*/, int /*w*/) 55 const char *reg::get_format() 60 void reg::set_value(units /*n*/) 311 reg *r = (reg *)number_reg_dictionar [all...] |
H A D | Makefile.sub | 14 reg.$(OBJEXT) 24 $(srcdir)/reg.cpp 34 $(srcdir)/reg.h \
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/freebsd-11-stable/sys/mips/nlm/hal/ |
H A D | cop2.h | 55 #define NLM_DEFINE_COP2_ACCESSORS32(name, reg, sel) \ 66 : "i" (reg), "i" (sel)); \ 78 : : "r" (val), "i" (reg), "i" (sel)); \ 82 #define NLM_DEFINE_COP2_ACCESSORS64(name, reg, sel) \ 93 : "i" (reg), "i" (sel)); \ 105 : : "r" (val), "i" (reg), "i" (sel)); \ 110 #define NLM_DEFINE_COP2_ACCESSORS64(name, reg, sel) \ 123 : "i"(reg), "i"(sel) \ 143 : : "r"(__high), "r"(__low), "i"(reg), "i"(sel) \
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/freebsd-11-stable/stand/i386/libfirewire/ |
H A D | fwohci.c | 133 uint32_t reg, reg2; local 146 reg = fwphy_rddata(sc, FW_PHY_SPD_REG); 148 if((reg >> 5) != 7 ){ 149 nport = reg & FW_PHY_NP; 150 speed = reg & FW_PHY_SPD >> 6; 161 nport = reg & FW_PHY_NP; 195 reg = fwphy_rddata(sc, FW_PHY_SPD_REG); 196 if((reg >> 5) == 7 ){ 197 reg = fwphy_rddata(sc, 4); 198 reg | 210 uint32_t reg, reg2; local 268 uint32_t reg; local [all...] |
/freebsd-11-stable/sys/contrib/octeon-sdk/ |
H A D | cvmx-debug-handler.S | 71 #define SAVE_REGISTER(reg) \ 72 sd reg, 0(k0); \ 75 #define RESTORE_REGISTER(reg) \ 76 ld reg, -8(k0); \ 79 #define SAVE_COP0(reg) \ 80 dmfc0 k1,reg; \ 84 #define RESTORE_COP0(reg) \ 87 dmtc0 k1,reg 118 #define loadaddr(reg, addr, shift) \ 119 dla reg, add [all...] |
/freebsd-11-stable/sys/mips/idt/ |
H A D | if_krreg.h | 123 #define KR_DMA_READ_REG(chan, reg) \ 125 (RC32434_DMA_BASE_ADDR + chan * RC32434_DMA_CHAN_SIZE + reg)) 127 #define KR_DMA_WRITE_REG(chan, reg, val) \ 129 (RC32434_DMA_BASE_ADDR + chan * RC32434_DMA_CHAN_SIZE + reg)) = val) 131 #define KR_DMA_SETBITS_REG(chan, reg, bits) \ 132 KR_DMA_WRITE_REG((chan), (reg), KR_DMA_READ_REG((chan), (reg)) | (bits)) 134 #define KR_DMA_CLEARBITS_REG(chan, reg, bits) \ 135 KR_DMA_WRITE_REG((chan), (reg), \ 136 KR_DMA_READ_REG((chan), (reg)) [all...] |
/freebsd-11-stable/sys/amd64/vmm/amd/ |
H A D | vmcb.c | 364 vmcb_setdesc(void *arg, int vcpu, int reg, struct seg_desc *desc) argument 374 seg = vmcb_segptr(vmcb, reg); 376 __func__, reg)); 380 if (reg != VM_REG_GUEST_GDTR && reg != VM_REG_GUEST_IDTR) { 395 "attrib (%#x)", reg, seg->base, seg->limit, seg->attrib); 397 switch (reg) { 416 vmcb_getdesc(void *arg, int vcpu, int reg, struct seg_desc *desc) argument 424 seg = vmcb_segptr(vmcb, reg); 426 __func__, reg)); [all...] |
/freebsd-11-stable/sys/arm/freescale/vybrid/ |
H A D | vf_dmamux.c | 98 int reg; local 104 reg = 0; 106 reg |= (CHCFG_ENBL); 108 reg &= ~(CHCFG_SOURCE_MASK << CHCFG_SOURCE_SHIFT); 109 reg |= (source << CHCFG_SOURCE_SHIFT); 111 MUX_WRITE1(sc, mux, DMAMUX_CHCFG(channel), reg);
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/freebsd-11-stable/sys/arm/mv/ |
H A D | mvwin.h | 360 #define WIN_REG_IDX_RD(pre,reg,off,base) \ 362 pre ## _ ## reg ## _read(int i) \ 367 #define WIN_REG_IDX_RD2(pre,reg,off,base) \ 369 pre ## _ ## reg ## _read(int i, int j) \ 374 #define WIN_REG_BASE_IDX_RD(pre,reg,off) \ 376 pre ## _ ## reg ## _read(uint32_t base, int i) \ 381 #define WIN_REG_BASE_IDX_RD2(pre,reg,off) \ 383 pre ## _ ## reg ## _read(uint32_t base, int i, int j) \ 388 #define WIN_REG_IDX_WR(pre,reg,off,base) \ 390 pre ## _ ## reg ## _writ [all...] |