Searched refs:dc (Results 26 - 50 of 549) sorted by path

1234567891011>>

/linux-master/arch/arc/kernel/
H A Dsetup.c276 IS_AVAIL3(erp.dc, !ctl.dpd, "DC "),
/linux-master/arch/arc/mm/
H A Dcache.c1018 struct cpuinfo_arc_cache *dc = &dc_info; local
1020 if (!dc->line_len)
1023 if (dc->line_len != L1_CACHE_BYTES)
1025 dc->line_len, L1_CACHE_BYTES);
1028 if (is_isa_arcompact() && dc->colors > 1) {
/linux-master/arch/arm/boot/dts/aspeed/
H A DMakefile54 aspeed-bmc-qcom-dc-scm-v1.dtb \
/linux-master/arch/arm64/include/asm/
H A Dassembler.h360 dc \op, \addr
362 dc civac, \addr
370 * op: operation passed to dc instruction
389 sys 3, c7, c12, 1, \start // dc cvap
392 sys 3, c7, c13, 1, \start // dc cvadp
394 dc \op, \start
411 * op: operation passed to dc instruction
/linux-master/arch/arm64/kernel/
H A Dhead.S177 dmb sy // needed before dc ivac with
455 dc ivac, \tmp1 // Invalidate potentially stale cache line
/linux-master/arch/arm64/lib/
H A Dclear_page.S24 1: dc zva, x0
H A Dmemset.S197 dc zva, dst
H A Dmte.S53 1: dc gzva, x0
/linux-master/arch/arm64/mm/
H A Dcache.S151 dc civac, x1 // clean & invalidate D / U line
155 dc civac, x0 // clean & invalidate D / U line
157 2: dc ivac, x0 // invalidate D / U line
/linux-master/arch/mips/kvm/
H A Demulate.c653 int dc; local
665 dc = kvm_mips_count_disabled(vcpu);
666 if (dc) {
682 if (!dc)
700 int dc; local
732 dc = kvm_mips_count_disabled(vcpu);
733 if (!dc)
756 if (!dc)
/linux-master/arch/powerpc/platforms/powermac/
H A Dsetup.c137 const unsigned int *dc = local
141 if (of_property_read_bool(np, "cache-unified") && dc) {
142 seq_printf(m, " %dK unified", *dc / 1024);
146 if (dc)
148 (ic? " +": ""), *dc / 1024);
/linux-master/arch/x86/crypto/
H A Dcurve25519-x86_64.c987 u64 *dc = tmp1 + (u32)8U; local
1002 d0 = dc;
1003 c0 = dc + (u32)4U;
1006 fmul2(dc, dc, ab, tmp2);
1037 u64 *dc = tmp1 + (u32)8U; local
1040 fsqr2(dc, ab, tmp2);
1048 fmul2(nq, dc, ab, tmp2);
H A Dtwofish-x86_64-asm_64-3way.S150 #define decrypt_round3(ba, dc, n) \
151 g1g2_3(ba, dc, s1, s2, s3, s0, s3, s0, s1, s2, RY, RX); \
161 #define decrypt_cycle3(ba, dc, n) \
162 decrypt_round3(ba, dc, (n*2)+1); \
163 decrypt_round3(ba, dc, (n*2));
/linux-master/arch/x86/kernel/cpu/resctrl/
H A Dcore.c414 static void setup_default_ctrlval(struct rdt_resource *r, u32 *dc) argument
424 for (i = 0; i < hw_res->num_closid; i++, dc++)
425 *dc = r->default_ctrl;
441 u32 *dc; local
443 dc = kmalloc_array(hw_res->num_closid, sizeof(*hw_dom->ctrl_val),
445 if (!dc)
448 hw_dom->ctrl_val = dc;
449 setup_default_ctrlval(r, dc);
/linux-master/drivers/block/drbd/
H A Ddrbd_main.c720 struct disk_conf *dc; local
743 dc = rcu_dereference(peer_device->device->ldev->disk_conf);
744 p->resync_rate = cpu_to_be32(dc->resync_rate);
745 p->c_plan_ahead = cpu_to_be32(dc->c_plan_ahead);
746 p->c_delay_target = cpu_to_be32(dc->c_delay_target);
747 p->c_fill_target = cpu_to_be32(dc->c_fill_target);
748 p->c_max_rate = cpu_to_be32(dc->c_max_rate);
2989 /* `-- act_log->nr_elements <-- ldev->dc.al_extents */
H A Ddrbd_nl.c1148 static int drbd_check_al_size(struct drbd_device *device, struct disk_conf *dc) argument
1156 device->act_log->nr_elements == dc->al_extents)
1162 dc->al_extents, sizeof(struct lc_element), 0);
1470 static int disk_opts_check_al_size(struct drbd_device *device, struct disk_conf *dc) argument
1475 device->act_log->nr_elements == dc->al_extents)
1486 err = drbd_check_al_size(device, dc);
H A Ddrbd_receiver.c1432 struct disk_conf *dc; local
1434 dc = rcu_dereference(bdev->disk_conf);
1436 if (wo == WO_BDEV_FLUSH && !dc->disk_flushes)
1438 if (wo == WO_DRAIN_IO && !dc->disk_drain)
1580 struct disk_conf *dc; local
1587 dc = rcu_dereference(device->ldev->disk_conf);
1588 can_do = dc->discard_zeroes_if_aligned;
3256 int rct, dc; /* roles at crash time */ local
3347 dc = test_bit(RESOLVE_CONFLICTS, &connection->flags);
3348 return dc
[all...]
H A Ddrbd_worker.c499 struct disk_conf *dc; local
509 dc = rcu_dereference(device->ldev->disk_conf);
512 steps = plan->size; /* (dc->c_plan_ahead * 10 * SLEEP_TIME) / HZ; */
515 want = ((dc->resync_rate * 2 * SLEEP_TIME) / HZ) * steps;
517 want = dc->c_fill_target ? dc->c_fill_target :
518 sect_in * dc->c_delay_target * HZ / (SLEEP_TIME * 10);
536 max_sect = (dc->c_max_rate * 2 * SLEEP_TIME) / HZ;
/linux-master/drivers/block/rnbd/
H A Drnbd-srv.c206 DECLARE_COMPLETION_ONSTACK(dc);
218 sess_dev->destroy_comp = &dc;
220 wait_for_completion(&dc); /* wait for inflights to drop to zero */
/linux-master/drivers/clk/
H A Dclk-asm9260.c302 const struct asm9260_div_clk *dc = &asm9260_div_clks[n]; local
304 hws[dc->idx] = clk_hw_register_divider(NULL, dc->name,
305 dc->parent_name, CLK_SET_RATE_PARENT,
306 base + dc->reg, 0, 8, CLK_DIVIDER_ONE_BASED,
/linux-master/drivers/clk/mvebu/
H A Ddove-divider.c51 static unsigned int dove_get_divider(struct dove_clk *dc) argument
56 val = readl_relaxed(dc->base + DIV_CTRL0);
57 val >>= dc->div_bit_start;
59 divider = val & ~(~0 << dc->div_bit_size);
61 if (dc->divider_table)
62 divider = dc->divider_table[divider];
67 static int dove_calc_divider(const struct dove_clk *dc, unsigned long rate, argument
74 if (dc->divider_table) {
77 for (i = 0; dc->divider_table[i]; i++)
78 if (divider == dc
101 struct dove_clk *dc = to_dove_clk(hw); local
114 struct dove_clk *dc = to_dove_clk(hw); local
133 struct dove_clk *dc = to_dove_clk(hw); local
161 clk_register_dove_divider(struct device *dev, struct dove_clk *dc, const char **parent_names, size_t num_parents, void __iomem *base) argument
[all...]
/linux-master/drivers/dma/dw-edma/
H A Ddw-edma-core.c524 struct data_chunk *dc = &il->sgl[i % fsz]; local
528 src_addr += dmaengine_get_src_icg(il, dc);
532 dst_addr += dmaengine_get_dst_icg(il, dc);
/linux-master/drivers/dma/
H A Dtegra186-gpc-dma.c271 static inline struct tegra_dma_channel *to_tegra_dma_chan(struct dma_chan *dc) argument
273 return container_of(dc, struct tegra_dma_channel, vc.chan);
363 static int tegra_dma_slave_config(struct dma_chan *dc, argument
366 struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
399 static int tegra_dma_device_pause(struct dma_chan *dc) argument
401 struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
424 static int tegra_dma_device_resume(struct dma_chan *dc) argument
426 struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
635 static void tegra_dma_issue_pending(struct dma_chan *dc) argument
637 struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
698 tegra_dma_terminate_all(struct dma_chan *dc) argument
757 tegra_dma_tx_status(struct dma_chan *dc, dma_cookie_t cookie, struct dma_tx_state *txstate) argument
859 tegra_dma_prep_dma_memset(struct dma_chan *dc, dma_addr_t dest, int value, size_t len, unsigned long flags) argument
926 tegra_dma_prep_dma_memcpy(struct dma_chan *dc, dma_addr_t dest, dma_addr_t src, size_t len, unsigned long flags) argument
996 tegra_dma_prep_slave_sg(struct dma_chan *dc, struct scatterlist *sgl, unsigned int sg_len, enum dma_transfer_direction direction, unsigned long flags, void *context) argument
1116 tegra_dma_prep_dma_cyclic(struct dma_chan *dc, dma_addr_t buf_addr, size_t buf_len, size_t period_len, enum dma_transfer_direction direction, unsigned long flags) argument
1239 tegra_dma_alloc_chan_resources(struct dma_chan *dc) argument
1255 tegra_dma_chan_synchronize(struct dma_chan *dc) argument
1263 tegra_dma_free_chan_resources(struct dma_chan *dc) argument
[all...]
H A Dtegra20-apb-dma.c246 static inline struct tegra_dma_channel *to_tegra_dma_chan(struct dma_chan *dc) argument
248 return container_of(dc, struct tegra_dma_channel, dma_chan);
329 static int tegra_dma_slave_config(struct dma_chan *dc, argument
332 struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
702 static void tegra_dma_issue_pending(struct dma_chan *dc) argument
704 struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
736 static int tegra_dma_terminate_all(struct dma_chan *dc) argument
738 struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
804 static void tegra_dma_synchronize(struct dma_chan *dc) argument
806 struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
886 tegra_dma_tx_status(struct dma_chan *dc, dma_cookie_t cookie, struct dma_tx_state *txstate) argument
1035 tegra_dma_prep_slave_sg(struct dma_chan *dc, struct scatterlist *sgl, unsigned int sg_len, enum dma_transfer_direction direction, unsigned long flags, void *context) argument
1161 tegra_dma_prep_dma_cyclic(struct dma_chan *dc, dma_addr_t buf_addr, size_t buf_len, size_t period_len, enum dma_transfer_direction direction, unsigned long flags) argument
1297 tegra_dma_alloc_chan_resources(struct dma_chan *dc) argument
1306 tegra_dma_free_chan_resources(struct dma_chan *dc) argument
[all...]
H A Dtegra210-adma.c189 static inline struct tegra_adma_chan *to_tegra_adma_chan(struct dma_chan *dc) argument
191 return container_of(dc, struct tegra_adma_chan, vc.chan);
210 static int tegra_adma_slave_config(struct dma_chan *dc, argument
213 struct tegra_adma_chan *tdc = to_tegra_adma_chan(dc);
426 static void tegra_adma_issue_pending(struct dma_chan *dc) argument
428 struct tegra_adma_chan *tdc = to_tegra_adma_chan(dc);
451 static int tegra_adma_pause(struct dma_chan *dc) argument
453 struct tegra_adma_chan *tdc = to_tegra_adma_chan(dc);
473 static int tegra_adma_resume(struct dma_chan *dc) argument
475 struct tegra_adma_chan *tdc = to_tegra_adma_chan(dc);
486 tegra_adma_terminate_all(struct dma_chan *dc) argument
505 tegra_adma_tx_status(struct dma_chan *dc, dma_cookie_t cookie, struct dma_tx_state *txstate) argument
628 tegra_adma_prep_dma_cyclic( struct dma_chan *dc, dma_addr_t buf_addr, size_t buf_len, size_t period_len, enum dma_transfer_direction direction, unsigned long flags) argument
667 tegra_adma_alloc_chan_resources(struct dma_chan *dc) argument
690 tegra_adma_free_chan_resources(struct dma_chan *dc) argument
[all...]

Completed in 392 milliseconds

1234567891011>>