Searched refs:x10 (Results 276 - 300 of 3017) sorted by relevance

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/netbsd-6-1-5-RELEASE/sys/dev/i2c/
H A Dpcf8583reg.h43 #define PCF8583_NVRAM_START 0x10
54 #define PCF8583_CSR_FN_50HZ 0x10
83 #define PCF8583_ALMCTL_CLKALM_DAILY 0x10
/netbsd-6-1-5-RELEASE/sys/dev/ic/
H A Dcs4231reg.h96 #define ALT_F1_PMCE 0x10 /* Playback mode change enable */
122 #define CS_IRQ_PI 0x10 /* Playback Interrupt */
159 #define REC_FMT_SM 0x10 /* 0: mono, 1: stereo */
H A Dihareg.h83 #define SRSTD 0x10 /* SCSI Reset Detected */
94 #define SFEMP 0x10 /* FIFO empty */
99 #define RSFIFO 0x10 /* Flush FIFO */
107 #define DPHDN 0x10 /* Data phase done */
116 #define PWDN 0x10 /* Power down mode */
125 #define TMCZ 0x10 /* Timeout counter zero */
134 #define ADMA8 0x10 /* Alternate dma 8-bits mode */
158 #define SEL 0x10 /* SEL signal */
194 #define BMTST 0x10 /* Bus Master Test */
203 #define SCMP 0x10 /* SCS
[all...]
H A Dnec71071reg.h29 #define CHANNEL_RBASE 0x10 /* Only base registers may be accessed */
42 #define DCTRL1_ROT 0x10 /* Rotational Priority */
55 #define MODE_AUTI 0x10 /* Autoinitialize */
H A Dwereg.h40 #define WE_ICR_RLA 0x10 /* recall LAN address */
72 #define WE_IRR_FLASH 0x10 /* Flash RAM is in the ROM socket */
112 #define WE790_HWR_RST 0x10 /* hardware reset */
141 #define WE790_RAR_SZ16 0x10 /* 16k memory buffer */
216 #define WE_NIC_OFFSET 0x10 /* I/O base offset to NIC */
H A Di82365reg.h77 #define PCIC_IF_STATUS_MEM_WP 0x10
90 #define PCIC_PWRCTL_PWR_ENABLE 0x10
104 #define PCIC_CSC_GPI 0x10
115 #define PCIC_ADDRWIN_ENABLE_MEM4 0x10
125 #define PCIC_CARD_DETECT_RESUME_ENABLE 0x10
139 #define PCIC_INTR_ENABLE 0x10
165 #define PCIC_CSC_INTR_IRQ_RESERVED1 0x10
204 #define PCIC_IOCTL_IO1_DATASIZE_MASK 0x10
205 #define PCIC_IOCTL_IO1_DATASIZE_16BIT 0x10
266 #define PCIC_SYSMEM_ADDR0_START_LSB 0x10
[all...]
H A Dopl3sa3reg.h59 #define SA2_PWR_MNG_CLKO 0x10 /* [2] Master Clock disable */
70 #define SA3_SYS_CTL_YMODE1 0x10 /* Notebook PC mode (1) (3cm) */
85 #define SA3_IRQ_CONF_WSS_B 0x10 /* WSS CODEC uses IRQ-B */
97 #define SA3_IRQ_STAT_MPU 0x10 /* MPU401 Interrupt */
106 #define SA3_DMA_CONF_WSS_P_B 0x10 /* WSS CODEC playback uses DMA-B */
154 #define SA3_MIC_MCV_12 0x10 /* -12.0dB */
174 #define SA3_MISC_MCSW 0x10 /* A/D is connected to 0: Rch of Mic,
199 #define SA3_SB_SCAN 0x10 /* SB Internal State Scan out/in (R/W)*/
215 #define SA3_DPWRDWN_FM 0x10 /* FM (OPL3) power down */
224 #define SA3_APWRDWN_FMDAC 0x10 /* FMDA
[all...]
H A Dcd18xxreg.h97 #define CD18xx_MCR 0x10 /* modem change */
98 #define CD18xx_MCOR1 0x10 /* modem change option (1) */
123 #define CD18xx_SRCR_GLOBPRI 0x10 /* global priority */
151 #define CD18xx_SRSR_RxPEND 0x10 /* got a Rx interrupt */
185 #define CD18xx_SRER_Rx 0x10 /* Rx data service request */
195 #define CD18xx_CCR_CHANCTL 0x10 /* channel control command */
221 #define CD18xx_COR1_IGNORE 0x10 /* parity ignore mode */
237 #define CD18xx_COR2_LLM 0x10 /* local loopback mode */
247 #define CD18xx_COR3_SCDE 0x10 /* special character detection enable */
263 #define CD18xx_xBRPR_TPC 0x10 /* tick
[all...]
/netbsd-6-1-5-RELEASE/sys/dev/isa/
H A Dif_elreg.h37 #define EL_RXS_NOFLOW 0x10 /* No overflow */
47 #define EL_RXC_DNOFLOW 0x10 /* Detect frames w/o overflow ??? */
67 #define EL_AS_DMADONE 0x10 /* DMA finished */
H A Dpasreg.h55 #define S_C_1_PCS_STEREO 0x10 /* R W PC speaker 1=enable PC speaker stereo effect, 0=disable */
78 #define C_E_PCM_COMPRESSION 0x10 /* R W PCM 1=enable, 0=disabled compression */
93 #define O_M_2_BUS_TIMING 0x10 /* R Control 1=AT bus timing, 0=XT bus timing */
101 #define I_M_MIDI_IRQ_ENABLE 0x10 /* R W MIDI Enable MIDI interrupt */
109 #define I_S_MIDI_IRQ 0x10 /* R W MIDI MIDI Interrupt Pending */
151 { 0x00, 0x00, 0x08, 0x10, 0x00, 0x18, 0x00, 0x20, 0x00, 0x00, 0x28, 0x30, 0x38 };
171 #define P_M_MV508_MIXER 0x10 /* W Mixer MVD508 Select a mixer (rather than a volume) */
202 #define S_M_MIXER_RESET 0x10 /* R W Mixer Mixer chip reset */
211 #define P_C_PCM_DAC_MODE 0x10 /* R W PCM Playback (DAC) mode */
237 #define M_C_ENA_OUTPUT_HALF_IRQ 0x10 /*
[all...]
/netbsd-6-1-5-RELEASE/sys/arch/atari/stand/bootpref/
H A Dbootpref.h36 #define BOOTPREF_LINUX 0x10
59 #define DATIME_24H 0x10 /* Otherwise 12H */
80 #define VID2_VGA 0x10 /* Otherwise TV */
/netbsd-6-1-5-RELEASE/sys/dev/scsipi/
H A Dses.h100 #define SESTYP_LANGUAGE 0x10
146 #define SESCTL_RSTSWAP 0x10
156 #define SESCTL_DEVOFF 0x10 /* DEVICE OFF */
/netbsd-6-1-5-RELEASE/sys/dev/pci/
H A Dpciide_cmd_reg.h52 #define CMD_CTRL_PAR 0x10 /* 0640/3/6 only */
69 #define CMD_ARTTIM23_IRQ 0x10
80 #define CMD_DMA_IRQ_DIS(chan) (0x10 << (chan))
H A Dpciide_natsemi_reg.h44 #define NATSEMI_CTRL1_CH1INTMAP 0x10
54 #define NATSEMI_CTRL2_BUF1BYP 0x10 /* bypass buffer 1 */
65 #define NATSEMI_CTRL3_C1D1DMARQ 0x10 /* c1d1 dmarq handshaking */
H A Dauichreg.h43 #define ICH_NAMBAR 0x10
57 #define ICH_FIFOE 0x10 /* fifo error */
66 #define ICH_IOCE 0x10 /* int on completion enable */
75 #define ICH_PCMO 0x10
94 #define ICH_PRIE 0x10 /* int when primary codec resume */
H A Dtrmreg.h84 #define INT_DISCONNECT 0x10 /* Bus disconnected interrupt */
98 #define WIDE_SYNC 0x10 /* Enable WIDE sync */
174 #define EN_DISCONNECT 0x10 /* Enable bus disconnected intr */
182 #define PARITYCHECK 0x10 /* Enable parity check */
185 #define ACTIVE_NEGPLUS 0x10 /* Enhance active negation */
291 #define EN_EEPROM 0x10 /* Enable EEPROM programming */
297 #define CON5068 0x10 /* External 50/68 pin connected */
/netbsd-6-1-5-RELEASE/sys/arch/acorn32/mainbus/
H A Dpiocreg.h64 #define PIOC_FDC_ENABLE 0x10 /* fdc enable */
80 #define PIOC_UART2_ADDR_COM2 0x10 /* uart2 address com2 */
99 #define PIOC_CM_REGS 0x10 /* number of registers */
/netbsd-6-1-5-RELEASE/external/gpl3/binutils/dist/include/opcode/
H A Dpyr.h88 /* the first 5,(0x1|0x2|0x4|0x8|0x10) ie (1|2|4|8|16), ie ( 32 -1)*/
94 #define CONVERT (1|8|0x10|0x20|0x200)
122 {"movw", { 2, "", ANY, 0x10} },
124 {"mnegw", { 2, "", (0x1|0x8|0x10), 0x14} },
127 {"mcomw", { 2, "", (0x1|0x8|0x10), 0x17} },
128 {"mabsw", { 2, "", (0x1|0x8|0x10), 0x18} },
131 {"mtstw", { 2, "", (0x1|0x8|0x10), 0x1c} },
134 {"mova", { 2, "", 0x8|0x10, 0x1f} },
135 {"movzbw", { 2, "", (0x1|0x8|0x10), 0x20} },
136 {"movzhw", { 2, "", (0x1|0x8|0x10),
[all...]
/netbsd-6-1-5-RELEASE/external/gpl3/gdb/dist/include/opcode/
H A Dpyr.h88 /* the first 5,(0x1|0x2|0x4|0x8|0x10) ie (1|2|4|8|16), ie ( 32 -1)*/
94 #define CONVERT (1|8|0x10|0x20|0x200)
122 {"movw", { 2, "", ANY, 0x10} },
124 {"mnegw", { 2, "", (0x1|0x8|0x10), 0x14} },
127 {"mcomw", { 2, "", (0x1|0x8|0x10), 0x17} },
128 {"mabsw", { 2, "", (0x1|0x8|0x10), 0x18} },
131 {"mtstw", { 2, "", (0x1|0x8|0x10), 0x1c} },
134 {"mova", { 2, "", 0x8|0x10, 0x1f} },
135 {"movzbw", { 2, "", (0x1|0x8|0x10), 0x20} },
136 {"movzhw", { 2, "", (0x1|0x8|0x10),
[all...]
/netbsd-6-1-5-RELEASE/sys/arch/atari/include/
H A Dmfp.h80 #define IO_AINT 0x10 /* ACIA interrupt (KB or MIDI) */
91 #define IA_RRDY 0x10 /* Serial Receiver Ready(=Full) */
101 /* 0x10 *//* reserved */
111 #define IB_TIMD 0x10 /* Timer D */
121 /* 0x10 *//* reserved */
142 #define T_LOWO 0x10 /* force output low */
151 #define U_ST1_5 0x10 /* async, 1.5 stop bit */
165 #define RS_FE 0x10 /* Frame Error */
178 #define TS_EOT 0x10 /* End of Transmission */
/netbsd-6-1-5-RELEASE/external/gpl3/binutils/dist/gas/testsuite/gas/mips/
H A Dl_d-n64.d40 [0-9a-f]+ <[^>]*> dsll at,at,0x10
45 [0-9a-f]+ <[^>]*> dsll at,at,0x10
58 [0-9a-f]+ <[^>]*> dsll at,at,0x10
63 [0-9a-f]+ <[^>]*> dsll at,at,0x10
80 [0-9a-f]+ <[^>]*> dsll at,at,0x10
85 [0-9a-f]+ <[^>]*> dsll at,at,0x10
102 [0-9a-f]+ <[^>]*> dsll at,at,0x10
107 [0-9a-f]+ <[^>]*> dsll at,at,0x10
124 [0-9a-f]+ <[^>]*> dsll at,at,0x10
129 [0-9a-f]+ <[^>]*> dsll at,at,0x10
[all...]
H A Ds_d-n64.d40 [0-9a-f]+ <[^>]*> dsll at,at,0x10
45 [0-9a-f]+ <[^>]*> dsll at,at,0x10
58 [0-9a-f]+ <[^>]*> dsll at,at,0x10
63 [0-9a-f]+ <[^>]*> dsll at,at,0x10
80 [0-9a-f]+ <[^>]*> dsll at,at,0x10
85 [0-9a-f]+ <[^>]*> dsll at,at,0x10
102 [0-9a-f]+ <[^>]*> dsll at,at,0x10
107 [0-9a-f]+ <[^>]*> dsll at,at,0x10
124 [0-9a-f]+ <[^>]*> dsll at,at,0x10
129 [0-9a-f]+ <[^>]*> dsll at,at,0x10
[all...]
H A Dsd-n64.d40 [0-9a-f]+ <[^>]*> dsll at,at,0x10
45 [0-9a-f]+ <[^>]*> dsll at,at,0x10
58 [0-9a-f]+ <[^>]*> dsll at,at,0x10
63 [0-9a-f]+ <[^>]*> dsll at,at,0x10
80 [0-9a-f]+ <[^>]*> dsll at,at,0x10
85 [0-9a-f]+ <[^>]*> dsll at,at,0x10
102 [0-9a-f]+ <[^>]*> dsll at,at,0x10
107 [0-9a-f]+ <[^>]*> dsll at,at,0x10
124 [0-9a-f]+ <[^>]*> dsll at,at,0x10
129 [0-9a-f]+ <[^>]*> dsll at,at,0x10
[all...]
/netbsd-6-1-5-RELEASE/external/lgpl3/gmp/dist/mpn/powerpc32/vmx/
H A Dmod_34lsub1.asm359 .byte 0x10,0x01,0x02,0x03, 0x10,0x06,0x07,0x00, 0x10,0x0b,0x04,0x05, 0x10,0x08,0x09,0x0a C a0
360 .byte 0x10,0x07,0x00,0x01, 0x10,0x04,0x05,0x06, 0x10,0x09,0x0a,0x0b, 0x10,0x0e,0x0f,0x08 C a1
361 .byte 0x10,0x00,0x01,0x02, 0x10,
[all...]
/netbsd-6-1-5-RELEASE/external/gpl3/binutils/dist/gas/testsuite/gas/m68hc11/
H A Dbranchs12.d24 0+10 <start\+0x10> bls 0+48 <L1>
88 0+58 <L1\+0x10> lbhi 0+1e7 <L2>
170 0+d7 <L1\+0x8f> lbgt 0+10 <start\+0x10>
173 0+db <L1\+0x93> lbge 0+10 <start\+0x10>
176 0+df <L1\+0x97> lble 0+10 <start\+0x10>
179 0+e3 <L1\+0x9b> lblt 0+10 <start\+0x10>
182 0+e7 <L1\+0x9f> lbhi 0+10 <start\+0x10>
185 0+eb <L1\+0xa3> lbcc 0+10 <start\+0x10>
188 0+ef <L1\+0xa7> lbcc 0+10 <start\+0x10>
191 0+f3 <L1\+0xab> lbeq 0+10 <start\+0x10>
[all...]

Completed in 264 milliseconds

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