1/* $NetBSD: opl3sa3reg.h,v 1.4 2005/12/11 12:21:28 christos Exp $ */ 2 3/*- 4 * Copyright (c) 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by ITOH Yasufumi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32/* 33 * YAMAHA YMF711 (OPL3 Single-chip Audio System 2; OPL3-SA2) 34 * YAMAHA YMF715x (OPL3 Single-chip Audio System 3; OPL3-SA3) 35 * control register description 36 * 37 * Other ports (SBpro, WSS CODEC, MPU401, OPL3, etc.) are NOT listed here. 38 */ 39 40/* [2]: OPL3-SA2 only, [3]: OPL3-SA3 only */ 41 42/* 43 * direct registers 44 */ 45 46/* offset from the base address */ 47#define SA3_CTL_INDEX 0 /* Index port (R/W) */ 48#define SA3_CTL_DATA 1 /* Data register port (R/W) */ 49 50#define SA3_CTL_NPORT 2 /* number of ports */ 51 52/* 53 * indirect registers 54 */ 55 56#define SA3_PWR_MNG 0x01 /* Power management (R/W) */ 57#define SA2_PWR_MNG_SRST 0x80 /* [2] Software reset */ 58#define SA3_PWR_MNG_ADOWN 0x20 /* [3] Analog Down */ 59#define SA2_PWR_MNG_CLKO 0x10 /* [2] Master Clock disable */ 60#define SA2_PWR_MNG_FMPS 0x08 /* [2] OPL3 power down */ 61#define SA3_PWR_MNG_PSV 0x04 /* Power save */ 62#define SA3_PWR_MNG_PDN 0x02 /* Power down */ 63#define SA3_PWR_MNG_PDX 0x01 /* Oscillation stop */ 64#define SA3_PWR_MNG_DEFAULT 0x00 /* default value */ 65 66#define SA3_SYS_CTL 0x02 /* System control (R/W) */ 67#define SA3_SYS_CTL_SBHE 0x80 /* 0: AT-bus, 1: XT-bus */ 68#define SA3_SYS_CTL_YMODE 0x30 /* [3] 3D Enhancement mode */ 69#define SA3_SYS_CTL_YMODE0 0x00 /* Desktop mode (speaker 5-12cm) */ 70#define SA3_SYS_CTL_YMODE1 0x10 /* Notebook PC mode (1) (3cm) */ 71#define SA3_SYS_CTL_YMODE2 0x20 /* Notebook PC mode (2) (1.5cm) */ 72#define SA3_SYS_CTL_YMODE3 0x30 /* Hi-Fi mode (16-38cm) */ 73#define SA3_SYS_CTL_IDSEL 0x06 /* Specify DSP version of SBPro */ 74#define SA3_SYS_CTL_IDSEL0 0x00 /* major 0x03, minor 0x01 */ 75#define SA3_SYS_CTL_IDSEL1 0x02 /* major 0x02, minor 0x01 */ 76#define SA3_SYS_CTL_IDSEL2 0x04 /* major 0x01, minor 0x05 */ 77#define SA3_SYS_CTL_IDSEL3 0x06 /* major 0x00, minor 0x00 */ 78#define SA3_SYS_CTL_VZE 0x01 /* ZV */ 79#define SA3_SYS_CTL_DEFAULT 0x00 /* default value */ 80 81#define SA3_IRQ_CONF 0x03 /* Interrupt Channel config (R/W) */ 82#define SA3_IRQ_CONF_OPL3_B 0x80 /* OPL3 uses IRQ-B */ 83#define SA3_IRQ_CONF_MPU_B 0x40 /* MPU401 uses IRQ-B */ 84#define SA3_IRQ_CONF_SB_B 0x20 /* Sound Blaster uses IRQ-B */ 85#define SA3_IRQ_CONF_WSS_B 0x10 /* WSS CODEC uses IRQ-B */ 86#define SA3_IRQ_CONF_OPL3_A 0x08 /* OPL3 uses IRQ-A */ 87#define SA3_IRQ_CONF_MPU_A 0x04 /* MPU401 uses IRQ-A */ 88#define SA3_IRQ_CONF_SB_A 0x02 /* Sound Blaster uses IRQ-A */ 89#define SA3_IRQ_CONF_WSS_A 0x01 /* WSS CODEC uses IRQ-A */ 90#define SA3_IRQ_CONF_DEFAULT (SA3_IRQ_CONF_MPU_B | SA3_IRQ_CONF_SB_B | \ 91 SA3_IRQ_CONF_OPL3_A | SA3_IRQ_CONF_WSS_A) 92 93#define SA3_IRQA_STAT 0x04 /* Interrupt (IRQ-A) STATUS (RO) */ 94#define SA3_IRQB_STAT 0x05 /* Interrupt (IRQ-B) STATUS (RO) */ 95#define SA3_IRQ_STAT_MV 0x40 /* [3] Hardware Volume Interrupt */ 96#define SA3_IRQ_STAT_OPL3 0x20 /* Internal FM-synthesizer timer */ 97#define SA3_IRQ_STAT_MPU 0x10 /* MPU401 Interrupt */ 98#define SA3_IRQ_STAT_SB 0x08 /* Sound Blaster Playback Interrupt */ 99#define SA3_IRQ_STAT_TI 0x04 /* Timer Flag of CODEC */ 100#define SA3_IRQ_STAT_CI 0x02 /* Recording Flag of CODEC */ 101#define SA3_IRQ_STAT_PI 0x01 /* Playback Flag of CODEC */ 102 103#define SA3_DMA_CONF 0x06 /* DMA configuration (R/W) */ 104#define SA3_DMA_CONF_SB_B 0x40 /* Sound Blaster playback uses DMA-B */ 105#define SA3_DMA_CONF_WSS_R_B 0x20 /* WSS CODEC recording uses DMA-B */ 106#define SA3_DMA_CONF_WSS_P_B 0x10 /* WSS CODEC playback uses DMA-B */ 107#define SA3_DMA_CONF_SB_A 0x04 /* Sound Blaster playback uses DMA-A */ 108#define SA3_DMA_CONF_WSS_R_A 0x02 /* WSS CODEC recording uses DMA-A */ 109#define SA3_DMA_CONF_WSS_P_A 0x01 /* WSS CODEC playback uses DMA-A */ 110#define SA3_DMA_CONF_DEFAULT (SA3_DMA_CONF_SB_B | SA3_DMA_CONF_WSS_R_B | \ 111 SA3_DMA_CONF_WSS_P_A) 112 113#define SA3_VOL_L 0x07 /* Master Volume Lch (R/W) */ 114#define SA3_VOL_R 0x08 /* Master Volume Rch (R/W) */ 115#define SA3_VOL_MUTE 0x80 /* Mute the channel */ 116#define SA3_VOL_MV 0x0f /* Master Volume bits */ 117#define SA3_VOL_MV_0 0x00 /* 0dB (maximum volume) */ 118#define SA3_VOL_MV_2 0x01 /* -2dB */ 119#define SA3_VOL_MV_4 0x02 /* -4dB */ 120#define SA3_VOL_MV_6 0x03 /* -6dB */ 121#define SA3_VOL_MV_8 0x04 /* -8dB */ 122#define SA3_VOL_MV_10 0x05 /* -10dB */ 123#define SA3_VOL_MV_12 0x06 /* -12dB */ 124#define SA3_VOL_MV_14 0x07 /* -14dB (default) */ 125#define SA3_VOL_MV_16 0x08 /* -16dB */ 126#define SA3_VOL_MV_18 0x09 /* -18dB */ 127#define SA3_VOL_MV_20 0x0a /* -20dB */ 128#define SA3_VOL_MV_22 0x0b /* -22dB */ 129#define SA3_VOL_MV_24 0x0c /* -24dB */ 130#define SA3_VOL_MV_26 0x0d /* -26dB */ 131#define SA3_VOL_MV_28 0x0e /* -28dB */ 132#define SA3_VOL_MV_30 0x0f /* -30dB (minimum volume) */ 133#define SA3_VOL_DEFAULT SA3_VOL_MV_14 134 135#define SA3_MIC_VOL 0x09 /* MIC Volume (R/W) */ 136#define SA3_MIC_MUTE 0x80 /* Mute Mic Volume */ 137#define SA3_MIC_MCV 0x1f /* Mic volume bits */ 138#define SA3_MIC_MCV12 0x00 /* +12.0dB (maximum volume) */ 139#define SA3_MIC_MCV10_5 0x01 /* +10.5dB */ 140#define SA3_MIC_MCV9 0x02 /* +9.0dB */ 141#define SA3_MIC_MCV7_5 0x03 /* +7.5dB */ 142#define SA3_MIC_MCV6 0x04 /* +6.0dB */ 143#define SA3_MIC_MCV4_5 0x05 /* +4.5dB */ 144#define SA3_MIC_MCV3 0x06 /* +3.0dB */ 145#define SA3_MIC_MCV1_5 0x07 /* +1.5dB */ 146#define SA3_MIC_MCV_0 0x08 /* 0.0dB (default) */ 147#define SA3_MIC_MCV_1_5 0x09 /* -1.5dB */ 148#define SA3_MIC_MCV_3_0 0x0a /* -3.0dB */ 149#define SA3_MIC_MCV_4_5 0x0b /* -4.5dB */ 150#define SA3_MIC_MCV_6 0x0c /* -6.0dB */ 151#define SA3_MIC_MCV_7_5 0x0d /* -7.5dB */ 152#define SA3_MIC_MCV_9 0x0e /* -9.0dB */ 153#define SA3_MIC_MCV_10_5 0x0f /* -10.5dB */ 154#define SA3_MIC_MCV_12 0x10 /* -12.0dB */ 155#define SA3_MIC_MCV_13_5 0x11 /* -13.5dB */ 156#define SA3_MIC_MCV_15 0x12 /* -15.0dB */ 157#define SA3_MIC_MCV_16_5 0x13 /* -16.5dB */ 158#define SA3_MIC_MCV_18 0x14 /* -18.0dB */ 159#define SA3_MIC_MCV_19_5 0x15 /* -19.5dB */ 160#define SA3_MIC_MCV_21 0x16 /* -21.0dB */ 161#define SA3_MIC_MCV_22_5 0x17 /* -22.5dB */ 162#define SA3_MIC_MCV_24 0x18 /* -24.0dB */ 163#define SA3_MIC_MCV_25_5 0x19 /* -25.5dB */ 164#define SA3_MIC_MCV_27 0x1a /* -27.0dB */ 165#define SA3_MIC_MCV_28_5 0x1b /* -28.5dB */ 166#define SA3_MIC_MCV_30 0x1c /* -30.0dB */ 167#define SA3_MIC_MCV_31_5 0x1d /* -31.5dB */ 168#define SA3_MIC_MCV_33 0x1e /* -33.0dB */ 169#define SA3_MIC_MCV_34_5 0x1f /* -34.5dB (minimum volume) */ 170#define SA3_MIC_VOL_DEFAULT (SA3_MIC_MUTE | SA3_MIC_MCV_0) 171 172#define SA3_MISC 0x0a /* Miscellaneous */ 173#define SA3_MISC_VEN 0x80 /* Enable hardware volume control */ 174#define SA3_MISC_MCSW 0x10 /* A/D is connected to 0: Rch of Mic, 175 1: loopback of monaural output */ 176#define SA3_MISC_MODE 0x08 /* 0: SB mode, 1: WSS mode (RO) */ 177#define SA3_MISC_VER 0x07 /* Version of OPL3-SA2/OPL3-SA3 (RO) */ 178#define SA3_MISC_VER_711 1 /* OPL3-SA2 (YMF711) */ 179#define SA3_MISC_VER_715 2 /* OPL3-SA3 (YMF715) */ 180#define SA3_MISC_VER_715B 3 /* OPL3-SA3 (YMF715B) */ 181#define SA3_MISC_VER_715E 4 /* OPL3-SA3 (YMF715E) */ 182 /* (4 or 5?) */ 183/*#define SA3_MISC_DEFAULT (SA3_MISC_VEN | version) */ 184 185/* WSS DMA Base counters (R/W) used for suspend/resume */ 186#define SA3_DMA_CNT_PLAY_LOW 0x0b /* Playback Base Counter (Low) */ 187#define SA3_DMA_CNT_PLAY_HIGH 0x0c /* Playback Base Counter (High) */ 188#define SA3_DMA_CNT_REC_LOW 0x0d /* Recording Base Counter (Low) */ 189#define SA3_DMA_CNT_REC_HIGH 0x0e /* Recording Base Counter (High) */ 190 191/* [3] */ 192#define SA3_WSS_INT_SCAN 0x0f /* WSS Interrupt Scan out/in (R/W)*/ 193#define SA3_WSS_INT_SCAN_STI 0x04 /* 1: TI = "1" and IRQ active */ 194#define SA3_WSS_INT_SCAN_SCI 0x02 /* 1: CI = "1" and IRQ active */ 195#define SA3_WSS_INT_SCAN_SPI 0x01 /* 1: PI = "1" and IRQ active */ 196#define SA3_WSS_INT_DEFAULT 0x00 /* default value */ 197 198/* [3] */ 199#define SA3_SB_SCAN 0x10 /* SB Internal State Scan out/in (R/W)*/ 200#define SA3_SB_SCAN_SBPDA 0x80 /* Sound Blaster Power Down ack */ 201#define SA3_SB_SCAN_SS 0x08 /* Scan Select */ 202#define SA3_SB_SCAN_SM 0x04 /* Scan Mode 1: read out, 0: write in */ 203#define SA3_SB_SCAN_SE 0x02 /* Scan Enable */ 204#define SA3_SB_SCAN_SBPDR 0x01 /* Sound Blaster Power Down Request */ 205#define SA3_SB_SCAN_DEFAULT 0x00 /* default value */ 206 207/* [3] */ 208#define SA3_SB_SCAN_DATA 0x11 /* SB Internal State Scan Data (R/W)*/ 209 210/* [3] */ 211#define SA3_DPWRDWN 0x12 /* Digital Partial Power Down (R/W) */ 212#define SA3_DPWRDWN_JOY 0x80 /* Joystick power down */ 213#define SA3_DPWRDWN_MPU 0x40 /* MPU401 power down */ 214#define SA3_DPWRDWN_MCLKO 0x20 /* Master Clock disable */ 215#define SA3_DPWRDWN_FM 0x10 /* FM (OPL3) power down */ 216#define SA3_DPWRDWN_WSS_R 0x08 /* WSS recording power down */ 217#define SA3_DPWRDWN_WSS_P 0x04 /* WSS playback power down */ 218#define SA3_DPWRDWN_SB 0x02 /* Sound Blaster power down */ 219#define SA3_DPWRDWN_PNP 0x01 /* PnP power down */ 220#define SA3_DPWRDWN_DEFAULT 0x00 /* default value */ 221 222/* [3] */ 223#define SA3_APWRDWN 0x13 /* Analog Partial Power Down (R/W) */ 224#define SA3_APWRDWN_FMDAC 0x10 /* FMDAC for OPL3 power down */ 225#define SA3_APWRDWN_AD 0x08 /* A/D for WSS recording power down */ 226#define SA3_APWRDWN_DA 0x04 /* D/A for WSS playback power down */ 227#define SA3_APWRDWN_SBDAC 0x02 /* D/A for SB power down */ 228#define SA3_APWRDWN_WIDE 0x01 /* Wide Stereo power down */ 229#define SA3_APWRDWN_DEFAULT 0x00 /* default value */ 230 231/* [3] */ 232#define SA3_3D_WIDE 0x14 /* 3D Enhanced control (WIDE) (R/W) */ 233#define SA3_3D_WIDE_WIDER 0x70 /* Rch of wide 3D enhanced control */ 234#define SA3_3D_WIDE_WIDEL 0x07 /* Lch of wide 3D enhanced control */ 235#define SA3_3D_WIDE_DEFAULT 0x00 /* default value */ 236 237/* [3] */ 238#define SA3_3D_BASS 0x15 /* 3D Enhanced control (BASS) (R/W) */ 239#define SA3_3D_BASS_BASSR 0x70 /* Rch of bass 3D enhanced control */ 240#define SA3_3D_BASS_BASSL 0x07 /* Lch of bass 3D enhanced control */ 241#define SA3_3D_BASS_DEFAULT 0x00 /* default value */ 242 243/* [3] */ 244#define SA3_3D_TREBLE 0x16 /* 3D Enhanced control (TREBLE) (R/W) */ 245#define SA3_3D_TREBLE_TRER 0x70 /* Rch of treble 3D enhanced control */ 246#define SA3_3D_TREBLE_TREL 0x07 /* Lch of treble 3D enhanced control */ 247#define SA3_3D_TREBLE_DEFAULT 0x00 /* default value */ 248 249/* common to the 3D enhance registers */ 250#define SA3_3D_BITS 0x07 251#define SA3_3D_LSHIFT 0 252#define SA3_3D_RSHIFT 4 253 254/* [3] */ 255#define SA3_HVOL_INTR_CNF 0x17 /* Hardware Volume Intr Channel (R/W) */ 256#define SA3_HVOL_INTR_CNF_B 0x20 /* Hardware Volume uses IRQ-B */ 257#define SA3_HVOL_INTR_CNF_A 0x10 /* Hardware Volume uses IRQ-A */ 258#define SA3_HVOL_INTR_CNF_DEFAULT 0x00 259 260/* [3] */ 261#define SA3_MULTI_STAT 0x18 /* Multi-purpose Select Pin Stat (RO) */ 262#define SA3_MULTI_STAT_SEL 0x70 /* State of SEL2-0 pins */ 263