1/* $NetBSD: cs4231reg.h,v 1.11 2008/04/28 18:49:27 garbled Exp $ */
2
3/*-
4 * Copyright (c) 1996 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Ken Hornstein and John Kohl.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32/*
33 * Register defs for Crystal Semiconductor CS4231 Audio Codec/mixer
34 * chip, used on Gravis UltraSound MAX cards.
35 *
36 * Block diagram:
37 *             +----------------------------------------------------+
38 *             |                                                    |
39 *             |   +----------------------------------------------+ |
40 *             |   |mixed in       +-+                            | |
41 *             |   +------------>--| |                            | |
42 *             | mic in            | |                            | |
43 *   Mic --+-->| --------- GAIN ->-| |                            | |
44 *         |   | AUX 1 in          |M|                            | |
45 *   GF1 --)-->| -------------+-->-|U|                            | |
46 *         |   | Line in      |    |X|---- GAIN ----------+       | |
47 *  Line --)-->| ---------+---)-->-| |                    |       | |
48 *         |   |          |   |    | |                    |       | |
49 *         |   |          |   |    +-+                   ADC      | |
50 *         |   |          |   |                           |       | |
51 *         |   |          |   |                           |       | |
52 *         |   |          |   +--- L/M --\                |       | | AMP-->
53 *         |   |          |               \               |       | |  |
54 *         |   |          |                \              |       | |  |
55 *         |   |          +---- L/M -------O-->--+--------)-------+-|--+-> line
56 *         |   |   mono in                /|     |        |         |
57 *         +---|-->------------ L/M -----/ |     |        |         |
58 *             |   AUX 2 in                |     |        |         |
59 *  CD --------|-->------------ L/M -------+    L/M       |         |
60 *             |                                 |        v         |
61 *             |                                 |        |         |
62 *             |                                DAC       |         |
63 *             |                                 |        |         |
64 *             +----------------------------------------------------+
65 *                                               |        |
66 *                                               |        |
67 *                                               v        v
68 *                                                Pc BUS (DISK) ???
69 *
70 */
71
72/* CS4231/AD1845 mode2 registers; added to AD1848 registers */
73#define CS_ALT_FEATURE1		16
74#define CS_ALT_FEATURE2		17
75#define CS_LEFT_LINE_CONTROL	18
76#define CS_RIGHT_LINE_CONTROL	19
77#define CS_TIMER_LOW		20
78#define CS_TIMER_HIGH		21
79#define CS_UPPER_FREQUENCY_SEL	22
80#define CS_LOWER_FREQUENCY_SEL	23
81#define CS_IRQ_STATUS		24
82#define CS_VERSION_ID		25
83#define CS_MONO_IO_CONTROL	26
84#define CS_POWERDOWN_CONTROL	27
85#define CS_LEFT_OUT		27 /* 4232 */
86#define CS_REC_FORMAT		28
87#define CS_RIGHT_OUT		29 /* 4232 */
88#define CS_XTAL_SELECT		29
89#define CS_UPPER_REC_CNT	30
90#define CS_LOWER_REC_CNT	31
91
92/* ALT_FEATURE1 - register I16 */
93#define ALT_F1_DACZ		0x01	/* 1: hold sample during underrun */
94#define ALT_F1_SPE		0x02	/* 1: Serial port enable */
95#define ALT_F1_SFORMAT		0x06	/* Serial port format */
96#define ALT_F1_PMCE		0x10	/* Playback mode change enable */
97#define ALT_F1_CMCE		0x20	/* Capture mode change enable */
98#define ALT_F1_TE		0x40	/* Timer enable */
99#define ALT_F1_OLB		0x80	/* Output level bit */
100
101/* ALT_FEATURE2 - register I17 */
102#define ALT_F2_HPF		0x01	/* High pass filter */
103#define ALT_F2_XTALE		0x02	/* Crytal enable */
104#define ALT_F2_APAR		0x04	/* ADPCM playback accumulator reset */
105#define ALT_F2_RES		0x08	/* reserved */
106#define ALT_F2_TEST		0xf0	/* Factory test bits */
107
108/* LINE_CONTROL (LEFT & RIGHT) - register I18,I19 */
109#define LINE_INPUT_ATTEN_BITS	0x1f
110#define LINE_INPUT_ATTEN_MASK	0xe0
111#define LINE_INPUT_MUTE		0x80
112#define LINE_INPUT_MUTE_MASK	(~LINE_INPUT_MUTE & 0xff)
113
114/* ALT_FEATURE3 - register I23 */
115#define ALT_F3_ACF		0x01	/* ADPCM capture freeze */
116
117/* ALT_FEATURE_STATUS (aka CS_IRQ_STATUS) - register I24 */
118#define CS_IRQ_PU		0x01	/* Playback Underrun */
119#define CS_IRQ_PO		0x02	/* Playback Overrun */
120#define CS_IRQ_CO		0x04	/* Capture Overrun */
121#define CS_IRQ_CU		0x08	/* Capture Underrun */
122#define CS_IRQ_PI		0x10	/* Playback Interrupt */
123#define CS_IRQ_CI		0x20	/* Capture Interrupt */
124#define CS_IRQ_TI		0x40	/* Timer Interrupt */
125#define CS_IRQ_RES		0x80	/* reserved */
126
127#define CS_I24_BITS		"\20\1PU\2PO\3CO\4CU\5PI\6CI\7TI"
128
129/* VERSION - register I25 */
130#define CS_VERSION_NUMBER	0xe0	/* Version number:
131					 *	0x101 - 4231 rev. A
132					 *	0x100 - 4231 previous revs
133					 *	0x100 - 4232 (unreleased?)
134					 *	0x101 - 4232 rev. C
135					 */
136#define CS_VERSION_CHIPID	0x07	/* Chip Identification.
137					 * Currently know values:
138					 *	0x000 - CS4231
139					 *	0x010 - CS4232
140					 */
141
142/* MONO_IO_CONTROL - register I26 */
143#define MONO_INPUT_ATTEN_BITS	0x0f
144#define MONO_INPUT_ATTEN_MASK	0xf0
145#define MONO_BYPASS		0x20
146#define MONO_OUTPUT_MUTE	0x40
147#define MONO_OUTPUT_MUTE_MASK	(~MONO_OUTPUT_MUTE & 0xff)
148#define MONO_INPUT_MUTE		0x80
149#define MONO_INPUT_MUTE_MASK	(~MONO_INPUT_MUTE & 0xff)
150
151/* CS_LEFT_OUT - register I27 */
152#define LEFT_OUT_ATTEN_BITS	0x0f
153#define LEFT_OUT_ATTEN_MASK	0xf0
154#define LEFT_OUT_MUTE		0x80
155#define LEFT_OUT_MUTE_MASK	(~LEFT_OUT_MUTE & 0xff)
156
157/* CS_REC_FORMAT - register I28 */
158#define REC_FMT_reserved	0x0f	/* reserved */
159#define REC_FMT_SM		0x10	/* 0: mono, 1: stereo */
160#define REC_FMT_CL		0x20	/* 0: linear, 1: companded */
161#define REC_FMT_FMT0		0x40	/* See register I8 for valid */
162#define REC_FMT_FMT1		0x80	/* combination of the FMT and CL bits */
163
164/* CS_RIGHT_OUT - register I27 */
165#define RIGHT_OUT_ATTEN_BITS	0x0f
166#define RIGHT_OUT_ATTEN_MASK	0xf0
167#define RIGHT_OUT_MUTE		0x80
168#define RIGHT_OUT_MUTE_MASK	(~RIGHT_OUT_MUTE & 0xff)
169