Searched refs:reg_off (Results 51 - 75 of 90) sorted by relevance

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/linux-master/drivers/staging/vt6656/
H A Dusbpipe.c71 int vnt_control_out_u8(struct vnt_private *priv, u8 reg, u8 reg_off, u8 data) argument
74 reg_off, reg, sizeof(u8), &data);
134 int vnt_control_in_u8(struct vnt_private *priv, u8 reg, u8 reg_off, u8 *data) argument
137 reg_off, reg, sizeof(u8), data);
/linux-master/drivers/clk/meson/
H A Da1-peripherals.c154 .reg_off = RTC_BY_OSCIN_CTRL0,
159 .reg_off = RTC_BY_OSCIN_CTRL0,
164 .reg_off = RTC_BY_OSCIN_CTRL1,
169 .reg_off = RTC_BY_OSCIN_CTRL1,
174 .reg_off = RTC_BY_OSCIN_CTRL0,
1618 .reg_off = CECA_CLK_CTRL0,
1623 .reg_off = CECA_CLK_CTRL0,
1628 .reg_off = CECA_CLK_CTRL1,
1633 .reg_off = CECA_CLK_CTRL1,
1638 .reg_off
[all...]
H A Dmeson8b.c62 .reg_off = HHI_MPLL_CNTL,
67 .reg_off = HHI_MPLL_CNTL,
72 .reg_off = HHI_MPLL_CNTL,
77 .reg_off = HHI_MPLL_CNTL2,
82 .reg_off = HHI_MPLL_CNTL,
87 .reg_off = HHI_MPLL_CNTL,
178 .reg_off = HHI_VID_PLL_CNTL,
183 .reg_off = HHI_VID_PLL_CNTL,
188 .reg_off = HHI_VID_PLL_CNTL,
193 .reg_off
[all...]
H A Daxg-audio.c89 .reg_off = (_reg), \
94 .reg_off = (_reg), \
112 .reg_off = (_reg), \
117 .reg_off = (_reg), \
122 .reg_off = (_reg), \
139 .reg_off = (_reg), \
157 .reg_off = (_reg), \
162 .reg_off = (_reg), \
H A Ds4-peripherals.c49 .reg_off = CLKCTRL_RTC_BY_OSCIN_CTRL0,
54 .reg_off = CLKCTRL_RTC_BY_OSCIN_CTRL0,
59 .reg_off = CLKCTRL_RTC_BY_OSCIN_CTRL1,
64 .reg_off = CLKCTRL_RTC_BY_OSCIN_CTRL1,
69 .reg_off = CLKCTRL_RTC_BY_OSCIN_CTRL0,
285 .reg_off = CLKCTRL_CECA_CTRL0,
290 .reg_off = CLKCTRL_CECA_CTRL0,
295 .reg_off = CLKCTRL_CECA_CTRL1,
300 .reg_off = CLKCTRL_CECA_CTRL1,
305 .reg_off
[all...]
/linux-master/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_util.h334 u32 reg_off,
337 int dpu_reg_read(struct dpu_hw_blk_reg_map *c, u32 reg_off);
H A Ddpu_hw_wb.c187 .reg_off = WB_CLK_CTRL,
H A Ddpu_hw_catalog.h459 * @reg_off: register offset
463 u32 reg_off; member in struct:dpu_clk_ctrl_reg
/linux-master/drivers/crypto/intel/keembay/
H A Docs-hcu.c376 int reg_off; local
379 for (reg_off = 0; reg_off < OCS_HCU_HW_KEY_LEN; reg_off += sizeof(u32))
380 writel(0, hcu_dev->io_base + OCS_HCU_KEY_0 + reg_off);
/linux-master/drivers/rtc/
H A Drtc-sh.c377 static inline int sh_rtc_read_alarm_value(struct sh_rtc *rtc, int reg_off) argument
382 byte = readb(rtc->regbase + reg_off);
415 int value, int reg_off)
419 writeb(0, rtc->regbase + reg_off);
421 writeb(bin2bcd(value) | AR_ENB, rtc->regbase + reg_off);
414 sh_rtc_write_alarm_value(struct sh_rtc *rtc, int value, int reg_off) argument
/linux-master/drivers/clk/stm32/
H A Dclk-stm32mp1.c341 u32 reg_off; member in struct:gate_cfg
352 u32 reg_off; member in struct:div_cfg
360 u32 reg_off; member in struct:mux_cfg
403 gate_cfg->reg_off + base,
434 div_cfg->reg_off + base,
452 mux_cfg->reg_off + base, mux_cfg->shift,
497 mmux->mux.reg = cfg->mux->reg_off + base;
512 mux->reg = cfg->mux->reg_off + base;
535 div->reg = cfg->div->reg_off + base;
558 mgate->gate.reg = cfg->gate->reg_off
[all...]
/linux-master/drivers/mtd/nand/raw/
H A Dqcom_nandc.c940 int reg_off, const void *vaddr,
954 nandc_reg_phys(nandc, reg_off + 4 * i),
960 nandc_reg_phys(nandc, reg_off + 4 * i),
1026 int reg_off, const void *vaddr, int size,
1064 slave_conf.src_addr = nandc->base_dma + reg_off;
1072 slave_conf.dst_addr = nandc->base_dma + reg_off;
1183 * @reg_off: offset within the controller's data buffer
1188 static int read_data_dma(struct qcom_nand_controller *nandc, int reg_off, argument
1194 return prep_adm_dma_desc(nandc, true, reg_off, vaddr, size, false);
1201 * @reg_off
939 prep_bam_dma_desc_cmd(struct qcom_nand_controller *nandc, bool read, int reg_off, const void *vaddr, int size, unsigned int flags) argument
1025 prep_adm_dma_desc(struct qcom_nand_controller *nandc, bool read, int reg_off, const void *vaddr, int size, bool flow_control) argument
1206 write_data_dma(struct qcom_nand_controller *nandc, int reg_off, const u8 *vaddr, int size, unsigned int flags) argument
1470 int ret, reg_off = FLASH_BUF_ACC, read_loc = 0; local
2058 int reg_off = FLASH_BUF_ACC; local
[all...]
/linux-master/drivers/thermal/samsung/
H A Dexynos_tmu.c338 static void exynos_tmu_update_bit(struct exynos_tmu_data *data, int reg_off, argument
343 interrupt_en = readl(data->base + reg_off);
348 writel(interrupt_en, data->base + reg_off);
351 static void exynos_tmu_update_temp(struct exynos_tmu_data *data, int reg_off, argument
361 th = readl(data->base + reg_off);
364 writel(th, data->base + reg_off);
/linux-master/arch/x86/events/intel/
H A Dpt.c434 unsigned int reg_off; member in struct:pt_address_range
439 .reg_off = RTIT_CTL_ADDR0_OFFSET,
444 .reg_off = RTIT_CTL_ADDR1_OFFSET,
449 .reg_off = RTIT_CTL_ADDR2_OFFSET,
454 .reg_off = RTIT_CTL_ADDR3_OFFSET,
493 rtit_ctl |= (u64)filter->config << pt_address_ranges[range].reg_off;
/linux-master/drivers/mmc/host/
H A Dcavium-thunderx.c88 host->reg_off = 0x2000;
H A Dcavium-octeon.c213 host->reg_off = 0;
/linux-master/arch/x86/kernel/
H A Dunwind_orc.c447 static bool get_reg(struct unwind_state *state, unsigned int reg_off, argument
450 unsigned int reg = reg_off/8;
/linux-master/drivers/infiniband/hw/efa/
H A Defa_admin_cmds_defs.h960 u16 reg_off; member in struct:efa_admin_mmio_req_read_less_resp
/linux-master/drivers/scsi/bnx2i/
H A Dbnx2i_hwi.c2704 u32 reg_off; local
2715 reg_off = (1 << BNX2X_DB_SHIFT) * (cid_num & 0x1FFFF);
2716 ep->qp.ctx_base = ioremap(reg_base + reg_off, 4);
2728 reg_off = CTX_OFFSET + MAX_CID_CNT * MB_KERNEL_CTX_SIZE
2732 reg_off = CTX_OFFSET + (MB_KERNEL_CTX_SIZE * cid_num);
2735 reg_off = CTX_OFFSET + (MB_KERNEL_CTX_SIZE * cid_num);
2737 ep->qp.ctx_base = ioremap(ep->hba->reg_base + reg_off,
/linux-master/drivers/net/ethernet/amazon/ena/
H A Dena_admin_defs.h1087 u16 reg_off; member in struct:ena_admin_ena_mmio_req_read_less_resp
/linux-master/drivers/thermal/tegra/
H A Dsoctherm.c521 u32 r, reg_off; local
530 reg_off = THERMCTL_LVL_REG(sg->thermctl_lvl0_offset, throt + 1);
544 r = readl(ts->regs + reg_off);
550 writel(r, ts->regs + reg_off);
/linux-master/drivers/gpu/drm/msm/disp/dpu1/catalog/
H A Ddpu_9_0_sm8550.h26 [DPU_CLK_CTRL_REG_DMA] = { .reg_off = 0x2bc, .bit_off = 20 },
H A Ddpu_10_0_sm8650.h26 [DPU_CLK_CTRL_REG_DMA] = { .reg_off = 0x2bc, .bit_off = 20 },
/linux-master/drivers/media/i2c/
H A Dimx219.c974 goto reg_off;
983 reg_off:
/linux-master/drivers/perf/hisilicon/
H A Dhisi_pcie_pmu.c145 hisi_pcie_parse_reg_value(struct hisi_pcie_pmu *pcie_pmu, u32 reg_off) argument
147 u32 val = readl_relaxed(pcie_pmu->base + reg_off);

Completed in 359 milliseconds

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